1; RUN: llc -march=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
3; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
4
5
6; FUNC-LABEL: {{^}}test_a:
7; EG-NOT: CND
8; EG: SET{{[NEQGTL]+}}_DX10
9
10define amdgpu_kernel void @test_a(i32 addrspace(1)* %out, float %in) {
11entry:
12  %0 = fcmp olt float %in, 0.000000e+00
13  %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
14  %2 = fneg float %1
15  %3 = fptosi float %2 to i32
16  %4 = bitcast i32 %3 to float
17  %5 = bitcast float %4 to i32
18  %6 = icmp ne i32 %5, 0
19  br i1 %6, label %IF, label %ENDIF
20
21IF:
22  %7 = getelementptr i32, i32 addrspace(1)* %out, i32 1
23  store i32 0, i32 addrspace(1)* %7
24  br label %ENDIF
25
26ENDIF:
27  store i32 0, i32 addrspace(1)* %out
28  ret void
29}
30
31; Same as test_a, but the branch labels are swapped to produce the inverse cc
32; for the icmp instruction
33
34; EG-LABEL: {{^}}test_b:
35; EG: SET{{[GTEQN]+}}_DX10
36; EG-NEXT: PRED_
37; EG-NEXT: ALU clause starting
38define amdgpu_kernel void @test_b(i32 addrspace(1)* %out, float %in) {
39entry:
40  %0 = fcmp olt float %in, 0.0
41  %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00
42  %2 = fneg float %1
43  %3 = fptosi float %2 to i32
44  %4 = bitcast i32 %3 to float
45  %5 = bitcast float %4 to i32
46  %6 = icmp ne i32 %5, 0
47  br i1 %6, label %ENDIF, label %IF
48
49IF:
50  %7 = getelementptr i32, i32 addrspace(1)* %out, i32 1
51  store i32 0, i32 addrspace(1)* %7
52  br label %ENDIF
53
54ENDIF:
55  store i32 0, i32 addrspace(1)* %out
56  ret void
57}
58
59; Test a CND*_INT instruction with float true/false values
60; EG-LABEL: {{^}}test_c:
61; EG: CND{{[GTE]+}}_INT
62define amdgpu_kernel void @test_c(float addrspace(1)* %out, i32 %in) {
63entry:
64  %0 = icmp sgt i32 %in, 0
65  %1 = select i1 %0, float 2.0, float 3.0
66  store float %1, float addrspace(1)* %out
67  ret void
68}
69
70; FUNC-LABEL: {{^}}selectcc_bool:
71; SI: s_cmp_lg_u32
72; SI: v_cndmask_b32_e64
73; SI-NOT: cmp
74; SI-NOT: cndmask
75define amdgpu_kernel void @selectcc_bool(i32 addrspace(1)* %out, i32 %a, i32 %b) nounwind {
76  %icmp0 = icmp ne i32 %a, %b
77  %ext = select i1 %icmp0, i32 -1, i32 0
78  store i32 %ext, i32 addrspace(1)* %out
79  ret void
80}
81