1; RUN: llc -no-integrated-as -march=mipsel < %s | \
2; RUN:     FileCheck %s -check-prefixes=ALL,GAS
3; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefixes=ALL,IAS
4
5define void @constraint_I() nounwind {
6; First I with short
7; ALL-LABEL: constraint_I:
8; ALL:           #APP
9; ALL:           addiu ${{[0-9]+}}, ${{[0-9]+}}, 4096
10; ALL:           #NO_APP
11  tail call i16 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i16 7, i16 4096) nounwind
12
13; Then I with int
14; ALL: #APP
15; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
16; ALL: #NO_APP
17  tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i32 7, i32 -3) nounwind
18  ret void
19}
20
21define void @constraint_J() nounwind {
22; Now J with 0
23; ALL-LABEL: constraint_J:
24; ALL: #APP
25; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
26; ALL: #NO_APP
27  tail call i32 asm sideeffect "addiu $0, $1, $2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind
28  ret void
29}
30
31define void @constraint_K() nounwind {
32; Now K with 64
33; ALL: #APP
34; GAS: addu ${{[0-9]+}}, ${{[0-9]+}}, 64
35; IAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 64
36; ALL: #NO_APP
37  tail call i16 asm sideeffect "addu $0, $1, $2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind
38  ret void
39}
40
41define void @constraint_L() nounwind {
42; Now L with 0x00100000
43; ALL: #APP
44; ALL: add ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
45; ALL: #NO_APP
46  tail call i32 asm sideeffect "add $0, $1, $3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind
47  ret void
48}
49
50define void @constraint_N() nounwind {
51; Now N with -3
52; ALL: #APP
53; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
54; ALL: #NO_APP
55  tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,N"(i32 7, i32 -3) nounwind
56  ret void
57}
58
59define void @constraint_O() nounwind {
60; Now O with -3
61; ALL: #APP
62; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -3
63; ALL: #NO_APP
64  tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,O"(i32 7, i16 -3) nounwind
65  ret void
66}
67
68define void @constraint_P() nounwind {
69; Now P with 65535
70; ALL: #APP
71; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 65535
72; ALL: #NO_APP
73  tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,P"(i32 7, i32 65535) nounwind
74  ret void
75}
76