1; RUN: llc -mtriple=mipsel-- -disable-mips-delay-filler \ 2; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC32 3; RUN: llc -mtriple=mips64el-- -disable-mips-delay-filler \ 4; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC64 5 6; RUN: llc -mtriple=mipsel-- -mattr=+micromips -disable-mips-delay-filler \ 7; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=MM 8 9@t1 = dso_preemptable thread_local global i32 0, align 4 10 11define dso_preemptable i32 @f1() nounwind { 12entry: 13 %tmp = load i32, i32* @t1, align 4 14 ret i32 %tmp 15 16; PIC32-LABEL: f1: 17; PIC32-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 18; PIC32-DAG: addiu $4, $[[R0]], %tlsgd(t1) 19; PIC32-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 20; PIC32-DAG: jalr $25 21; PIC32-DAG: lw $2, 0($2) 22 23; PIC64-LABEL: f1: 24; PIC64-DAG: daddiu $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f1))) 25; PIC64-DAG: daddiu $4, $[[R0]], %tlsgd(t1) 26; PIC64-DAG: ld $25, %call16(__tls_get_addr)($[[R0]]) 27; PIC64-DAG: jalr $25 28; PIC64-DAG: lw $2, 0($2) 29 30; MM-LABEL: f1: 31; MM-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 32; MM-DAG: addiu $4, $[[R0]], %tlsgd(t1) 33; MM-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 34; MM-DAG: move $gp, $2 35; MM-DAG: jalr $25 36; MM-DAG: lw16 $2, 0($2) 37} 38 39@t2 = external thread_local global i32 40 41define dso_preemptable i32 @f2() nounwind { 42entry: 43 %tmp = load i32, i32* @t2, align 4 44 ret i32 %tmp 45 46; PIC32-LABEL: f2: 47; PIC32-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 48; PIC32-DAG: addiu $4, $[[R0]], %tlsgd(t2) 49; PIC32-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 50; PIC32-DAG: jalr $25 51; PIC32-DAG: lw $2, 0($2) 52 53; PIC64-LABEL: f2: 54; PIC64-DAG: daddiu $[[R0:[a-z0-9]+]], $1, %lo(%neg(%gp_rel(f2))) 55; PIC64-DAG: daddiu $4, $[[R0]], %tlsgd(t2) 56; PIC64-DAG: ld $25, %call16(__tls_get_addr)($[[R0]]) 57; PIC64-DAG: jalr $25 58; PIC64-DAG: lw $2, 0($2) 59 60; MM-LABEL: f2: 61; MM-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 62; MM-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 63; MM-DAG: addiu $4, $[[R0]], %tlsgd(t2) 64; MM-DAG: jalr $25 65; MM-DAG: lw16 $2, 0($2) 66} 67 68@f3.i = internal thread_local unnamed_addr global i32 1, align 4 69 70define dso_preemptable i32 @f3() nounwind { 71entry: 72; PIC32-LABEL: f3: 73; PIC32: addu $[[R0:[a-z0-9]+]], $2, $25 74; PIC32: addiu $4, $[[R0]], %tlsldm(f3.i) 75; PIC32: lw $25, %call16(__tls_get_addr)($[[R0]]) 76; PIC32: jalr $25 77; PIC32: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 78; PIC32: addu $[[R1:[0-9]+]], $[[R0]], $2 79; PIC32: lw $[[R3:[0-9]+]], %dtprel_lo(f3.i)($[[R1]]) 80; PIC32: addiu $[[R3]], $[[R3]], 1 81; PIC32: sw $[[R3]], %dtprel_lo(f3.i)($[[R1]]) 82 83; PIC64-LABEL: f3: 84; PIC64: lui $[[R0:[a-z0-9]+]], %hi(%neg(%gp_rel(f3))) 85; PIC64: daddu $[[R0]], $[[R0]], $25 86; PIC64: daddiu $[[R1:[a-z0-9]+]], $[[R0]], %lo(%neg(%gp_rel(f3))) 87; PIC64: daddiu $4, $[[R1]], %tlsldm(f3.i) 88; PIC64: ld $25, %call16(__tls_get_addr)($[[R1]]) 89; PIC64: jalr $25 90; PIC64: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 91; PIC64: daddu $[[R1:[0-9]+]], $[[R0]], $2 92; PIC64: lw $[[R2:[0-9]+]], %dtprel_lo(f3.i)($[[R1]]) 93; PIC64: addiu $[[R2]], $[[R2]], 1 94; PIC64: sw $[[R2]], %dtprel_lo(f3.i)($[[R1]]) 95 96; MM-LABEL: f3: 97; MM: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i) 98; MM: jalr $25 99; MM: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 100; MM: addu16 $[[R1:[0-9]+]], $[[R0]], $2 101; MM: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]]) 102 103 %0 = load i32, i32* @f3.i, align 4 104 %inc = add nsw i32 %0, 1 105 store i32 %inc, i32* @f3.i, align 4 106 ret i32 %inc 107} 108