1; RUN: opt -mtriple=amdgcn-- -O3 -S %s | FileCheck %s
2
3; Check that loop unswitch does not happen if condition is divergent.
4
5; CHECK-LABEL: {{^}}define amdgpu_kernel void @divergent_unswitch
6; CHECK: entry:
7; CHECK: icmp
8; CHECK: [[IF_COND:%[a-z0-9]+]] = icmp {{.*}} 567890
9; CHECK: br label
10; CHECK: br i1 [[IF_COND]]
11
12define amdgpu_kernel void @divergent_unswitch(i32 * nocapture %out, i32 %n) {
13entry:
14  %cmp9 = icmp sgt i32 %n, 0
15  br i1 %cmp9, label %for.body.lr.ph, label %for.cond.cleanup
16
17for.body.lr.ph:                                   ; preds = %entry
18  %call = tail call i32 @llvm.amdgcn.workitem.id.x() #0
19  %cmp2 = icmp eq i32 %call, 567890
20  br label %for.body
21
22for.cond.cleanup.loopexit:                        ; preds = %for.inc
23  br label %for.cond.cleanup
24
25for.cond.cleanup:                                 ; preds = %for.cond.cleanup.loopexit, %entry
26  ret void
27
28for.body:                                         ; preds = %for.inc, %for.body.lr.ph
29  %i.010 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
30  br i1 %cmp2, label %if.then, label %for.inc
31
32if.then:                                          ; preds = %for.body
33  %arrayidx = getelementptr inbounds i32, i32 * %out, i32 %i.010
34  store i32 %i.010, i32 * %arrayidx, align 4
35  br label %for.inc
36
37for.inc:                                          ; preds = %for.body, %if.then
38  %inc = add nuw nsw i32 %i.010, 1
39  %exitcond = icmp eq i32 %inc, %n
40  br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
41}
42
43declare i32 @llvm.amdgcn.workitem.id.x() #0
44
45attributes #0 = { nounwind readnone }
46