1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -slp-vectorizer -S -slp-max-vf=1 < %s | FileCheck -check-prefix=MAX32 %s 3; RUN: opt -slp-vectorizer -S -slp-max-vf=8 < %s | FileCheck -check-prefix=MAX256 %s 4; RUN: opt -slp-vectorizer -S -slp-max-vf=32 < %s | FileCheck -check-prefix=MAX1024 %s 5; RUN: opt -slp-vectorizer -S < %s | FileCheck -check-prefix=MAX1024 %s 6 7; Make sure we do not vectorize to create PHI wider than requested. 8; On AMDGPU target wider vectorization will result in a higher register pressure, 9; spilling, or even inability to allocate registers. 10 11define void @phi_float32(half %hval, float %fval) { 12; MAX32-LABEL: @phi_float32( 13; MAX32-NEXT: bb: 14; MAX32-NEXT: br label [[BB1:%.*]] 15; MAX32: bb1: 16; MAX32-NEXT: [[I:%.*]] = fpext half [[HVAL:%.*]] to float 17; MAX32-NEXT: [[I1:%.*]] = fmul float [[I]], [[FVAL:%.*]] 18; MAX32-NEXT: [[I2:%.*]] = fadd float 0.000000e+00, [[I1]] 19; MAX32-NEXT: [[I3:%.*]] = fpext half [[HVAL]] to float 20; MAX32-NEXT: [[I4:%.*]] = fmul float [[I3]], [[FVAL]] 21; MAX32-NEXT: [[I5:%.*]] = fadd float 0.000000e+00, [[I4]] 22; MAX32-NEXT: [[I6:%.*]] = fpext half [[HVAL]] to float 23; MAX32-NEXT: [[I7:%.*]] = fmul float [[I6]], [[FVAL]] 24; MAX32-NEXT: [[I8:%.*]] = fadd float 0.000000e+00, [[I7]] 25; MAX32-NEXT: [[I9:%.*]] = fpext half [[HVAL]] to float 26; MAX32-NEXT: [[I10:%.*]] = fmul float [[I9]], [[FVAL]] 27; MAX32-NEXT: [[I11:%.*]] = fadd float 0.000000e+00, [[I10]] 28; MAX32-NEXT: [[I12:%.*]] = fmul float [[I]], [[FVAL]] 29; MAX32-NEXT: [[I13:%.*]] = fadd float 0.000000e+00, [[I12]] 30; MAX32-NEXT: [[I14:%.*]] = fmul float [[I3]], [[FVAL]] 31; MAX32-NEXT: [[I15:%.*]] = fadd float 0.000000e+00, [[I14]] 32; MAX32-NEXT: [[I16:%.*]] = fmul float [[I6]], [[FVAL]] 33; MAX32-NEXT: [[I17:%.*]] = fadd float 0.000000e+00, [[I16]] 34; MAX32-NEXT: [[I18:%.*]] = fmul float [[I9]], [[FVAL]] 35; MAX32-NEXT: [[I19:%.*]] = fadd float 0.000000e+00, [[I18]] 36; MAX32-NEXT: [[I20:%.*]] = fmul float [[I]], [[FVAL]] 37; MAX32-NEXT: [[I21:%.*]] = fadd float 0.000000e+00, [[I20]] 38; MAX32-NEXT: [[I22:%.*]] = fmul float [[I3]], [[FVAL]] 39; MAX32-NEXT: [[I23:%.*]] = fadd float 0.000000e+00, [[I22]] 40; MAX32-NEXT: [[I24:%.*]] = fmul float [[I6]], [[FVAL]] 41; MAX32-NEXT: [[I25:%.*]] = fadd float 0.000000e+00, [[I24]] 42; MAX32-NEXT: [[I26:%.*]] = fmul float [[I9]], [[FVAL]] 43; MAX32-NEXT: [[I27:%.*]] = fadd float 0.000000e+00, [[I26]] 44; MAX32-NEXT: [[I28:%.*]] = fmul float [[I]], [[FVAL]] 45; MAX32-NEXT: [[I29:%.*]] = fadd float 0.000000e+00, [[I28]] 46; MAX32-NEXT: [[I30:%.*]] = fmul float [[I3]], [[FVAL]] 47; MAX32-NEXT: [[I31:%.*]] = fadd float 0.000000e+00, [[I30]] 48; MAX32-NEXT: [[I32:%.*]] = fmul float [[I6]], [[FVAL]] 49; MAX32-NEXT: [[I33:%.*]] = fadd float 0.000000e+00, [[I32]] 50; MAX32-NEXT: [[I34:%.*]] = fmul float [[I9]], [[FVAL]] 51; MAX32-NEXT: [[I35:%.*]] = fadd float 0.000000e+00, [[I34]] 52; MAX32-NEXT: [[I36:%.*]] = fmul float [[I]], [[FVAL]] 53; MAX32-NEXT: [[I37:%.*]] = fadd float 0.000000e+00, [[I36]] 54; MAX32-NEXT: [[I38:%.*]] = fmul float [[I3]], [[FVAL]] 55; MAX32-NEXT: [[I39:%.*]] = fadd float 0.000000e+00, [[I38]] 56; MAX32-NEXT: [[I40:%.*]] = fmul float [[I6]], [[FVAL]] 57; MAX32-NEXT: [[I41:%.*]] = fadd float 0.000000e+00, [[I40]] 58; MAX32-NEXT: [[I42:%.*]] = fmul float [[I9]], [[FVAL]] 59; MAX32-NEXT: [[I43:%.*]] = fadd float 0.000000e+00, [[I42]] 60; MAX32-NEXT: [[I44:%.*]] = fmul float [[I]], [[FVAL]] 61; MAX32-NEXT: [[I45:%.*]] = fadd float 0.000000e+00, [[I44]] 62; MAX32-NEXT: [[I46:%.*]] = fmul float [[I3]], [[FVAL]] 63; MAX32-NEXT: [[I47:%.*]] = fadd float 0.000000e+00, [[I46]] 64; MAX32-NEXT: [[I48:%.*]] = fmul float [[I6]], [[FVAL]] 65; MAX32-NEXT: [[I49:%.*]] = fadd float 0.000000e+00, [[I48]] 66; MAX32-NEXT: [[I50:%.*]] = fmul float [[I9]], [[FVAL]] 67; MAX32-NEXT: [[I51:%.*]] = fadd float 0.000000e+00, [[I50]] 68; MAX32-NEXT: [[I52:%.*]] = fmul float [[I]], [[FVAL]] 69; MAX32-NEXT: [[I53:%.*]] = fadd float 0.000000e+00, [[I52]] 70; MAX32-NEXT: [[I54:%.*]] = fmul float [[I3]], [[FVAL]] 71; MAX32-NEXT: [[I55:%.*]] = fadd float 0.000000e+00, [[I54]] 72; MAX32-NEXT: [[I56:%.*]] = fmul float [[I6]], [[FVAL]] 73; MAX32-NEXT: [[I57:%.*]] = fadd float 0.000000e+00, [[I56]] 74; MAX32-NEXT: [[I58:%.*]] = fmul float [[I9]], [[FVAL]] 75; MAX32-NEXT: [[I59:%.*]] = fadd float 0.000000e+00, [[I58]] 76; MAX32-NEXT: [[I60:%.*]] = fmul float [[I]], [[FVAL]] 77; MAX32-NEXT: [[I61:%.*]] = fadd float 0.000000e+00, [[I60]] 78; MAX32-NEXT: [[I62:%.*]] = fmul float [[I3]], [[FVAL]] 79; MAX32-NEXT: [[I63:%.*]] = fadd float 0.000000e+00, [[I62]] 80; MAX32-NEXT: [[I64:%.*]] = fmul float [[I6]], [[FVAL]] 81; MAX32-NEXT: [[I65:%.*]] = fadd float 0.000000e+00, [[I64]] 82; MAX32-NEXT: [[I66:%.*]] = fmul float [[I9]], [[FVAL]] 83; MAX32-NEXT: [[I67:%.*]] = fadd float 0.000000e+00, [[I66]] 84; MAX32-NEXT: switch i32 undef, label [[BB5:%.*]] [ 85; MAX32-NEXT: i32 0, label [[BB2:%.*]] 86; MAX32-NEXT: i32 1, label [[BB3:%.*]] 87; MAX32-NEXT: i32 2, label [[BB4:%.*]] 88; MAX32-NEXT: ] 89; MAX32: bb3: 90; MAX32-NEXT: br label [[BB2]] 91; MAX32: bb4: 92; MAX32-NEXT: br label [[BB2]] 93; MAX32: bb5: 94; MAX32-NEXT: br label [[BB2]] 95; MAX32: bb2: 96; MAX32-NEXT: [[PHI1:%.*]] = phi float [ [[I19]], [[BB3]] ], [ [[I19]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I19]], [[BB1]] ] 97; MAX32-NEXT: [[PHI2:%.*]] = phi float [ [[I17]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I17]], [[BB5]] ], [ [[I17]], [[BB1]] ] 98; MAX32-NEXT: [[PHI3:%.*]] = phi float [ [[I15]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 99; MAX32-NEXT: [[PHI4:%.*]] = phi float [ [[I13]], [[BB3]] ], [ [[I13]], [[BB4]] ], [ [[I13]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 100; MAX32-NEXT: [[PHI5:%.*]] = phi float [ [[I11]], [[BB3]] ], [ [[I11]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I11]], [[BB1]] ] 101; MAX32-NEXT: [[PHI6:%.*]] = phi float [ [[I8]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I8]], [[BB5]] ], [ [[I8]], [[BB1]] ] 102; MAX32-NEXT: [[PHI7:%.*]] = phi float [ [[I5]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 103; MAX32-NEXT: [[PHI8:%.*]] = phi float [ [[I2]], [[BB3]] ], [ [[I2]], [[BB4]] ], [ [[I2]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 104; MAX32-NEXT: [[PHI9:%.*]] = phi float [ [[I21]], [[BB3]] ], [ [[I21]], [[BB4]] ], [ [[I21]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 105; MAX32-NEXT: [[PHI10:%.*]] = phi float [ [[I23]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 106; MAX32-NEXT: [[PHI11:%.*]] = phi float [ [[I25]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I25]], [[BB5]] ], [ [[I25]], [[BB1]] ] 107; MAX32-NEXT: [[PHI12:%.*]] = phi float [ [[I27]], [[BB3]] ], [ [[I27]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I27]], [[BB1]] ] 108; MAX32-NEXT: [[PHI13:%.*]] = phi float [ [[I29]], [[BB3]] ], [ [[I29]], [[BB4]] ], [ [[I29]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 109; MAX32-NEXT: [[PHI14:%.*]] = phi float [ [[I31]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 110; MAX32-NEXT: [[PHI15:%.*]] = phi float [ [[I33]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I33]], [[BB5]] ], [ [[I33]], [[BB1]] ] 111; MAX32-NEXT: [[PHI16:%.*]] = phi float [ [[I35]], [[BB3]] ], [ [[I35]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I35]], [[BB1]] ] 112; MAX32-NEXT: [[PHI17:%.*]] = phi float [ [[I37]], [[BB3]] ], [ [[I37]], [[BB4]] ], [ [[I37]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 113; MAX32-NEXT: [[PHI18:%.*]] = phi float [ [[I39]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 114; MAX32-NEXT: [[PHI19:%.*]] = phi float [ [[I41]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I41]], [[BB5]] ], [ [[I41]], [[BB1]] ] 115; MAX32-NEXT: [[PHI20:%.*]] = phi float [ [[I43]], [[BB3]] ], [ [[I43]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I43]], [[BB1]] ] 116; MAX32-NEXT: [[PHI21:%.*]] = phi float [ [[I45]], [[BB3]] ], [ [[I45]], [[BB4]] ], [ [[I45]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 117; MAX32-NEXT: [[PHI22:%.*]] = phi float [ [[I47]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 118; MAX32-NEXT: [[PHI23:%.*]] = phi float [ [[I49]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I49]], [[BB5]] ], [ [[I49]], [[BB1]] ] 119; MAX32-NEXT: [[PHI24:%.*]] = phi float [ [[I51]], [[BB3]] ], [ [[I51]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I51]], [[BB1]] ] 120; MAX32-NEXT: [[PHI25:%.*]] = phi float [ [[I53]], [[BB3]] ], [ [[I53]], [[BB4]] ], [ [[I53]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 121; MAX32-NEXT: [[PHI26:%.*]] = phi float [ [[I55]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 122; MAX32-NEXT: [[PHI27:%.*]] = phi float [ [[I57]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I57]], [[BB5]] ], [ [[I57]], [[BB1]] ] 123; MAX32-NEXT: [[PHI28:%.*]] = phi float [ [[I59]], [[BB3]] ], [ [[I59]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I59]], [[BB1]] ] 124; MAX32-NEXT: [[PHI29:%.*]] = phi float [ [[I61]], [[BB3]] ], [ [[I61]], [[BB4]] ], [ [[I61]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 125; MAX32-NEXT: [[PHI30:%.*]] = phi float [ [[I63]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] 126; MAX32-NEXT: [[PHI31:%.*]] = phi float [ [[I65]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I65]], [[BB5]] ], [ [[I65]], [[BB1]] ] 127; MAX32-NEXT: [[PHI32:%.*]] = phi float [ [[I67]], [[BB3]] ], [ [[I67]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I67]], [[BB1]] ] 128; MAX32-NEXT: store float [[PHI31]], float* undef, align 4 129; MAX32-NEXT: ret void 130; 131; MAX256-LABEL: @phi_float32( 132; MAX256-NEXT: bb: 133; MAX256-NEXT: br label [[BB1:%.*]] 134; MAX256: bb1: 135; MAX256-NEXT: [[I:%.*]] = fpext half [[HVAL:%.*]] to float 136; MAX256-NEXT: [[I3:%.*]] = fpext half [[HVAL]] to float 137; MAX256-NEXT: [[I6:%.*]] = fpext half [[HVAL]] to float 138; MAX256-NEXT: [[I9:%.*]] = fpext half [[HVAL]] to float 139; MAX256-NEXT: [[TMP0:%.*]] = insertelement <8 x float> poison, float [[I]], i32 0 140; MAX256-NEXT: [[SHUFFLE11:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <8 x i32> zeroinitializer 141; MAX256-NEXT: [[TMP1:%.*]] = insertelement <8 x float> poison, float [[FVAL:%.*]], i32 0 142; MAX256-NEXT: [[SHUFFLE12:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <8 x i32> zeroinitializer 143; MAX256-NEXT: [[TMP2:%.*]] = fmul <8 x float> [[SHUFFLE11]], [[SHUFFLE12]] 144; MAX256-NEXT: [[TMP3:%.*]] = fadd <8 x float> zeroinitializer, [[TMP2]] 145; MAX256-NEXT: [[TMP4:%.*]] = insertelement <8 x float> poison, float [[I3]], i32 0 146; MAX256-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float> [[TMP4]], <8 x float> poison, <8 x i32> zeroinitializer 147; MAX256-NEXT: [[TMP5:%.*]] = fmul <8 x float> [[SHUFFLE]], [[SHUFFLE12]] 148; MAX256-NEXT: [[TMP6:%.*]] = fadd <8 x float> zeroinitializer, [[TMP5]] 149; MAX256-NEXT: [[TMP7:%.*]] = insertelement <8 x float> poison, float [[I6]], i32 0 150; MAX256-NEXT: [[SHUFFLE5:%.*]] = shufflevector <8 x float> [[TMP7]], <8 x float> poison, <8 x i32> zeroinitializer 151; MAX256-NEXT: [[TMP8:%.*]] = fmul <8 x float> [[SHUFFLE5]], [[SHUFFLE12]] 152; MAX256-NEXT: [[TMP9:%.*]] = fadd <8 x float> zeroinitializer, [[TMP8]] 153; MAX256-NEXT: [[TMP10:%.*]] = insertelement <8 x float> poison, float [[I9]], i32 0 154; MAX256-NEXT: [[SHUFFLE8:%.*]] = shufflevector <8 x float> [[TMP10]], <8 x float> poison, <8 x i32> zeroinitializer 155; MAX256-NEXT: [[TMP11:%.*]] = fmul <8 x float> [[SHUFFLE8]], [[SHUFFLE12]] 156; MAX256-NEXT: [[TMP12:%.*]] = fadd <8 x float> zeroinitializer, [[TMP11]] 157; MAX256-NEXT: switch i32 undef, label [[BB5:%.*]] [ 158; MAX256-NEXT: i32 0, label [[BB2:%.*]] 159; MAX256-NEXT: i32 1, label [[BB3:%.*]] 160; MAX256-NEXT: i32 2, label [[BB4:%.*]] 161; MAX256-NEXT: ] 162; MAX256: bb3: 163; MAX256-NEXT: br label [[BB2]] 164; MAX256: bb4: 165; MAX256-NEXT: br label [[BB2]] 166; MAX256: bb5: 167; MAX256-NEXT: br label [[BB2]] 168; MAX256: bb2: 169; MAX256-NEXT: [[TMP13:%.*]] = phi <8 x float> [ [[TMP6]], [[BB3]] ], [ [[SHUFFLE12]], [[BB4]] ], [ [[SHUFFLE12]], [[BB5]] ], [ [[SHUFFLE12]], [[BB1]] ] 170; MAX256-NEXT: [[TMP14:%.*]] = phi <8 x float> [ [[TMP9]], [[BB3]] ], [ [[SHUFFLE12]], [[BB4]] ], [ [[TMP9]], [[BB5]] ], [ [[TMP9]], [[BB1]] ] 171; MAX256-NEXT: [[TMP15:%.*]] = phi <8 x float> [ [[TMP12]], [[BB3]] ], [ [[TMP12]], [[BB4]] ], [ [[SHUFFLE12]], [[BB5]] ], [ [[TMP12]], [[BB1]] ] 172; MAX256-NEXT: [[TMP16:%.*]] = phi <8 x float> [ [[TMP3]], [[BB3]] ], [ [[TMP3]], [[BB4]] ], [ [[TMP3]], [[BB5]] ], [ [[SHUFFLE12]], [[BB1]] ] 173; MAX256-NEXT: [[TMP17:%.*]] = extractelement <8 x float> [[TMP14]], i32 7 174; MAX256-NEXT: store float [[TMP17]], float* undef, align 4 175; MAX256-NEXT: ret void 176; 177; MAX1024-LABEL: @phi_float32( 178; MAX1024-NEXT: bb: 179; MAX1024-NEXT: br label [[BB1:%.*]] 180; MAX1024: bb1: 181; MAX1024-NEXT: [[I:%.*]] = fpext half [[HVAL:%.*]] to float 182; MAX1024-NEXT: [[I3:%.*]] = fpext half [[HVAL]] to float 183; MAX1024-NEXT: [[I6:%.*]] = fpext half [[HVAL]] to float 184; MAX1024-NEXT: [[I9:%.*]] = fpext half [[HVAL]] to float 185; MAX1024-NEXT: [[TMP0:%.*]] = insertelement <8 x float> poison, float [[I]], i32 0 186; MAX1024-NEXT: [[SHUFFLE11:%.*]] = shufflevector <8 x float> [[TMP0]], <8 x float> poison, <8 x i32> zeroinitializer 187; MAX1024-NEXT: [[TMP1:%.*]] = insertelement <8 x float> poison, float [[FVAL:%.*]], i32 0 188; MAX1024-NEXT: [[SHUFFLE12:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> poison, <8 x i32> zeroinitializer 189; MAX1024-NEXT: [[TMP2:%.*]] = fmul <8 x float> [[SHUFFLE11]], [[SHUFFLE12]] 190; MAX1024-NEXT: [[TMP3:%.*]] = fadd <8 x float> zeroinitializer, [[TMP2]] 191; MAX1024-NEXT: [[TMP4:%.*]] = insertelement <8 x float> poison, float [[I3]], i32 0 192; MAX1024-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x float> [[TMP4]], <8 x float> poison, <8 x i32> zeroinitializer 193; MAX1024-NEXT: [[TMP5:%.*]] = fmul <8 x float> [[SHUFFLE]], [[SHUFFLE12]] 194; MAX1024-NEXT: [[TMP6:%.*]] = fadd <8 x float> zeroinitializer, [[TMP5]] 195; MAX1024-NEXT: [[TMP7:%.*]] = insertelement <8 x float> poison, float [[I6]], i32 0 196; MAX1024-NEXT: [[SHUFFLE5:%.*]] = shufflevector <8 x float> [[TMP7]], <8 x float> poison, <8 x i32> zeroinitializer 197; MAX1024-NEXT: [[TMP8:%.*]] = fmul <8 x float> [[SHUFFLE5]], [[SHUFFLE12]] 198; MAX1024-NEXT: [[TMP9:%.*]] = fadd <8 x float> zeroinitializer, [[TMP8]] 199; MAX1024-NEXT: [[TMP10:%.*]] = insertelement <8 x float> poison, float [[I9]], i32 0 200; MAX1024-NEXT: [[SHUFFLE8:%.*]] = shufflevector <8 x float> [[TMP10]], <8 x float> poison, <8 x i32> zeroinitializer 201; MAX1024-NEXT: [[TMP11:%.*]] = fmul <8 x float> [[SHUFFLE8]], [[SHUFFLE12]] 202; MAX1024-NEXT: [[TMP12:%.*]] = fadd <8 x float> zeroinitializer, [[TMP11]] 203; MAX1024-NEXT: switch i32 undef, label [[BB5:%.*]] [ 204; MAX1024-NEXT: i32 0, label [[BB2:%.*]] 205; MAX1024-NEXT: i32 1, label [[BB3:%.*]] 206; MAX1024-NEXT: i32 2, label [[BB4:%.*]] 207; MAX1024-NEXT: ] 208; MAX1024: bb3: 209; MAX1024-NEXT: br label [[BB2]] 210; MAX1024: bb4: 211; MAX1024-NEXT: br label [[BB2]] 212; MAX1024: bb5: 213; MAX1024-NEXT: br label [[BB2]] 214; MAX1024: bb2: 215; MAX1024-NEXT: [[TMP13:%.*]] = phi <8 x float> [ [[TMP6]], [[BB3]] ], [ [[SHUFFLE12]], [[BB4]] ], [ [[SHUFFLE12]], [[BB5]] ], [ [[SHUFFLE12]], [[BB1]] ] 216; MAX1024-NEXT: [[TMP14:%.*]] = phi <8 x float> [ [[TMP9]], [[BB3]] ], [ [[SHUFFLE12]], [[BB4]] ], [ [[TMP9]], [[BB5]] ], [ [[TMP9]], [[BB1]] ] 217; MAX1024-NEXT: [[TMP15:%.*]] = phi <8 x float> [ [[TMP12]], [[BB3]] ], [ [[TMP12]], [[BB4]] ], [ [[SHUFFLE12]], [[BB5]] ], [ [[TMP12]], [[BB1]] ] 218; MAX1024-NEXT: [[TMP16:%.*]] = phi <8 x float> [ [[TMP3]], [[BB3]] ], [ [[TMP3]], [[BB4]] ], [ [[TMP3]], [[BB5]] ], [ [[SHUFFLE12]], [[BB1]] ] 219; MAX1024-NEXT: [[TMP17:%.*]] = extractelement <8 x float> [[TMP14]], i32 7 220; MAX1024-NEXT: store float [[TMP17]], float* undef, align 4 221; MAX1024-NEXT: ret void 222; 223bb: 224 br label %bb1 225 226bb1: 227 %i = fpext half %hval to float 228 %i1 = fmul float %i, %fval 229 %i2 = fadd float 0.000000e+00, %i1 230 %i3 = fpext half %hval to float 231 %i4 = fmul float %i3, %fval 232 %i5 = fadd float 0.000000e+00, %i4 233 %i6 = fpext half %hval to float 234 %i7 = fmul float %i6, %fval 235 %i8 = fadd float 0.000000e+00, %i7 236 %i9 = fpext half %hval to float 237 %i10 = fmul float %i9, %fval 238 %i11 = fadd float 0.000000e+00, %i10 239 %i12 = fmul float %i, %fval 240 %i13 = fadd float 0.000000e+00, %i12 241 %i14 = fmul float %i3, %fval 242 %i15 = fadd float 0.000000e+00, %i14 243 %i16 = fmul float %i6, %fval 244 %i17 = fadd float 0.000000e+00, %i16 245 %i18 = fmul float %i9, %fval 246 %i19 = fadd float 0.000000e+00, %i18 247 %i20 = fmul float %i, %fval 248 %i21 = fadd float 0.000000e+00, %i20 249 %i22 = fmul float %i3, %fval 250 %i23 = fadd float 0.000000e+00, %i22 251 %i24 = fmul float %i6, %fval 252 %i25 = fadd float 0.000000e+00, %i24 253 %i26 = fmul float %i9, %fval 254 %i27 = fadd float 0.000000e+00, %i26 255 %i28 = fmul float %i, %fval 256 %i29 = fadd float 0.000000e+00, %i28 257 %i30 = fmul float %i3, %fval 258 %i31 = fadd float 0.000000e+00, %i30 259 %i32 = fmul float %i6, %fval 260 %i33 = fadd float 0.000000e+00, %i32 261 %i34 = fmul float %i9, %fval 262 %i35 = fadd float 0.000000e+00, %i34 263 %i36 = fmul float %i, %fval 264 %i37 = fadd float 0.000000e+00, %i36 265 %i38 = fmul float %i3, %fval 266 %i39 = fadd float 0.000000e+00, %i38 267 %i40 = fmul float %i6, %fval 268 %i41 = fadd float 0.000000e+00, %i40 269 %i42 = fmul float %i9, %fval 270 %i43 = fadd float 0.000000e+00, %i42 271 %i44 = fmul float %i, %fval 272 %i45 = fadd float 0.000000e+00, %i44 273 %i46 = fmul float %i3, %fval 274 %i47 = fadd float 0.000000e+00, %i46 275 %i48 = fmul float %i6, %fval 276 %i49 = fadd float 0.000000e+00, %i48 277 %i50 = fmul float %i9, %fval 278 %i51 = fadd float 0.000000e+00, %i50 279 %i52 = fmul float %i, %fval 280 %i53 = fadd float 0.000000e+00, %i52 281 %i54 = fmul float %i3, %fval 282 %i55 = fadd float 0.000000e+00, %i54 283 %i56 = fmul float %i6, %fval 284 %i57 = fadd float 0.000000e+00, %i56 285 %i58 = fmul float %i9, %fval 286 %i59 = fadd float 0.000000e+00, %i58 287 %i60 = fmul float %i, %fval 288 %i61 = fadd float 0.000000e+00, %i60 289 %i62 = fmul float %i3, %fval 290 %i63 = fadd float 0.000000e+00, %i62 291 %i64 = fmul float %i6, %fval 292 %i65 = fadd float 0.000000e+00, %i64 293 %i66 = fmul float %i9, %fval 294 %i67 = fadd float 0.000000e+00, %i66 295 switch i32 undef, label %bb5 [ 296 i32 0, label %bb2 297 i32 1, label %bb3 298 i32 2, label %bb4 299 ] 300 301bb3: 302 br label %bb2 303 304bb4: 305 br label %bb2 306 307bb5: 308 br label %bb2 309 310bb2: 311 %phi1 = phi float [ %i19, %bb3 ], [ %i19, %bb4 ], [ %fval, %bb5 ], [ %i19, %bb1 ] 312 %phi2 = phi float [ %i17, %bb3 ], [ %fval, %bb4 ], [ %i17, %bb5 ], [ %i17, %bb1 ] 313 %phi3 = phi float [ %i15, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 314 %phi4 = phi float [ %i13, %bb3 ], [ %i13, %bb4 ], [ %i13, %bb5 ], [ %fval, %bb1 ] 315 %phi5 = phi float [ %i11, %bb3 ], [ %i11, %bb4 ], [ %fval, %bb5 ], [ %i11, %bb1 ] 316 %phi6 = phi float [ %i8, %bb3 ], [ %fval, %bb4 ], [ %i8, %bb5 ], [ %i8, %bb1 ] 317 %phi7 = phi float [ %i5, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 318 %phi8 = phi float [ %i2, %bb3 ], [ %i2, %bb4 ], [ %i2, %bb5 ], [ %fval, %bb1 ] 319 %phi9 = phi float [ %i21, %bb3 ], [ %i21, %bb4 ], [ %i21, %bb5 ], [ %fval, %bb1 ] 320 %phi10 = phi float [ %i23, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 321 %phi11 = phi float [ %i25, %bb3 ], [ %fval, %bb4 ], [ %i25, %bb5 ], [ %i25, %bb1 ] 322 %phi12 = phi float [ %i27, %bb3 ], [ %i27, %bb4 ], [ %fval, %bb5 ], [ %i27, %bb1 ] 323 %phi13 = phi float [ %i29, %bb3 ], [ %i29, %bb4 ], [ %i29, %bb5 ], [ %fval, %bb1 ] 324 %phi14 = phi float [ %i31, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 325 %phi15 = phi float [ %i33, %bb3 ], [ %fval, %bb4 ], [ %i33, %bb5 ], [ %i33, %bb1 ] 326 %phi16 = phi float [ %i35, %bb3 ], [ %i35, %bb4 ], [ %fval, %bb5 ], [ %i35, %bb1 ] 327 %phi17 = phi float [ %i37, %bb3 ], [ %i37, %bb4 ], [ %i37, %bb5 ], [ %fval, %bb1 ] 328 %phi18 = phi float [ %i39, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 329 %phi19 = phi float [ %i41, %bb3 ], [ %fval, %bb4 ], [ %i41, %bb5 ], [ %i41, %bb1 ] 330 %phi20 = phi float [ %i43, %bb3 ], [ %i43, %bb4 ], [ %fval, %bb5 ], [ %i43, %bb1 ] 331 %phi21 = phi float [ %i45, %bb3 ], [ %i45, %bb4 ], [ %i45, %bb5 ], [ %fval, %bb1 ] 332 %phi22 = phi float [ %i47, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 333 %phi23 = phi float [ %i49, %bb3 ], [ %fval, %bb4 ], [ %i49, %bb5 ], [ %i49, %bb1 ] 334 %phi24 = phi float [ %i51, %bb3 ], [ %i51, %bb4 ], [ %fval, %bb5 ], [ %i51, %bb1 ] 335 %phi25 = phi float [ %i53, %bb3 ], [ %i53, %bb4 ], [ %i53, %bb5 ], [ %fval, %bb1 ] 336 %phi26 = phi float [ %i55, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 337 %phi27 = phi float [ %i57, %bb3 ], [ %fval, %bb4 ], [ %i57, %bb5 ], [ %i57, %bb1 ] 338 %phi28 = phi float [ %i59, %bb3 ], [ %i59, %bb4 ], [ %fval, %bb5 ], [ %i59, %bb1 ] 339 %phi29 = phi float [ %i61, %bb3 ], [ %i61, %bb4 ], [ %i61, %bb5 ], [ %fval, %bb1 ] 340 %phi30 = phi float [ %i63, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] 341 %phi31 = phi float [ %i65, %bb3 ], [ %fval, %bb4 ], [ %i65, %bb5 ], [ %i65, %bb1 ] 342 %phi32 = phi float [ %i67, %bb3 ], [ %i67, %bb4 ], [ %fval, %bb5 ], [ %i67, %bb1 ] 343 store float %phi31, float* undef 344 ret void 345} 346