1 //===--- AMDGPUMacroFusion.cpp - AMDGPU Macro Fusion ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file This file contains the AMDGPU implementation of the DAG scheduling
10 /// mutation to pair instructions back to back.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "AMDGPUMacroFusion.h"
15 #include "AMDGPUSubtarget.h"
16 #include "SIInstrInfo.h"
17 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
18
19 #include "llvm/CodeGen/MacroFusion.h"
20
21 using namespace llvm;
22
23 namespace {
24
25 /// Check if the instr pair, FirstMI and SecondMI, should be fused
26 /// together. Given SecondMI, when FirstMI is unspecified, then check if
27 /// SecondMI may be part of a fused pair at all.
shouldScheduleAdjacent(const TargetInstrInfo & TII_,const TargetSubtargetInfo & TSI,const MachineInstr * FirstMI,const MachineInstr & SecondMI)28 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII_,
29 const TargetSubtargetInfo &TSI,
30 const MachineInstr *FirstMI,
31 const MachineInstr &SecondMI) {
32 const SIInstrInfo &TII = static_cast<const SIInstrInfo&>(TII_);
33
34 switch (SecondMI.getOpcode()) {
35 case AMDGPU::V_ADDC_U32_e64:
36 case AMDGPU::V_SUBB_U32_e64:
37 case AMDGPU::V_CNDMASK_B32_e64: {
38 // Try to cluster defs of condition registers to their uses. This improves
39 // the chance VCC will be available which will allow shrinking to VOP2
40 // encodings.
41 if (!FirstMI)
42 return true;
43
44 const MachineBasicBlock &MBB = *FirstMI->getParent();
45 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
46 const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
47 const MachineOperand *Src2 = TII.getNamedOperand(SecondMI,
48 AMDGPU::OpName::src2);
49 return FirstMI->definesRegister(Src2->getReg(), TRI);
50 }
51 default:
52 return false;
53 }
54
55 return false;
56 }
57
58 } // end namespace
59
60
61 namespace llvm {
62
createAMDGPUMacroFusionDAGMutation()63 std::unique_ptr<ScheduleDAGMutation> createAMDGPUMacroFusionDAGMutation () {
64 return createMacroFusionDAGMutation(shouldScheduleAdjacent);
65 }
66
67 } // end namespace llvm
68