1// RUN: not llvm-tblgen -gen-subtarget -I %p/../../include %s 2>&1 | FileCheck %s -DFILE=%s 2 3include "llvm/Target/Target.td" 4 5def TestTarget : Target; 6 7// CHECK: [[FILE]]:[[@LINE+1]]:1: error: No schedule information for instruction 'TestInst' in SchedMachineModel 'TestSchedModel' 8def TestInst : Instruction { 9 let OutOperandList = (outs); 10 let InOperandList = (ins); 11 bits<8> Inst = 0b00101010; 12} 13 14def TestSchedModel : SchedMachineModel { 15 let CompleteModel = 1; 16} 17 18def TestProcessor : ProcessorModel<"testprocessor", TestSchedModel, []>; 19