1; RUN: llc < %s | FileCheck %s
2
3; ModuleID = 'aarch64_tree_tests.bc'
4target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
5target triple = "arm64--linux-gnu"
6
7; FIXME: Misspelled CHECK-LABEL
8; CHECK-LABLE: @aarch64_tree_tests_and
9; CHECK: .hword	32768
10; CHECK: .hword	32767
11; CHECK: .hword	4664
12; CHECK: .hword	32767
13; CHECK: .hword	32768
14; CHECK: .hword	32768
15; CHECK: .hword	0
16; CHECK: .hword	0
17
18; Function Attrs: nounwind readnone
19define <8 x i16> @aarch64_tree_tests_and(<8 x i16> %a) {
20entry:
21  %and = and <8 x i16> <i16 0, i16 undef, i16 undef, i16 0, i16 0, i16 undef, i16 undef, i16 0>, %a
22  %ret = add <8 x i16> %and, <i16 -32768, i16 32767, i16 4664, i16 32767, i16 -32768, i16 -32768, i16 0, i16 0>
23  ret <8 x i16> %ret
24}
25
26; FIXME: Misspelled CHECK-LABEL
27; CHECK-LABLE: @aarch64_tree_tests_or
28; CHECK: .hword	32768
29; CHECK: .hword	32766
30; CHECK: .hword	4664
31; CHECK: .hword	32766
32; CHECK: .hword	32768
33; CHECK: .hword	32768
34; CHECK: .hword	65535
35; CHECK: .hword	65535
36
37; Function Attrs: nounwind readnone
38define <8 x i16> @aarch64_tree_tests_or(<8 x i16> %a) {
39entry:
40  %or = or <8 x i16> <i16 -1, i16 undef, i16 undef, i16 -1, i16 -1, i16 undef, i16 undef, i16 -1>, %a
41  %ret = add <8 x i16> %or, <i16 -32767, i16 32767, i16 4665, i16 32767, i16 -32767, i16 -32767, i16 0, i16 0>
42  ret <8 x i16> %ret
43}
44
45