1; RUN: llc < %s -mtriple=arm64-apple-ios3.0.0 -aarch64-enable-collect-loh=false | FileCheck %s 2; rdar://13452552 3; Disable the collecting of LOH so that the labels do not get in the 4; way of the NEXT patterns. 5target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128" 6 7@block = common global i8* null, align 8 8 9define zeroext i8 @fullGtU(i32 %i1, i32 %i2) { 10; CHECK: fullGtU 11; CHECK: adrp [[PAGE:x[0-9]+]], _block@GOTPAGE 12; CHECK: ldr [[ADDR:x[0-9]+]], {{\[}}[[PAGE]], _block@GOTPAGEOFF] 13; CHECK: sxtw [[I1:x[0-9]+]], w0 14; CHECK: sxtw [[I2:x[0-9]+]], w1 15; CHECK-NEXT: ldr [[BLOCKBASE:x[0-9]+]], {{\[}}[[ADDR]]] 16; CHECK-NEXT: ldrb [[BLOCKVAL1:w[0-9]+]], {{\[}}[[BLOCKBASE]], [[I1]]] 17; CHECK-NEXT: ldrb [[BLOCKVAL2:w[0-9]+]], {{\[}}[[BLOCKBASE]], [[I2]]] 18 19; CHECK-NEXT: cmp [[BLOCKVAL1]], [[BLOCKVAL2]] 20; CHECK-NEXT: b.ne 21; Next BB 22; CHECK: add [[BLOCKBASE1:x[0-9]+]], [[I1]], [[BLOCKBASE]] 23; CHECK-NEXT: add [[BLOCKBASE2:x[0-9]+]], [[I2]], [[BLOCKBASE]] 24; CHECK-NEXT: ldrb [[LOADEDVAL1:w[0-9]+]], {{\[}}[[BLOCKBASE1]], #1] 25; CHECK-NEXT: ldrb [[LOADEDVAL2:w[0-9]+]], {{\[}}[[BLOCKBASE2]], #1] 26; CHECK-NEXT: cmp [[LOADEDVAL1]], [[LOADEDVAL2]] 27; CHECK-NEXT: b.ne 28; Next BB 29; CHECK: ldrb [[LOADEDVAL3:w[0-9]+]], {{\[}}[[BLOCKBASE1]], #2] 30; CHECK-NEXT: ldrb [[LOADEDVAL4:w[0-9]+]], {{\[}}[[BLOCKBASE2]], #2] 31; CHECK-NEXT: cmp [[LOADEDVAL3]], [[LOADEDVAL4]] 32entry: 33 %idxprom = sext i32 %i1 to i64 34 %tmp = load i8*, i8** @block, align 8 35 %arrayidx = getelementptr inbounds i8, i8* %tmp, i64 %idxprom 36 %tmp1 = load i8, i8* %arrayidx, align 1 37 %idxprom1 = sext i32 %i2 to i64 38 %arrayidx2 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom1 39 %tmp2 = load i8, i8* %arrayidx2, align 1 40 %cmp = icmp eq i8 %tmp1, %tmp2 41 br i1 %cmp, label %if.end, label %if.then 42 43if.then: ; preds = %entry 44 %cmp7 = icmp ugt i8 %tmp1, %tmp2 45 %conv9 = zext i1 %cmp7 to i8 46 br label %return 47 48if.end: ; preds = %entry 49 %inc = add nsw i32 %i1, 1 50 %inc10 = add nsw i32 %i2, 1 51 %idxprom11 = sext i32 %inc to i64 52 %arrayidx12 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom11 53 %tmp3 = load i8, i8* %arrayidx12, align 1 54 %idxprom13 = sext i32 %inc10 to i64 55 %arrayidx14 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom13 56 %tmp4 = load i8, i8* %arrayidx14, align 1 57 %cmp17 = icmp eq i8 %tmp3, %tmp4 58 br i1 %cmp17, label %if.end25, label %if.then19 59 60if.then19: ; preds = %if.end 61 %cmp22 = icmp ugt i8 %tmp3, %tmp4 62 %conv24 = zext i1 %cmp22 to i8 63 br label %return 64 65if.end25: ; preds = %if.end 66 %inc26 = add nsw i32 %i1, 2 67 %inc27 = add nsw i32 %i2, 2 68 %idxprom28 = sext i32 %inc26 to i64 69 %arrayidx29 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom28 70 %tmp5 = load i8, i8* %arrayidx29, align 1 71 %idxprom30 = sext i32 %inc27 to i64 72 %arrayidx31 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom30 73 %tmp6 = load i8, i8* %arrayidx31, align 1 74 %cmp34 = icmp eq i8 %tmp5, %tmp6 75 br i1 %cmp34, label %return, label %if.then36 76 77if.then36: ; preds = %if.end25 78 %cmp39 = icmp ugt i8 %tmp5, %tmp6 79 %conv41 = zext i1 %cmp39 to i8 80 br label %return 81 82return: ; preds = %if.then36, %if.end25, %if.then19, %if.then 83 %retval.0 = phi i8 [ %conv9, %if.then ], [ %conv24, %if.then19 ], [ %conv41, %if.then36 ], [ 0, %if.end25 ] 84 ret i8 %retval.0 85} 86