1; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
2
3define <8 x i8> @vuzpi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
4;CHECK-LABEL: vuzpi8:
5;CHECK: uzp1.8b
6;CHECK: uzp2.8b
7;CHECK-NEXT: add.8b
8	%tmp1 = load <8 x i8>, <8 x i8>* %A
9	%tmp2 = load <8 x i8>, <8 x i8>* %B
10	%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
11	%tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
12        %tmp5 = add <8 x i8> %tmp3, %tmp4
13	ret <8 x i8> %tmp5
14}
15
16define <4 x i16> @vuzpi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
17;CHECK-LABEL: vuzpi16:
18;CHECK: uzp1.4h
19;CHECK: uzp2.4h
20;CHECK-NEXT: add.4h
21	%tmp1 = load <4 x i16>, <4 x i16>* %A
22	%tmp2 = load <4 x i16>, <4 x i16>* %B
23	%tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
24	%tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
25        %tmp5 = add <4 x i16> %tmp3, %tmp4
26	ret <4 x i16> %tmp5
27}
28
29define <16 x i8> @vuzpQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
30;CHECK-LABEL: vuzpQi8:
31;CHECK: uzp1.16b
32;CHECK: uzp2.16b
33;CHECK-NEXT: add.16b
34	%tmp1 = load <16 x i8>, <16 x i8>* %A
35	%tmp2 = load <16 x i8>, <16 x i8>* %B
36	%tmp3 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
37	%tmp4 = shufflevector <16 x i8> %tmp1, <16 x i8> %tmp2, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
38        %tmp5 = add <16 x i8> %tmp3, %tmp4
39	ret <16 x i8> %tmp5
40}
41
42define <8 x i16> @vuzpQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
43;CHECK-LABEL: vuzpQi16:
44;CHECK: uzp1.8h
45;CHECK: uzp2.8h
46;CHECK-NEXT: add.8h
47	%tmp1 = load <8 x i16>, <8 x i16>* %A
48	%tmp2 = load <8 x i16>, <8 x i16>* %B
49	%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
50	%tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
51        %tmp5 = add <8 x i16> %tmp3, %tmp4
52	ret <8 x i16> %tmp5
53}
54
55define <4 x i32> @vuzpQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
56;CHECK-LABEL: vuzpQi32:
57;CHECK: uzp1.4s
58;CHECK: uzp2.4s
59;CHECK-NEXT: add.4s
60	%tmp1 = load <4 x i32>, <4 x i32>* %A
61	%tmp2 = load <4 x i32>, <4 x i32>* %B
62	%tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
63	%tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
64        %tmp5 = add <4 x i32> %tmp3, %tmp4
65	ret <4 x i32> %tmp5
66}
67
68define <4 x float> @vuzpQf(<4 x float>* %A, <4 x float>* %B) nounwind {
69;CHECK-LABEL: vuzpQf:
70;CHECK: uzp1.4s
71;CHECK: uzp2.4s
72;CHECK-NEXT: fadd.4s
73	%tmp1 = load <4 x float>, <4 x float>* %A
74	%tmp2 = load <4 x float>, <4 x float>* %B
75	%tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
76	%tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
77        %tmp5 = fadd <4 x float> %tmp3, %tmp4
78	ret <4 x float> %tmp5
79}
80
81; Undef shuffle indices should not prevent matching to VUZP:
82
83define <8 x i8> @vuzpi8_undef(<8 x i8>* %A, <8 x i8>* %B) nounwind {
84;CHECK-LABEL: vuzpi8_undef:
85;CHECK: uzp1.8b
86;CHECK: uzp2.8b
87;CHECK-NEXT: add.8b
88	%tmp1 = load <8 x i8>, <8 x i8>* %A
89	%tmp2 = load <8 x i8>, <8 x i8>* %B
90	%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 8, i32 10, i32 12, i32 14>
91	%tmp4 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 undef, i32 undef, i32 13, i32 15>
92        %tmp5 = add <8 x i8> %tmp3, %tmp4
93	ret <8 x i8> %tmp5
94}
95
96define <8 x i16> @vuzpQi16_undef(<8 x i16>* %A, <8 x i16>* %B) nounwind {
97;CHECK-LABEL: vuzpQi16_undef:
98;CHECK: uzp1.8h
99;CHECK: uzp2.8h
100;CHECK-NEXT: add.8h
101	%tmp1 = load <8 x i16>, <8 x i16>* %A
102	%tmp2 = load <8 x i16>, <8 x i16>* %B
103	%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 undef, i32 4, i32 undef, i32 8, i32 10, i32 12, i32 14>
104	%tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 undef, i32 undef, i32 11, i32 13, i32 15>
105        %tmp5 = add <8 x i16> %tmp3, %tmp4
106	ret <8 x i16> %tmp5
107}
108