1; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=-zcz | FileCheck %s -check-prefixes=ALL,NONEGP,NONEFP 2; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP 3; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz -mattr=+fullfp16 | FileCheck %s -check-prefixes=ALL,ZEROGP,ZERO16 4; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-gp | FileCheck %s -check-prefixes=ALL,ZEROGP,NONEFP 5; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+zcz-fp | FileCheck %s -check-prefixes=ALL,NONEGP,ZEROFP 6; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s -check-prefixes=ALL,ZEROGP,NONEFP 7; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=apple-a10 | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP 8; RUN: llc < %s -mtriple=arm64-apple-ios -mcpu=cyclone -mattr=+fullfp16 | FileCheck %s -check-prefixes=ALL,ZEROGP,NONE16 9; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=exynos-m3 | FileCheck %s -check-prefixes=ALL,NONEGP,ZEROFP 10; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=kryo | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP 11; RUN: llc < %s -mtriple=aarch64-linux-gnu -mcpu=falkor | FileCheck %s -check-prefixes=ALL,ZEROGP,ZEROFP 12 13declare void @bar(half, float, double, <2 x double>) 14declare void @bari(i32, i32) 15declare void @barl(i64, i64) 16declare void @barf(float, float) 17 18define void @t1() nounwind ssp { 19entry: 20; ALL-LABEL: t1: 21; ALL-NOT: fmov 22; NONEFP: ldr h0,{{.*}} 23; NONEFP: fmov s1, wzr 24; NONEFP: fmov d2, xzr 25; NONEFP: movi{{(.16b)?}} v3{{(.2d)?}}, #0 26; NONE16: fmov h0, wzr 27; NONE16: fmov s1, wzr 28; NONE16: fmov d2, xzr 29; NONE16: movi{{(.16b)?}} v3{{(.2d)?}}, #0 30; ZEROFP: ldr h0,{{.*}} 31; ZEROFP: movi v{{[0-3]+}}.2d, #0 32; ZEROFP: movi v{{[0-3]+}}.2d, #0 33; ZEROFP: movi v{{[0-3]+}}.2d, #0 34; ZERO16: movi v{{[0-3]+}}.2d, #0 35; ZERO16: movi v{{[0-3]+}}.2d, #0 36; ZERO16: movi v{{[0-3]+}}.2d, #0 37; ZERO16: movi v{{[0-3]+}}.2d, #0 38 tail call void @bar(half 0.000000e+00, float 0.000000e+00, double 0.000000e+00, <2 x double> <double 0.000000e+00, double 0.000000e+00>) nounwind 39 ret void 40} 41 42define void @t2() nounwind ssp { 43entry: 44; ALL-LABEL: t2: 45; NONEGP: mov w0, wzr 46; NONEGP: mov w1, wzr 47; ZEROGP: mov w0, #0 48; ZEROGP: mov w1, #0 49 tail call void @bari(i32 0, i32 0) nounwind 50 ret void 51} 52 53define void @t3() nounwind ssp { 54entry: 55; ALL-LABEL: t3: 56; NONEGP: mov x0, xzr 57; NONEGP: mov x1, xzr 58; ZEROGP: mov x0, #0 59; ZEROGP: mov x1, #0 60 tail call void @barl(i64 0, i64 0) nounwind 61 ret void 62} 63 64define void @t4() nounwind ssp { 65; ALL-LABEL: t4: 66; NONEFP: fmov s{{[0-3]+}}, wzr 67; NONEFP: fmov s{{[0-3]+}}, wzr 68; ZEROFP: movi v{{[0-3]+}}.2d, #0 69; ZEROFP: movi v{{[0-3]+}}.2d, #0 70 tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind 71 ret void 72} 73 74declare double @sin(double) 75 76; We used to produce spills+reloads for a Q register with zero cycle zeroing 77; enabled. 78; ALL-LABEL: foo: 79; ALL-NOT: str q{{[0-9]+}} 80; ALL-NOT: ldr q{{[0-9]+}} 81define double @foo(i32 %n) { 82entry: 83 br label %for.body 84 85for.body: 86 %phi0 = phi double [ 1.0, %entry ], [ %v0, %for.body ] 87 %i.076 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 88 %conv21 = sitofp i32 %i.076 to double 89 %call = tail call fast double @sin(double %conv21) 90 %cmp.i = fcmp fast olt double %phi0, %call 91 %v0 = select i1 %cmp.i, double %call, double %phi0 92 %inc = add nuw nsw i32 %i.076, 1 93 %cmp = icmp slt i32 %inc, %n 94 br i1 %cmp, label %for.body, label %for.end 95 96for.end: 97 ret double %v0 98} 99 100define <2 x i64> @t6() { 101; ALL-LABEL: t6: 102; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 103 ret <2 x i64> zeroinitializer 104} 105 106define i1 @ti1() { 107entry: 108; ALL-LABEL: ti1: 109; NONEGP: mov w0, wzr 110; ZEROGP: mov w0, #0 111 ret i1 false 112} 113 114define i8 @ti8() { 115entry: 116; ALL-LABEL: ti8: 117; NONEGP: mov w0, wzr 118; ZEROGP: mov w0, #0 119 ret i8 0 120} 121 122define i16 @ti16() { 123entry: 124; ALL-LABEL: ti16: 125; NONEGP: mov w0, wzr 126 ; ZEROGP: mov w0, #0 127 ret i16 0 128} 129 130define i32 @ti32() { 131entry: 132; ALL-LABEL: ti32: 133; NONEGP: mov w0, wzr 134; ZEROGP: mov w0, #0 135 ret i32 0 136} 137 138define i64 @ti64() { 139entry: 140; ALL-LABEL: ti64: 141; NONEGP: mov x0, xzr 142; ZEROGP: mov x0, #0 143 ret i64 0 144} 145 146define float @tf32() { 147entry: 148; ALL-LABEL: tf32: 149; NONEFP: mov s0, wzr 150; ZEROFP: movi v0.2d, #0 151 ret float 0.0 152} 153 154define double @td64() { 155entry: 156; ALL-LABEL: td64: 157; NONEFP: mov d0, xzr 158; ZEROFP: movi v0.2d, #0 159 ret double 0.0 160} 161 162define <8 x i8> @tv8i8() { 163entry: 164; ALL-LABEL: tv8i8: 165; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 166 ret <8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> 167} 168 169define <4 x i16> @tv4i16() { 170entry: 171; ALL-LABEL: tv4i16: 172; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 173 ret <4 x i16> <i16 0, i16 0, i16 0, i16 0> 174} 175 176define <2 x i32> @tv2i32() { 177entry: 178; ALL-LABEL: tv2i32: 179; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 180 ret <2 x i32> <i32 0, i32 0> 181} 182 183define <2 x float> @tv2f32() { 184entry: 185; ALL-LABEL: tv2f32: 186; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 187 ret <2 x float> <float 0.0, float 0.0> 188} 189 190define <16 x i8> @tv16i8() { 191entry: 192; ALL-LABEL: tv16i8: 193; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 194 ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> 195} 196 197define <8 x i16> @tv8i16() { 198entry: 199; ALL-LABEL: tv8i16: 200; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 201 ret <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0> 202} 203 204define <4 x i32> @tv4i32() { 205entry: 206; ALL-LABEL: tv4i32: 207; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 208 ret <4 x i32> <i32 0, i32 0, i32 0, i32 0> 209} 210 211define <2 x i64> @tv2i64() { 212entry: 213; ALL-LABEL: tv2i64: 214; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 215 ret <2 x i64> <i64 0, i64 0> 216} 217 218define <4 x float> @tv4f32() { 219entry: 220; ALL-LABEL: tv4f32: 221; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 222 ret <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0> 223} 224 225define <2 x double> @tv2d64() { 226entry: 227; ALL-LABEL: tv2d64: 228; ALL: movi{{(.16b)?}} v0{{(.2d)?}}, #0 229 ret <2 x double> <double 0.0, double 0.0> 230} 231 232