1; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -verify-machineinstrs < %s | FileCheck %s
2
3; CHECK-LABEL: f_XX:
4; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
5; CHECK: [[BB]]:
6; CHECK-NOT: mov x[[REG]], xzr
7define i64 @f_XX(i64 %n, i64* nocapture readonly %P) {
8entry:
9  %tobool = icmp eq i64 %n, 0
10  br i1 %tobool, label %if.end, label %if.then
11
12if.then:                                          ; preds = %entry
13  %0 = load i64, i64* %P
14  br label %if.end
15
16if.end:                                           ; preds = %entry, %if.then
17  %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
18  ret i64 %a.0
19}
20
21; CHECK-LABEL: f_WW:
22; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
23; CHECK: [[BB]]:
24; CHECK-NOT: mov w[[REG]], wzr
25define i32 @f_WW(i32 %n, i32* nocapture readonly %P) {
26entry:
27  %tobool = icmp eq i32 %n, 0
28  br i1 %tobool, label %if.end, label %if.then
29
30if.then:                                          ; preds = %entry
31  %0 = load i32, i32* %P
32  br label %if.end
33
34if.end:                                           ; preds = %entry, %if.then
35  %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
36  ret i32 %a.0
37}
38
39; CHECK-LABEL: f_XW:
40; CHECK: cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
41; CHECK: [[BB]]:
42; CHECK-NOT: mov w[[REG]], wzr
43define i32 @f_XW(i64 %n, i32* nocapture readonly %P) {
44entry:
45  %tobool = icmp eq i64 %n, 0
46  br i1 %tobool, label %if.end, label %if.then
47
48if.then:                                          ; preds = %entry
49  %0 = load i32, i32* %P
50  br label %if.end
51
52if.end:                                           ; preds = %entry, %if.then
53  %a.0 = phi i32 [ %0, %if.then ], [ 0, %entry ]
54  ret i32 %a.0
55}
56
57; CHECK-LABEL: f_WX:
58; CHECK: cbz w[[REG:[0-9]+]], [[BB:.LBB.*]]
59; CHECK: [[BB]]:
60; CHECK: mov x[[REG]], xzr
61; Do not remove the mov in this case because we do not know if the upper bits
62; of the X register are zero.
63define i64 @f_WX(i32 %n, i64* nocapture readonly %P) {
64entry:
65  %tobool = icmp eq i32 %n, 0
66  br i1 %tobool, label %if.end, label %if.then
67
68if.then:                                          ; preds = %entry
69  %0 = load i64, i64* %P
70  br label %if.end
71
72if.end:                                           ; preds = %entry, %if.then
73  %a.0 = phi i64 [ %0, %if.then ], [ 0, %entry ]
74  ret i64 %a.0
75}
76
77; CHECK-LABEL: test_superreg:
78; CHECK:     cbz x[[REG:[0-9]+]], [[BB:.LBB.*]]
79; CHECK: [[BB]]:
80; CHECK:     str x[[REG]], [x1]
81; CHECK-NOT: mov w[[REG]], wzr
82; Because we returned w0 but x0 was marked live-in to the block, we didn't
83; remove the <kill> on the str leading to a verification failure.
84define i32 @test_superreg(i64 %in, i64* %dest) {
85  %tst = icmp eq i64 %in, 0
86  br i1 %tst, label %true, label %false
87
88false:
89  ret i32 42
90
91true:
92  store volatile i64 %in, i64* %dest
93  ret i32 0
94}
95