1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
3
4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
5; WARN-NOT: warning
6
7;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
8;;                             Signed Comparisons                             ;;
9;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
10
11;
12; CMPEQ
13;
14
15define <vscale x 16 x i1> @ir_cmpeq_b(<vscale x 16 x i8> %a) {
16; CHECK-LABEL: ir_cmpeq_b
17; CHECK: cmpeq p0.b, p0/z, z0.b, #4
18; CHECK-NEXT: ret
19  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
20  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
21  %out = icmp eq <vscale x 16 x i8> %a, %splat
22  ret <vscale x 16 x i1> %out
23}
24
25define <vscale x 16 x i1> @int_cmpeq_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
26; CHECK-LABEL: int_cmpeq_b
27; CHECK: cmpeq p0.b, p0/z, z0.b, #4
28; CHECK-NEXT: ret
29  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
30  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
31  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.nxv16i8(<vscale x 16 x i1> %pg,
32                                                                 <vscale x 16 x i8> %a,
33                                                                 <vscale x 16 x i8> %splat)
34  ret <vscale x 16 x i1> %out
35}
36
37define <vscale x 16 x i1> @wide_cmpeq_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
38; CHECK-LABEL: wide_cmpeq_b
39; CHECK: cmpeq p0.b, p0/z, z0.b, #4
40; CHECK-NEXT: ret
41  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
42  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
43  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv16i8(<vscale x 16 x i1> %pg,
44                                                                      <vscale x 16 x i8> %a,
45                                                                      <vscale x 2 x i64> %splat)
46  ret <vscale x 16 x i1> %out
47}
48
49define <vscale x 8 x i1> @ir_cmpeq_h(<vscale x 8 x i16> %a) {
50; CHECK-LABEL: ir_cmpeq_h
51; CHECK: cmpeq p0.h, p0/z, z0.h, #-16
52; CHECK-NEXT: ret
53  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
54  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
55  %out = icmp eq <vscale x 8 x i16> %a, %splat
56  ret <vscale x 8 x i1> %out
57}
58
59define <vscale x 8 x i1> @int_cmpeq_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
60; CHECK-LABEL: int_cmpeq_h
61; CHECK: cmpeq p0.h, p0/z, z0.h, #-16
62; CHECK-NEXT: ret
63  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
64  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
65  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpeq.nxv8i16(<vscale x 8 x i1> %pg,
66                                                                <vscale x 8 x i16> %a,
67                                                                <vscale x 8 x i16> %splat)
68  ret <vscale x 8 x i1> %out
69}
70
71define <vscale x 8 x i1> @wide_cmpeq_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
72; CHECK-LABEL: wide_cmpeq_h
73; CHECK: cmpeq p0.h, p0/z, z0.h, #-16
74; CHECK-NEXT: ret
75  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
76  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
77  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv8i16(<vscale x 8 x i1> %pg,
78                                                                     <vscale x 8 x i16> %a,
79                                                                     <vscale x 2 x i64> %splat)
80  ret <vscale x 8 x i1> %out
81}
82
83define <vscale x 4 x i1> @ir_cmpeq_s(<vscale x 4 x i32> %a) {
84; CHECK-LABEL: ir_cmpeq_s
85; CHECK: cmpeq p0.s, p0/z, z0.s, #15
86; CHECK-NEXT: ret
87  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
88  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
89  %out = icmp eq <vscale x 4 x i32> %a, %splat
90  ret <vscale x 4 x i1> %out
91}
92
93define <vscale x 4 x i1> @int_cmpeq_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
94; CHECK-LABEL: int_cmpeq_s
95; CHECK: cmpeq p0.s, p0/z, z0.s, #15
96; CHECK-NEXT: ret
97  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
98  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
99  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpeq.nxv4i32(<vscale x 4 x i1> %pg,
100                                                                <vscale x 4 x i32> %a,
101                                                                <vscale x 4 x i32> %splat)
102  ret <vscale x 4 x i1> %out
103}
104
105define <vscale x 4 x i1> @wide_cmpeq_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
106; CHECK-LABEL: wide_cmpeq_s
107; CHECK: cmpeq p0.s, p0/z, z0.s, #15
108; CHECK-NEXT: ret
109  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
110  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
111  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv4i32(<vscale x 4 x i1> %pg,
112                                                                     <vscale x 4 x i32> %a,
113                                                                     <vscale x 2 x i64> %splat)
114  ret <vscale x 4 x i1> %out
115}
116
117define <vscale x 2 x i1> @ir_cmpeq_d(<vscale x 2 x i64> %a) {
118; CHECK-LABEL: ir_cmpeq_d
119; CHECK: cmpeq p0.d, p0/z, z0.d, #0
120; CHECK-NEXT: ret
121  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
122  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
123  %out = icmp eq <vscale x 2 x i64> %a, %splat
124  ret <vscale x 2 x i1> %out
125}
126
127define <vscale x 2 x i1> @int_cmpeq_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
128; CHECK-LABEL: int_cmpeq_d
129; CHECK: cmpeq p0.d, p0/z, z0.d, #0
130; CHECK-NEXT: ret
131  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
132  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
133  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpeq.nxv2i64(<vscale x 2 x i1> %pg,
134                                                                <vscale x 2 x i64> %a,
135                                                                <vscale x 2 x i64> %splat)
136  ret <vscale x 2 x i1> %out
137}
138
139;
140; CMPGE
141;
142
143define <vscale x 16 x i1> @ir_cmpge_b(<vscale x 16 x i8> %a) {
144; CHECK-LABEL: ir_cmpge_b
145; CHECK: cmpge p0.b, p0/z, z0.b, #4
146; CHECK-NEXT: ret
147  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
148  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
149  %out = icmp sge <vscale x 16 x i8> %a, %splat
150  ret <vscale x 16 x i1> %out
151}
152
153define <vscale x 16 x i1> @int_cmpge_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
154; CHECK-LABEL: int_cmpge_b
155; CHECK: cmpge p0.b, p0/z, z0.b, #4
156; CHECK-NEXT: ret
157  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
158  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
159  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpge.nxv16i8(<vscale x 16 x i1> %pg,
160                                                                 <vscale x 16 x i8> %a,
161                                                                 <vscale x 16 x i8> %splat)
162  ret <vscale x 16 x i1> %out
163}
164
165define <vscale x 16 x i1> @wide_cmpge_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
166; CHECK-LABEL: wide_cmpge_b
167; CHECK: cmpge p0.b, p0/z, z0.b, #4
168; CHECK-NEXT: ret
169  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
170  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
171  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpge.wide.nxv16i8(<vscale x 16 x i1> %pg,
172                                                                      <vscale x 16 x i8> %a,
173                                                                      <vscale x 2 x i64> %splat)
174  ret <vscale x 16 x i1> %out
175}
176
177define <vscale x 8 x i1> @ir_cmpge_h(<vscale x 8 x i16> %a) {
178; CHECK-LABEL: ir_cmpge_h
179; CHECK: cmpge p0.h, p0/z, z0.h, #-16
180; CHECK-NEXT: ret
181  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
182  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
183  %out = icmp sge <vscale x 8 x i16> %a, %splat
184  ret <vscale x 8 x i1> %out
185}
186
187define <vscale x 8 x i1> @int_cmpge_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
188; CHECK-LABEL: int_cmpge_h
189; CHECK: cmpge p0.h, p0/z, z0.h, #-16
190; CHECK-NEXT: ret
191  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
192  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
193  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpge.nxv8i16(<vscale x 8 x i1> %pg,
194                                                                <vscale x 8 x i16> %a,
195                                                                <vscale x 8 x i16> %splat)
196  ret <vscale x 8 x i1> %out
197}
198
199define <vscale x 8 x i1> @wide_cmpge_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
200; CHECK-LABEL: wide_cmpge_h
201; CHECK: cmpge p0.h, p0/z, z0.h, #-16
202; CHECK-NEXT: ret
203  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
204  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
205  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpge.wide.nxv8i16(<vscale x 8 x i1> %pg,
206                                                                     <vscale x 8 x i16> %a,
207                                                                     <vscale x 2 x i64> %splat)
208  ret <vscale x 8 x i1> %out
209}
210
211define <vscale x 4 x i1> @ir_cmpge_s(<vscale x 4 x i32> %a) {
212; CHECK-LABEL: ir_cmpge_s
213; CHECK: cmpge p0.s, p0/z, z0.s, #15
214; CHECK-NEXT: ret
215  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
216  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
217  %out = icmp sge <vscale x 4 x i32> %a, %splat
218  ret <vscale x 4 x i1> %out
219}
220
221define <vscale x 4 x i1> @int_cmpge_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
222; CHECK-LABEL: int_cmpge_s
223; CHECK: cmpge p0.s, p0/z, z0.s, #15
224; CHECK-NEXT: ret
225  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
226  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
227  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpge.nxv4i32(<vscale x 4 x i1> %pg,
228                                                                <vscale x 4 x i32> %a,
229                                                                <vscale x 4 x i32> %splat)
230  ret <vscale x 4 x i1> %out
231}
232
233define <vscale x 4 x i1> @wide_cmpge_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
234; CHECK-LABEL: wide_cmpge_s
235; CHECK: cmpge p0.s, p0/z, z0.s, #15
236; CHECK-NEXT: ret
237  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
238  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
239  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpge.wide.nxv4i32(<vscale x 4 x i1> %pg,
240                                                                     <vscale x 4 x i32> %a,
241                                                                     <vscale x 2 x i64> %splat)
242  ret <vscale x 4 x i1> %out
243}
244
245define <vscale x 2 x i1> @ir_cmpge_d(<vscale x 2 x i64> %a) {
246; CHECK-LABEL: ir_cmpge_d
247; CHECK: cmpge p0.d, p0/z, z0.d, #0
248; CHECK-NEXT: ret
249  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
250  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
251  %out = icmp sge <vscale x 2 x i64> %a, %splat
252  ret <vscale x 2 x i1> %out
253}
254
255define <vscale x 2 x i1> @int_cmpge_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
256; CHECK-LABEL: int_cmpge_d
257; CHECK: cmpge p0.d, p0/z, z0.d, #0
258; CHECK-NEXT: ret
259  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
260  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
261  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpge.nxv2i64(<vscale x 2 x i1> %pg,
262                                                                <vscale x 2 x i64> %a,
263                                                                <vscale x 2 x i64> %splat)
264  ret <vscale x 2 x i1> %out
265}
266
267;
268; CMPGT
269;
270
271define <vscale x 16 x i1> @ir_cmpgt_b(<vscale x 16 x i8> %a) {
272; CHECK-LABEL: ir_cmpgt_b
273; CHECK: cmpgt p0.b, p0/z, z0.b, #4
274; CHECK-NEXT: ret
275  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
276  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
277  %out = icmp sgt <vscale x 16 x i8> %a, %splat
278  ret <vscale x 16 x i1> %out
279}
280
281define <vscale x 16 x i1> @int_cmpgt_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
282; CHECK-LABEL: int_cmpgt_b
283; CHECK: cmpgt p0.b, p0/z, z0.b, #4
284; CHECK-NEXT: ret
285  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
286  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
287  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpgt.nxv16i8(<vscale x 16 x i1> %pg,
288                                                                 <vscale x 16 x i8> %a,
289                                                                 <vscale x 16 x i8> %splat)
290  ret <vscale x 16 x i1> %out
291}
292
293define <vscale x 16 x i1> @wide_cmpgt_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
294; CHECK-LABEL: wide_cmpgt_b
295; CHECK: cmpgt p0.b, p0/z, z0.b, #4
296; CHECK-NEXT: ret
297  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
298  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
299  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv16i8(<vscale x 16 x i1> %pg,
300                                                                      <vscale x 16 x i8> %a,
301                                                                      <vscale x 2 x i64> %splat)
302  ret <vscale x 16 x i1> %out
303}
304
305define <vscale x 8 x i1> @ir_cmpgt_h(<vscale x 8 x i16> %a) {
306; CHECK-LABEL: ir_cmpgt_h
307; CHECK: cmpgt p0.h, p0/z, z0.h, #-16
308; CHECK-NEXT: ret
309  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
310  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
311  %out = icmp sgt <vscale x 8 x i16> %a, %splat
312  ret <vscale x 8 x i1> %out
313}
314
315define <vscale x 8 x i1> @int_cmpgt_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
316; CHECK-LABEL: int_cmpgt_h
317; CHECK: cmpgt p0.h, p0/z, z0.h, #-16
318; CHECK-NEXT: ret
319  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
320  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
321  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpgt.nxv8i16(<vscale x 8 x i1> %pg,
322                                                                <vscale x 8 x i16> %a,
323                                                                <vscale x 8 x i16> %splat)
324  ret <vscale x 8 x i1> %out
325}
326
327define <vscale x 8 x i1> @wide_cmpgt_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
328; CHECK-LABEL: wide_cmpgt_h
329; CHECK: cmpgt p0.h, p0/z, z0.h, #-16
330; CHECK-NEXT: ret
331  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
332  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
333  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv8i16(<vscale x 8 x i1> %pg,
334                                                                     <vscale x 8 x i16> %a,
335                                                                     <vscale x 2 x i64> %splat)
336  ret <vscale x 8 x i1> %out
337}
338
339define <vscale x 4 x i1> @ir_cmpgt_s(<vscale x 4 x i32> %a) {
340; CHECK-LABEL: ir_cmpgt_s
341; CHECK: cmpgt p0.s, p0/z, z0.s, #15
342; CHECK-NEXT: ret
343  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
344  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
345  %out = icmp sgt <vscale x 4 x i32> %a, %splat
346  ret <vscale x 4 x i1> %out
347}
348
349define <vscale x 4 x i1> @int_cmpgt_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
350; CHECK-LABEL: int_cmpgt_s
351; CHECK: cmpgt p0.s, p0/z, z0.s, #15
352; CHECK-NEXT: ret
353  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
354  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
355  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpgt.nxv4i32(<vscale x 4 x i1> %pg,
356                                                                <vscale x 4 x i32> %a,
357                                                                <vscale x 4 x i32> %splat)
358  ret <vscale x 4 x i1> %out
359}
360
361define <vscale x 4 x i1> @wide_cmpgt_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
362; CHECK-LABEL: wide_cmpgt_s
363; CHECK: cmpgt p0.s, p0/z, z0.s, #15
364; CHECK-NEXT: ret
365  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
366  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
367  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv4i32(<vscale x 4 x i1> %pg,
368                                                                     <vscale x 4 x i32> %a,
369                                                                     <vscale x 2 x i64> %splat)
370  ret <vscale x 4 x i1> %out
371}
372
373define <vscale x 2 x i1> @ir_cmpgt_d(<vscale x 2 x i64> %a) {
374; CHECK-LABEL: ir_cmpgt_d
375; CHECK: cmpgt p0.d, p0/z, z0.d, #0
376; CHECK-NEXT: ret
377  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
378  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
379  %out = icmp sgt <vscale x 2 x i64> %a, %splat
380  ret <vscale x 2 x i1> %out
381}
382
383define <vscale x 2 x i1> @int_cmpgt_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
384; CHECK-LABEL: int_cmpgt_d
385; CHECK: cmpgt p0.d, p0/z, z0.d, #0
386; CHECK-NEXT: ret
387  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
388  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
389  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpgt.nxv2i64(<vscale x 2 x i1> %pg,
390                                                                <vscale x 2 x i64> %a,
391                                                                <vscale x 2 x i64> %splat)
392  ret <vscale x 2 x i1> %out
393}
394
395;
396; CMPLE
397;
398
399define <vscale x 16 x i1> @ir_cmple_b(<vscale x 16 x i8> %a) {
400; CHECK-LABEL: ir_cmple_b
401; CHECK: cmple p0.b, p0/z, z0.b, #4
402; CHECK-NEXT: ret
403  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
404  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
405  %out = icmp sle <vscale x 16 x i8> %a, %splat
406  ret <vscale x 16 x i1> %out
407}
408
409define <vscale x 16 x i1> @int_cmple_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
410; CHECK-LABEL: int_cmple_b
411; CHECK: cmple p0.b, p0/z, z0.b, #4
412; CHECK-NEXT: ret
413  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
414  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
415  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpge.nxv16i8(<vscale x 16 x i1> %pg,
416                                                                 <vscale x 16 x i8> %splat,
417                                                                 <vscale x 16 x i8> %a)
418  ret <vscale x 16 x i1> %out
419}
420
421define <vscale x 16 x i1> @wide_cmple_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
422; CHECK-LABEL: wide_cmple_b
423; CHECK: cmple p0.b, p0/z, z0.b, #4
424; CHECK-NEXT: ret
425  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
426  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
427  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmple.wide.nxv16i8(<vscale x 16 x i1> %pg,
428                                                                      <vscale x 16 x i8> %a,
429                                                                      <vscale x 2 x i64> %splat)
430  ret <vscale x 16 x i1> %out
431}
432
433define <vscale x 8 x i1> @ir_cmple_h(<vscale x 8 x i16> %a) {
434; CHECK-LABEL: ir_cmple_h
435; CHECK: cmple p0.h, p0/z, z0.h, #-16
436; CHECK-NEXT: ret
437  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
438  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
439  %out = icmp sle <vscale x 8 x i16> %a, %splat
440  ret <vscale x 8 x i1> %out
441}
442
443define <vscale x 8 x i1> @int_cmple_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
444; CHECK-LABEL: int_cmple_h
445; CHECK: cmple p0.h, p0/z, z0.h, #-16
446; CHECK-NEXT: ret
447  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
448  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
449  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpge.nxv8i16(<vscale x 8 x i1> %pg,
450                                                                <vscale x 8 x i16> %splat,
451                                                                <vscale x 8 x i16> %a)
452  ret <vscale x 8 x i1> %out
453}
454
455define <vscale x 8 x i1> @wide_cmple_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
456; CHECK-LABEL: wide_cmple_h
457; CHECK: cmple p0.h, p0/z, z0.h, #-16
458; CHECK-NEXT: ret
459  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
460  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
461  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmple.wide.nxv8i16(<vscale x 8 x i1> %pg,
462                                                                     <vscale x 8 x i16> %a,
463                                                                     <vscale x 2 x i64> %splat)
464  ret <vscale x 8 x i1> %out
465}
466
467define <vscale x 4 x i1> @ir_cmple_s(<vscale x 4 x i32> %a) {
468; CHECK-LABEL: ir_cmple_s
469; CHECK: cmple p0.s, p0/z, z0.s, #15
470; CHECK-NEXT: ret
471  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
472  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
473  %out = icmp sle <vscale x 4 x i32> %a, %splat
474  ret <vscale x 4 x i1> %out
475}
476
477define <vscale x 4 x i1> @int_cmple_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
478; CHECK-LABEL: int_cmple_s
479; CHECK: cmple p0.s, p0/z, z0.s, #15
480; CHECK-NEXT: ret
481  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
482  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
483  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpge.nxv4i32(<vscale x 4 x i1> %pg,
484                                                                <vscale x 4 x i32> %splat,
485                                                                <vscale x 4 x i32> %a)
486  ret <vscale x 4 x i1> %out
487}
488
489define <vscale x 4 x i1> @wide_cmple_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
490; CHECK-LABEL: wide_cmple_s
491; CHECK: cmple p0.s, p0/z, z0.s, #15
492; CHECK-NEXT: ret
493  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
494  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
495  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmple.wide.nxv4i32(<vscale x 4 x i1> %pg,
496                                                                     <vscale x 4 x i32> %a,
497                                                                     <vscale x 2 x i64> %splat)
498  ret <vscale x 4 x i1> %out
499}
500
501define <vscale x 2 x i1> @ir_cmple_d(<vscale x 2 x i64> %a) {
502; CHECK-LABEL: ir_cmple_d
503; CHECK: cmple p0.d, p0/z, z0.d, #0
504; CHECK-NEXT: ret
505  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
506  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
507  %out = icmp sle <vscale x 2 x i64> %a, %splat
508  ret <vscale x 2 x i1> %out
509}
510
511define <vscale x 2 x i1> @int_cmple_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
512; CHECK-LABEL: int_cmple_d
513; CHECK: cmple p0.d, p0/z, z0.d, #0
514; CHECK-NEXT: ret
515  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
516  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
517  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpge.nxv2i64(<vscale x 2 x i1> %pg,
518                                                                <vscale x 2 x i64> %splat,
519                                                                <vscale x 2 x i64> %a)
520  ret <vscale x 2 x i1> %out
521}
522
523;
524; CMPLT
525;
526
527define <vscale x 16 x i1> @ir_cmplt_b(<vscale x 16 x i8> %a) {
528; CHECK-LABEL: ir_cmplt_b
529; CHECK: cmplt p0.b, p0/z, z0.b, #4
530; CHECK-NEXT: ret
531  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
532  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
533  %out = icmp slt <vscale x 16 x i8> %a, %splat
534  ret <vscale x 16 x i1> %out
535}
536
537define <vscale x 16 x i1> @int_cmplt_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
538; CHECK-LABEL: int_cmplt_b
539; CHECK: cmplt p0.b, p0/z, z0.b, #4
540; CHECK-NEXT: ret
541  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
542  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
543  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpgt.nxv16i8(<vscale x 16 x i1> %pg,
544                                                                 <vscale x 16 x i8> %splat,
545                                                                 <vscale x 16 x i8> %a)
546  ret <vscale x 16 x i1> %out
547}
548
549define <vscale x 16 x i1> @wide_cmplt_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
550; CHECK-LABEL: wide_cmplt_b
551; CHECK: cmplt p0.b, p0/z, z0.b, #4
552; CHECK-NEXT: ret
553  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
554  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
555  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmplt.wide.nxv16i8(<vscale x 16 x i1> %pg,
556                                                                      <vscale x 16 x i8> %a,
557                                                                      <vscale x 2 x i64> %splat)
558  ret <vscale x 16 x i1> %out
559}
560
561define <vscale x 8 x i1> @ir_cmplt_h(<vscale x 8 x i16> %a) {
562; CHECK-LABEL: ir_cmplt_h
563; CHECK: cmplt p0.h, p0/z, z0.h, #-16
564; CHECK-NEXT: ret
565  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
566  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
567  %out = icmp slt <vscale x 8 x i16> %a, %splat
568  ret <vscale x 8 x i1> %out
569}
570
571define <vscale x 8 x i1> @int_cmplt_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
572; CHECK-LABEL: int_cmplt_h
573; CHECK: cmplt p0.h, p0/z, z0.h, #-16
574; CHECK-NEXT: ret
575  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
576  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
577  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpgt.nxv8i16(<vscale x 8 x i1> %pg,
578                                                                <vscale x 8 x i16> %splat,
579                                                                <vscale x 8 x i16> %a)
580  ret <vscale x 8 x i1> %out
581}
582
583define <vscale x 8 x i1> @wide_cmplt_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
584; CHECK-LABEL: wide_cmplt_h
585; CHECK: cmplt p0.h, p0/z, z0.h, #-16
586; CHECK-NEXT: ret
587  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
588  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
589  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmplt.wide.nxv8i16(<vscale x 8 x i1> %pg,
590                                                                     <vscale x 8 x i16> %a,
591                                                                     <vscale x 2 x i64> %splat)
592  ret <vscale x 8 x i1> %out
593}
594
595define <vscale x 4 x i1> @ir_cmplt_s(<vscale x 4 x i32> %a) {
596; CHECK-LABEL: ir_cmplt_s
597; CHECK: cmplt p0.s, p0/z, z0.s, #15
598; CHECK-NEXT: ret
599  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
600  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
601  %out = icmp slt <vscale x 4 x i32> %a, %splat
602  ret <vscale x 4 x i1> %out
603}
604
605define <vscale x 4 x i1> @int_cmplt_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
606; CHECK-LABEL: int_cmplt_s
607; CHECK: cmplt p0.s, p0/z, z0.s, #15
608; CHECK-NEXT: ret
609  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
610  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
611  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpgt.nxv4i32(<vscale x 4 x i1> %pg,
612                                                                <vscale x 4 x i32> %splat,
613                                                                <vscale x 4 x i32> %a)
614  ret <vscale x 4 x i1> %out
615}
616
617define <vscale x 4 x i1> @wide_cmplt_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
618; CHECK-LABEL: wide_cmplt_s
619; CHECK: cmplt p0.s, p0/z, z0.s, #15
620; CHECK-NEXT: ret
621  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
622  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
623  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmplt.wide.nxv4i32(<vscale x 4 x i1> %pg,
624                                                                     <vscale x 4 x i32> %a,
625                                                                     <vscale x 2 x i64> %splat)
626  ret <vscale x 4 x i1> %out
627}
628
629define <vscale x 2 x i1> @ir_cmplt_d(<vscale x 2 x i64> %a) {
630; CHECK-LABEL: ir_cmplt_d
631; CHECK: cmplt p0.d, p0/z, z0.d, #0
632; CHECK-NEXT: ret
633  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
634  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
635  %out = icmp slt <vscale x 2 x i64> %a, %splat
636  ret <vscale x 2 x i1> %out
637}
638
639define <vscale x 2 x i1> @int_cmplt_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
640; CHECK-LABEL: int_cmplt_d
641; CHECK: cmplt p0.d, p0/z, z0.d, #0
642; CHECK-NEXT: ret
643  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
644  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
645  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpgt.nxv2i64(<vscale x 2 x i1> %pg,
646                                                                <vscale x 2 x i64> %splat,
647                                                                <vscale x 2 x i64> %a)
648  ret <vscale x 2 x i1> %out
649}
650
651;
652; CMPNE
653;
654
655define <vscale x 16 x i1> @ir_cmpne_b(<vscale x 16 x i8> %a) {
656; CHECK-LABEL: ir_cmpne_b
657; CHECK: cmpne p0.b, p0/z, z0.b, #4
658; CHECK-NEXT: ret
659  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
660  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
661  %out = icmp ne <vscale x 16 x i8> %a, %splat
662  ret <vscale x 16 x i1> %out
663}
664
665define <vscale x 16 x i1> @int_cmpne_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
666; CHECK-LABEL: int_cmpne_b
667; CHECK: cmpne p0.b, p0/z, z0.b, #4
668; CHECK-NEXT: ret
669  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
670  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
671  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.nxv16i8(<vscale x 16 x i1> %pg,
672                                                                 <vscale x 16 x i8> %a,
673                                                                 <vscale x 16 x i8> %splat)
674  ret <vscale x 16 x i1> %out
675}
676
677define <vscale x 16 x i1> @wide_cmpne_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
678; CHECK-LABEL: wide_cmpne_b
679; CHECK: cmpne p0.b, p0/z, z0.b, #4
680; CHECK-NEXT: ret
681  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
682  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
683  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.wide.nxv16i8(<vscale x 16 x i1> %pg,
684                                                                      <vscale x 16 x i8> %a,
685                                                                      <vscale x 2 x i64> %splat)
686  ret <vscale x 16 x i1> %out
687}
688
689define <vscale x 8 x i1> @ir_cmpne_h(<vscale x 8 x i16> %a) {
690; CHECK-LABEL: ir_cmpne_h
691; CHECK: cmpne p0.h, p0/z, z0.h, #-16
692; CHECK-NEXT: ret
693  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
694  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
695  %out = icmp ne <vscale x 8 x i16> %a, %splat
696  ret <vscale x 8 x i1> %out
697}
698
699define <vscale x 8 x i1> @int_cmpne_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
700; CHECK-LABEL: int_cmpne_h
701; CHECK: cmpne p0.h, p0/z, z0.h, #-16
702; CHECK-NEXT: ret
703  %elt   = insertelement <vscale x 8 x i16> undef, i16 -16, i32 0
704  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
705  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.nxv8i16(<vscale x 8 x i1> %pg,
706                                                                <vscale x 8 x i16> %a,
707                                                                <vscale x 8 x i16> %splat)
708  ret <vscale x 8 x i1> %out
709}
710
711define <vscale x 8 x i1> @wide_cmpne_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
712; CHECK-LABEL: wide_cmpne_h
713; CHECK: cmpne p0.h, p0/z, z0.h, #-16
714; CHECK-NEXT: ret
715  %elt   = insertelement <vscale x 2 x i64> undef, i64 -16, i32 0
716  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
717  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.wide.nxv8i16(<vscale x 8 x i1> %pg,
718                                                                     <vscale x 8 x i16> %a,
719                                                                     <vscale x 2 x i64> %splat)
720  ret <vscale x 8 x i1> %out
721}
722
723define <vscale x 4 x i1> @ir_cmpne_s(<vscale x 4 x i32> %a) {
724; CHECK-LABEL: ir_cmpne_s
725; CHECK: cmpne p0.s, p0/z, z0.s, #15
726; CHECK-NEXT: ret
727  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
728  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
729  %out = icmp ne <vscale x 4 x i32> %a, %splat
730  ret <vscale x 4 x i1> %out
731}
732
733define <vscale x 4 x i1> @int_cmpne_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
734; CHECK-LABEL: int_cmpne_s
735; CHECK: cmpne p0.s, p0/z, z0.s, #15
736; CHECK-NEXT: ret
737  %elt   = insertelement <vscale x 4 x i32> undef, i32 15, i32 0
738  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
739  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1> %pg,
740                                                                <vscale x 4 x i32> %a,
741                                                                <vscale x 4 x i32> %splat)
742  ret <vscale x 4 x i1> %out
743}
744
745define <vscale x 4 x i1> @wide_cmpne_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
746; CHECK-LABEL: wide_cmpne_s
747; CHECK: cmpne p0.s, p0/z, z0.s, #15
748; CHECK-NEXT: ret
749  %elt   = insertelement <vscale x 2 x i64> undef, i64 15, i32 0
750  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
751  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.wide.nxv4i32(<vscale x 4 x i1> %pg,
752                                                                     <vscale x 4 x i32> %a,
753                                                                     <vscale x 2 x i64> %splat)
754  ret <vscale x 4 x i1> %out
755}
756
757define <vscale x 2 x i1> @ir_cmpne_d(<vscale x 2 x i64> %a) {
758; CHECK-LABEL: ir_cmpne_d
759; CHECK: cmpne p0.d, p0/z, z0.d, #0
760; CHECK-NEXT: ret
761  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
762  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
763  %out = icmp ne <vscale x 2 x i64> %a, %splat
764  ret <vscale x 2 x i1> %out
765}
766
767define <vscale x 2 x i1> @int_cmpne_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
768; CHECK-LABEL: int_cmpne_d
769; CHECK: cmpne p0.d, p0/z, z0.d, #0
770; CHECK-NEXT: ret
771  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
772  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
773  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmpne.nxv2i64(<vscale x 2 x i1> %pg,
774                                                                <vscale x 2 x i64> %a,
775                                                                <vscale x 2 x i64> %splat)
776  ret <vscale x 2 x i1> %out
777}
778
779;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
780;;                            Unsigned Comparisons                            ;;
781;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
782
783;
784; CMPHI
785;
786
787define <vscale x 16 x i1> @ir_cmphi_b(<vscale x 16 x i8> %a) {
788; CHECK-LABEL: ir_cmphi_b
789; CHECK: cmphi p0.b, p0/z, z0.b, #4
790; CHECK-NEXT: ret
791  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
792  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
793  %out = icmp ugt <vscale x 16 x i8> %a, %splat
794  ret <vscale x 16 x i1> %out
795}
796
797define <vscale x 16 x i1> @int_cmphi_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
798; CHECK-LABEL: int_cmphi_b
799; CHECK: cmphi p0.b, p0/z, z0.b, #4
800; CHECK-NEXT: ret
801  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
802  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
803  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.nxv16i8(<vscale x 16 x i1> %pg,
804                                                                 <vscale x 16 x i8> %a,
805                                                                 <vscale x 16 x i8> %splat)
806  ret <vscale x 16 x i1> %out
807}
808
809define <vscale x 16 x i1> @wide_cmphi_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
810; CHECK-LABEL: wide_cmphi_b
811; CHECK: cmphi p0.b, p0/z, z0.b, #4
812; CHECK-NEXT: ret
813  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
814  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
815  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.wide.nxv16i8(<vscale x 16 x i1> %pg,
816                                                                      <vscale x 16 x i8> %a,
817                                                                      <vscale x 2 x i64> %splat)
818  ret <vscale x 16 x i1> %out
819}
820
821define <vscale x 8 x i1> @ir_cmphi_h(<vscale x 8 x i16> %a) {
822; CHECK-LABEL: ir_cmphi_h
823; CHECK: cmphi p0.h, p0/z, z0.h, #0
824; CHECK-NEXT: ret
825  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
826  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
827  %out = icmp ugt <vscale x 8 x i16> %a, %splat
828  ret <vscale x 8 x i1> %out
829}
830
831define <vscale x 8 x i1> @int_cmphi_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
832; CHECK-LABEL: int_cmphi_h
833; CHECK: cmphi p0.h, p0/z, z0.h, #0
834; CHECK-NEXT: ret
835  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
836  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
837  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.nxv8i16(<vscale x 8 x i1> %pg,
838                                                                <vscale x 8 x i16> %a,
839                                                                <vscale x 8 x i16> %splat)
840  ret <vscale x 8 x i1> %out
841}
842
843define <vscale x 8 x i1> @wide_cmphi_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
844; CHECK-LABEL: wide_cmphi_h
845; CHECK: cmphi p0.h, p0/z, z0.h, #0
846; CHECK-NEXT: ret
847  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
848  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
849  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.wide.nxv8i16(<vscale x 8 x i1> %pg,
850                                                                     <vscale x 8 x i16> %a,
851                                                                     <vscale x 2 x i64> %splat)
852  ret <vscale x 8 x i1> %out
853}
854
855define <vscale x 4 x i1> @ir_cmphi_s(<vscale x 4 x i32> %a) {
856; CHECK-LABEL: ir_cmphi_s
857; CHECK: cmphi p0.s, p0/z, z0.s, #68
858; CHECK-NEXT: ret
859  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
860  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
861  %out = icmp ugt <vscale x 4 x i32> %a, %splat
862  ret <vscale x 4 x i1> %out
863}
864
865define <vscale x 4 x i1> @int_cmphi_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
866; CHECK-LABEL: int_cmphi_s
867; CHECK: cmphi p0.s, p0/z, z0.s, #68
868; CHECK-NEXT: ret
869  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
870  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
871  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.nxv4i32(<vscale x 4 x i1> %pg,
872                                                                <vscale x 4 x i32> %a,
873                                                                <vscale x 4 x i32> %splat)
874  ret <vscale x 4 x i1> %out
875}
876
877define <vscale x 4 x i1> @wide_cmphi_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
878; CHECK-LABEL: wide_cmphi_s
879; CHECK: cmphi p0.s, p0/z, z0.s, #68
880; CHECK-NEXT: ret
881  %elt   = insertelement <vscale x 2 x i64> undef, i64 68, i32 0
882  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
883  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.wide.nxv4i32(<vscale x 4 x i1> %pg,
884                                                                     <vscale x 4 x i32> %a,
885                                                                     <vscale x 2 x i64> %splat)
886  ret <vscale x 4 x i1> %out
887}
888
889define <vscale x 2 x i1> @ir_cmphi_d(<vscale x 2 x i64> %a) {
890; CHECK-LABEL: ir_cmphi_d
891; CHECK: cmphi p0.d, p0/z, z0.d, #127
892; CHECK-NEXT: ret
893  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
894  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
895  %out = icmp ugt <vscale x 2 x i64> %a, %splat
896  ret <vscale x 2 x i1> %out
897}
898
899define <vscale x 2 x i1> @int_cmphi_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
900; CHECK-LABEL: int_cmphi_d
901; CHECK: cmphi p0.d, p0/z, z0.d, #127
902; CHECK-NEXT: ret
903  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
904  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
905  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmphi.nxv2i64(<vscale x 2 x i1> %pg,
906                                                                <vscale x 2 x i64> %a,
907                                                                <vscale x 2 x i64> %splat)
908  ret <vscale x 2 x i1> %out
909}
910
911;
912; CMPHS
913;
914
915define <vscale x 16 x i1> @ir_cmphs_b(<vscale x 16 x i8> %a) {
916; CHECK-LABEL: ir_cmphs_b
917; CHECK: cmphs p0.b, p0/z, z0.b, #4
918; CHECK-NEXT: ret
919  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
920  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
921  %out = icmp uge <vscale x 16 x i8> %a, %splat
922  ret <vscale x 16 x i1> %out
923}
924
925define <vscale x 16 x i1> @int_cmphs_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
926; CHECK-LABEL: int_cmphs_b
927; CHECK: cmphs p0.b, p0/z, z0.b, #4
928; CHECK-NEXT: ret
929  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
930  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
931  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphs.nxv16i8(<vscale x 16 x i1> %pg,
932                                                                 <vscale x 16 x i8> %a,
933                                                                 <vscale x 16 x i8> %splat)
934  ret <vscale x 16 x i1> %out
935}
936
937define <vscale x 16 x i1> @wide_cmphs_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
938; CHECK-LABEL: wide_cmphs_b
939; CHECK: cmphs p0.b, p0/z, z0.b, #4
940; CHECK-NEXT: ret
941  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
942  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
943  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphs.wide.nxv16i8(<vscale x 16 x i1> %pg,
944                                                                      <vscale x 16 x i8> %a,
945                                                                      <vscale x 2 x i64> %splat)
946  ret <vscale x 16 x i1> %out
947}
948
949define <vscale x 8 x i1> @ir_cmphs_h(<vscale x 8 x i16> %a) {
950; CHECK-LABEL: ir_cmphs_h
951; CHECK: cmphs p0.h, p0/z, z0.h, #0
952; CHECK-NEXT: ret
953  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
954  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
955  %out = icmp uge <vscale x 8 x i16> %a, %splat
956  ret <vscale x 8 x i1> %out
957}
958
959define <vscale x 8 x i1> @int_cmphs_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
960; CHECK-LABEL: int_cmphs_h
961; CHECK: cmphs p0.h, p0/z, z0.h, #0
962; CHECK-NEXT: ret
963  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
964  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
965  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphs.nxv8i16(<vscale x 8 x i1> %pg,
966                                                                <vscale x 8 x i16> %a,
967                                                                <vscale x 8 x i16> %splat)
968  ret <vscale x 8 x i1> %out
969}
970
971define <vscale x 8 x i1> @wide_cmphs_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
972; CHECK-LABEL: wide_cmphs_h
973; CHECK: cmphs p0.h, p0/z, z0.h, #0
974; CHECK-NEXT: ret
975  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
976  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
977  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphs.wide.nxv8i16(<vscale x 8 x i1> %pg,
978                                                                     <vscale x 8 x i16> %a,
979                                                                     <vscale x 2 x i64> %splat)
980  ret <vscale x 8 x i1> %out
981}
982
983define <vscale x 4 x i1> @ir_cmphs_s(<vscale x 4 x i32> %a) {
984; CHECK-LABEL: ir_cmphs_s
985; CHECK: cmphs p0.s, p0/z, z0.s, #68
986; CHECK-NEXT: ret
987  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
988  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
989  %out = icmp uge <vscale x 4 x i32> %a, %splat
990  ret <vscale x 4 x i1> %out
991}
992
993define <vscale x 4 x i1> @int_cmphs_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
994; CHECK-LABEL: int_cmphs_s
995; CHECK: cmphs p0.s, p0/z, z0.s, #68
996; CHECK-NEXT: ret
997  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
998  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
999  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphs.nxv4i32(<vscale x 4 x i1> %pg,
1000                                                                <vscale x 4 x i32> %a,
1001                                                                <vscale x 4 x i32> %splat)
1002  ret <vscale x 4 x i1> %out
1003}
1004
1005define <vscale x 4 x i1> @wide_cmphs_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
1006; CHECK-LABEL: wide_cmphs_s
1007; CHECK: cmphs p0.s, p0/z, z0.s, #68
1008; CHECK-NEXT: ret
1009  %elt   = insertelement <vscale x 2 x i64> undef, i64 68, i32 0
1010  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1011  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphs.wide.nxv4i32(<vscale x 4 x i1> %pg,
1012                                                                     <vscale x 4 x i32> %a,
1013                                                                     <vscale x 2 x i64> %splat)
1014  ret <vscale x 4 x i1> %out
1015}
1016
1017define <vscale x 2 x i1> @ir_cmphs_d(<vscale x 2 x i64> %a) {
1018; CHECK-LABEL: ir_cmphs_d
1019; CHECK: cmphs p0.d, p0/z, z0.d, #127
1020; CHECK-NEXT: ret
1021  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1022  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1023  %out = icmp uge <vscale x 2 x i64> %a, %splat
1024  ret <vscale x 2 x i1> %out
1025}
1026
1027define <vscale x 2 x i1> @int_cmphs_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
1028; CHECK-LABEL: int_cmphs_d
1029; CHECK: cmphs p0.d, p0/z, z0.d, #127
1030; CHECK-NEXT: ret
1031  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1032  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1033  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmphs.nxv2i64(<vscale x 2 x i1> %pg,
1034                                                                <vscale x 2 x i64> %a,
1035                                                                <vscale x 2 x i64> %splat)
1036  ret <vscale x 2 x i1> %out
1037}
1038
1039;
1040; CMPLO
1041;
1042
1043define <vscale x 16 x i1> @ir_cmplo_b(<vscale x 16 x i8> %a) {
1044; CHECK-LABEL: ir_cmplo_b
1045; CHECK: cmplo p0.b, p0/z, z0.b, #4
1046; CHECK-NEXT: ret
1047  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
1048  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
1049  %out = icmp ult <vscale x 16 x i8> %a, %splat
1050  ret <vscale x 16 x i1> %out
1051}
1052
1053define <vscale x 16 x i1> @int_cmplo_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
1054; CHECK-LABEL: int_cmplo_b
1055; CHECK: cmplo p0.b, p0/z, z0.b, #4
1056; CHECK-NEXT: ret
1057  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
1058  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
1059  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.nxv16i8(<vscale x 16 x i1> %pg,
1060                                                                 <vscale x 16 x i8> %splat,
1061                                                                 <vscale x 16 x i8> %a)
1062  ret <vscale x 16 x i1> %out
1063}
1064
1065define <vscale x 16 x i1> @wide_cmplo_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
1066; CHECK-LABEL: wide_cmplo_b
1067; CHECK: cmplo p0.b, p0/z, z0.b, #4
1068; CHECK-NEXT: ret
1069  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
1070  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1071  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmplo.wide.nxv16i8(<vscale x 16 x i1> %pg,
1072                                                                      <vscale x 16 x i8> %a,
1073                                                                      <vscale x 2 x i64> %splat)
1074  ret <vscale x 16 x i1> %out
1075}
1076
1077define <vscale x 8 x i1> @ir_cmplo_h(<vscale x 8 x i16> %a) {
1078; CHECK-LABEL: ir_cmplo_h
1079; CHECK: cmplo p0.h, p0/z, z0.h, #0
1080; CHECK-NEXT: ret
1081  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
1082  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
1083  %out = icmp ult <vscale x 8 x i16> %a, %splat
1084  ret <vscale x 8 x i1> %out
1085}
1086
1087define <vscale x 8 x i1> @int_cmplo_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
1088; CHECK-LABEL: int_cmplo_h
1089; CHECK: cmplo p0.h, p0/z, z0.h, #0
1090; CHECK-NEXT: ret
1091  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
1092  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
1093  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.nxv8i16(<vscale x 8 x i1> %pg,
1094                                                                <vscale x 8 x i16> %splat,
1095                                                                <vscale x 8 x i16> %a)
1096  ret <vscale x 8 x i1> %out
1097}
1098
1099define <vscale x 8 x i1> @wide_cmplo_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
1100; CHECK-LABEL: wide_cmplo_h
1101; CHECK: cmplo p0.h, p0/z, z0.h, #0
1102; CHECK-NEXT: ret
1103  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
1104  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1105  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmplo.wide.nxv8i16(<vscale x 8 x i1> %pg,
1106                                                                     <vscale x 8 x i16> %a,
1107                                                                     <vscale x 2 x i64> %splat)
1108  ret <vscale x 8 x i1> %out
1109}
1110
1111define <vscale x 4 x i1> @ir_cmplo_s(<vscale x 4 x i32> %a) {
1112; CHECK-LABEL: ir_cmplo_s
1113; CHECK: cmplo p0.s, p0/z, z0.s, #68
1114; CHECK-NEXT: ret
1115  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
1116  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1117  %out = icmp ult <vscale x 4 x i32> %a, %splat
1118  ret <vscale x 4 x i1> %out
1119}
1120
1121define <vscale x 4 x i1> @int_cmplo_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
1122; CHECK-LABEL: int_cmplo_s
1123; CHECK: cmplo p0.s, p0/z, z0.s, #68
1124; CHECK-NEXT: ret
1125  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
1126  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1127  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.nxv4i32(<vscale x 4 x i1> %pg,
1128                                                                <vscale x 4 x i32> %splat,
1129                                                                <vscale x 4 x i32> %a)
1130  ret <vscale x 4 x i1> %out
1131}
1132
1133define <vscale x 4 x i1> @wide_cmplo_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
1134; CHECK-LABEL: wide_cmplo_s
1135; CHECK: cmplo p0.s, p0/z, z0.s, #68
1136; CHECK-NEXT: ret
1137  %elt   = insertelement <vscale x 2 x i64> undef, i64 68, i32 0
1138  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1139  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmplo.wide.nxv4i32(<vscale x 4 x i1> %pg,
1140                                                                     <vscale x 4 x i32> %a,
1141                                                                     <vscale x 2 x i64> %splat)
1142  ret <vscale x 4 x i1> %out
1143}
1144
1145define <vscale x 2 x i1> @ir_cmplo_d(<vscale x 2 x i64> %a) {
1146; CHECK-LABEL: ir_cmplo_d
1147; CHECK: cmplo p0.d, p0/z, z0.d, #127
1148; CHECK-NEXT: ret
1149  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1150  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1151  %out = icmp ult <vscale x 2 x i64> %a, %splat
1152  ret <vscale x 2 x i1> %out
1153}
1154
1155define <vscale x 2 x i1> @int_cmplo_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
1156; CHECK-LABEL: int_cmplo_d
1157; CHECK: cmplo p0.d, p0/z, z0.d, #127
1158; CHECK-NEXT: ret
1159  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1160  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1161  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmphi.nxv2i64(<vscale x 2 x i1> %pg,
1162                                                                <vscale x 2 x i64> %splat,
1163                                                                <vscale x 2 x i64> %a)
1164  ret <vscale x 2 x i1> %out
1165}
1166
1167;
1168; CMPLS
1169;
1170
1171define <vscale x 16 x i1> @ir_cmpls_b(<vscale x 16 x i8> %a) {
1172; CHECK-LABEL: ir_cmpls_b
1173; CHECK: cmpls p0.b, p0/z, z0.b, #4
1174; CHECK-NEXT: ret
1175  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
1176  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
1177  %out = icmp ule <vscale x 16 x i8> %a, %splat
1178  ret <vscale x 16 x i1> %out
1179}
1180
1181define <vscale x 16 x i1> @int_cmpls_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
1182; CHECK-LABEL: int_cmpls_b
1183; CHECK: cmpls p0.b, p0/z, z0.b, #4
1184; CHECK-NEXT: ret
1185  %elt   = insertelement <vscale x 16 x i8> undef, i8 4, i32 0
1186  %splat = shufflevector <vscale x 16 x i8> %elt, <vscale x 16 x i8> undef, <vscale x 16 x i32> zeroinitializer
1187  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmphs.nxv16i8(<vscale x 16 x i1> %pg,
1188                                                                 <vscale x 16 x i8> %splat,
1189                                                                 <vscale x 16 x i8> %a)
1190  ret <vscale x 16 x i1> %out
1191}
1192
1193define <vscale x 16 x i1> @wide_cmpls_b(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %a) {
1194; CHECK-LABEL: wide_cmpls_b
1195; CHECK: cmpls p0.b, p0/z, z0.b, #4
1196; CHECK-NEXT: ret
1197  %elt   = insertelement <vscale x 2 x i64> undef, i64 4, i32 0
1198  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1199  %out = call <vscale x 16 x i1> @llvm.aarch64.sve.cmpls.wide.nxv16i8(<vscale x 16 x i1> %pg,
1200                                                                      <vscale x 16 x i8> %a,
1201                                                                      <vscale x 2 x i64> %splat)
1202  ret <vscale x 16 x i1> %out
1203}
1204
1205define <vscale x 8 x i1> @ir_cmpls_h(<vscale x 8 x i16> %a) {
1206; CHECK-LABEL: ir_cmpls_h
1207; CHECK: cmpls p0.h, p0/z, z0.h, #0
1208; CHECK-NEXT: ret
1209  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
1210  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
1211  %out = icmp ule <vscale x 8 x i16> %a, %splat
1212  ret <vscale x 8 x i1> %out
1213}
1214
1215define <vscale x 8 x i1> @int_cmpls_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
1216; CHECK-LABEL: int_cmpls_h
1217; CHECK: cmpls p0.h, p0/z, z0.h, #0
1218; CHECK-NEXT: ret
1219  %elt   = insertelement <vscale x 8 x i16> undef, i16 0, i32 0
1220  %splat = shufflevector <vscale x 8 x i16> %elt, <vscale x 8 x i16> undef, <vscale x 8 x i32> zeroinitializer
1221  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmphs.nxv8i16(<vscale x 8 x i1> %pg,
1222                                                                <vscale x 8 x i16> %splat,
1223                                                                <vscale x 8 x i16> %a)
1224  ret <vscale x 8 x i1> %out
1225}
1226
1227define <vscale x 8 x i1> @wide_cmpls_h(<vscale x 8 x i1> %pg, <vscale x 8 x i16> %a) {
1228; CHECK-LABEL: wide_cmpls_h
1229; CHECK: cmpls p0.h, p0/z, z0.h, #0
1230; CHECK-NEXT: ret
1231  %elt   = insertelement <vscale x 2 x i64> undef, i64 0, i32 0
1232  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1233  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.cmpls.wide.nxv8i16(<vscale x 8 x i1> %pg,
1234                                                                     <vscale x 8 x i16> %a,
1235                                                                     <vscale x 2 x i64> %splat)
1236  ret <vscale x 8 x i1> %out
1237}
1238
1239define <vscale x 4 x i1> @ir_cmpls_s(<vscale x 4 x i32> %a) {
1240; CHECK-LABEL: ir_cmpls_s
1241; CHECK: cmpls p0.s, p0/z, z0.s, #68
1242; CHECK-NEXT: ret
1243  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
1244  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1245  %out = icmp ule <vscale x 4 x i32> %a, %splat
1246  ret <vscale x 4 x i1> %out
1247}
1248
1249define <vscale x 4 x i1> @int_cmpls_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
1250; CHECK-LABEL: int_cmpls_s
1251; CHECK: cmpls p0.s, p0/z, z0.s, #68
1252; CHECK-NEXT: ret
1253  %elt   = insertelement <vscale x 4 x i32> undef, i32 68, i32 0
1254  %splat = shufflevector <vscale x 4 x i32> %elt, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
1255  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmphs.nxv4i32(<vscale x 4 x i1> %pg,
1256                                                                <vscale x 4 x i32> %splat,
1257                                                                <vscale x 4 x i32> %a)
1258  ret <vscale x 4 x i1> %out
1259}
1260
1261define <vscale x 4 x i1> @wide_cmpls_s(<vscale x 4 x i1> %pg, <vscale x 4 x i32> %a) {
1262; CHECK-LABEL: wide_cmpls_s
1263; CHECK: cmpls p0.s, p0/z, z0.s, #68
1264; CHECK-NEXT: ret
1265  %elt   = insertelement <vscale x 2 x i64> undef, i64 68, i32 0
1266  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1267  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.cmpls.wide.nxv4i32(<vscale x 4 x i1> %pg,
1268                                                                     <vscale x 4 x i32> %a,
1269                                                                     <vscale x 2 x i64> %splat)
1270  ret <vscale x 4 x i1> %out
1271}
1272
1273define <vscale x 2 x i1> @ir_cmpls_d(<vscale x 2 x i64> %a) {
1274; CHECK-LABEL: ir_cmpls_d
1275; CHECK: cmpls p0.d, p0/z, z0.d, #127
1276; CHECK-NEXT: ret
1277  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1278  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1279  %out = icmp ule <vscale x 2 x i64> %a, %splat
1280  ret <vscale x 2 x i1> %out
1281}
1282
1283define <vscale x 2 x i1> @int_cmpls_d(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a) {
1284; CHECK-LABEL: int_cmpls_d
1285; CHECK: cmpls p0.d, p0/z, z0.d, #127
1286; CHECK-NEXT: ret
1287  %elt   = insertelement <vscale x 2 x i64> undef, i64 127, i32 0
1288  %splat = shufflevector <vscale x 2 x i64> %elt, <vscale x 2 x i64> undef, <vscale x 2 x i32> zeroinitializer
1289  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.cmphs.nxv2i64(<vscale x 2 x i1> %pg,
1290                                                                <vscale x 2 x i64> %splat,
1291                                                                <vscale x 2 x i64> %a)
1292  ret <vscale x 2 x i1> %out
1293}
1294
1295declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1296declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpeq.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1297declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpeq.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1298declare <vscale x 2 x i1> @llvm.aarch64.sve.cmpeq.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1299declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1300declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1301declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpeq.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1302
1303declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpge.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1304declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpge.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1305declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpge.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1306declare <vscale x 2 x i1> @llvm.aarch64.sve.cmpge.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1307declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpge.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1308declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpge.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1309declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpge.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1310
1311declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpgt.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1312declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpgt.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1313declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpgt.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1314declare <vscale x 2 x i1> @llvm.aarch64.sve.cmpgt.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1315declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1316declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1317declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpgt.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1318
1319declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1320declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1321declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1322declare <vscale x 2 x i1> @llvm.aarch64.sve.cmphi.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1323declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphi.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1324declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphi.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1325declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphi.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1326
1327declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphs.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1328declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphs.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1329declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphs.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1330declare <vscale x 2 x i1> @llvm.aarch64.sve.cmphs.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1331declare <vscale x 16 x i1> @llvm.aarch64.sve.cmphs.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1332declare <vscale x 8 x i1> @llvm.aarch64.sve.cmphs.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1333declare <vscale x 4 x i1> @llvm.aarch64.sve.cmphs.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1334
1335declare <vscale x 16 x i1> @llvm.aarch64.sve.cmple.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1336declare <vscale x 8 x i1> @llvm.aarch64.sve.cmple.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1337declare <vscale x 4 x i1> @llvm.aarch64.sve.cmple.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1338
1339declare <vscale x 16 x i1> @llvm.aarch64.sve.cmplo.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1340declare <vscale x 8 x i1> @llvm.aarch64.sve.cmplo.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1341declare <vscale x 4 x i1> @llvm.aarch64.sve.cmplo.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1342
1343declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpls.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1344declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpls.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1345declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpls.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1346
1347declare <vscale x 16 x i1> @llvm.aarch64.sve.cmplt.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1348declare <vscale x 8 x i1> @llvm.aarch64.sve.cmplt.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1349declare <vscale x 4 x i1> @llvm.aarch64.sve.cmplt.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1350
1351declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>)
1352declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>)
1353declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>)
1354declare <vscale x 2 x i1> @llvm.aarch64.sve.cmpne.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>)
1355declare <vscale x 16 x i1> @llvm.aarch64.sve.cmpne.wide.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 2 x i64>)
1356declare <vscale x 8 x i1> @llvm.aarch64.sve.cmpne.wide.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 2 x i64>)
1357declare <vscale x 4 x i1> @llvm.aarch64.sve.cmpne.wide.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 2 x i64>)
1358