1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; ST1H, ST1W, ST1D: base + 64-bit scaled offset 9; e.g. st1h { z0.d }, p0, [x0, z0.d, lsl #1] 10; 11 12define void @sst1h_index(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i16* %base, <vscale x 2 x i64> %offsets) { 13; CHECK-LABEL: sst1h_index 14; CHECK: st1h { z0.d }, p0, [x0, z1.d, lsl #1] 15; CHECK-NEXT: ret 16 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16> 17 call void @llvm.aarch64.sve.st1.scatter.index.nxv2i16(<vscale x 2 x i16> %data_trunc, 18 <vscale x 2 x i1> %pg, 19 i16* %base, 20 <vscale x 2 x i64> %offsets) 21 ret void 22} 23 24define void @sst1w_index(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i32* %base, <vscale x 2 x i64> %offsets) { 25; CHECK-LABEL: sst1w_index 26; CHECK: st1w { z0.d }, p0, [x0, z1.d, lsl #2] 27; CHECK-NEXT: ret 28 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32> 29 call void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32> %data_trunc, 30 <vscale x 2 x i1> %pg, 31 i32* %base, 32 <vscale x 2 x i64> %offsets) 33 ret void 34} 35 36define void @sst1d_index(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, i64* %base, <vscale x 2 x i64> %offsets) { 37; CHECK-LABEL: sst1d_index 38; CHECK: st1d { z0.d }, p0, [x0, z1.d, lsl #3] 39; CHECK-NEXT: ret 40 call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64(<vscale x 2 x i64> %data, 41 <vscale x 2 x i1> %pg, 42 i64* %base, 43 <vscale x 2 x i64> %offsets) 44 ret void 45} 46 47define void @sst1d_index_double(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, double* %base, <vscale x 2 x i64> %offsets) { 48; CHECK-LABEL: sst1d_index_double 49; CHECK: st1d { z0.d }, p0, [x0, z1.d, lsl #3] 50; CHECK-NEXT: ret 51 call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64(<vscale x 2 x double> %data, 52 <vscale x 2 x i1> %pg, 53 double* %base, 54 <vscale x 2 x i64> %offsets) 55 ret void 56} 57 58 59declare void @llvm.aarch64.sve.st1.scatter.index.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, i16*, <vscale x 2 x i64>) 60declare void @llvm.aarch64.sve.st1.scatter.index.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, i32*, <vscale x 2 x i64>) 61declare void @llvm.aarch64.sve.st1.scatter.index.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, i64*, <vscale x 2 x i64>) 62declare void @llvm.aarch64.sve.st1.scatter.index.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, double*, <vscale x 2 x i64>) 63