1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
2
3;
4; FCVTLT
5;
6
7define <vscale x 4 x float> @fcvtlt_f32_f16(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 8 x half> %b) {
8; CHECK-LABEL: fcvtlt_f32_f16:
9; CHECK: fcvtlt z0.s, p0/m, z1.h
10; CHECK-NEXT: ret
11  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtlt.f32f16(<vscale x 4 x float> %a,
12                                                                   <vscale x 4 x i1> %pg,
13                                                                   <vscale x 8 x half> %b)
14  ret <vscale x 4 x float> %out
15}
16
17define <vscale x 2 x double> @fcvtlt_f64_f32(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 4 x float> %b) {
18; CHECK-LABEL: fcvtlt_f64_f32:
19; CHECK: fcvtlt	z0.d, p0/m, z1.s
20; CHECK-NEXT: ret
21  %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcvtlt.f64f32(<vscale x 2 x double> %a,
22                                                                    <vscale x 2 x i1> %pg,
23                                                                    <vscale x 4 x float> %b)
24  ret <vscale x 2 x double> %out
25}
26
27;
28; FCVTNT
29;
30
31define <vscale x 8 x half> @fcvtnt_f16_f32(<vscale x 8 x half> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {
32; CHECK-LABEL: fcvtnt_f16_f32:
33; CHECK: fcvtnt z0.h, p0/m, z1.s
34; CHECK-NEXT: ret
35  %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcvtnt.f16f32(<vscale x 8 x half> %a,
36                                                             <vscale x 4 x i1> %pg,
37                                                             <vscale x 4 x float> %b)
38  ret <vscale x 8 x half> %out
39}
40
41define <vscale x 4 x float> @fcvtnt_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {
42; CHECK-LABEL: fcvtnt_f32_f64:
43; CHECK: fcvtnt	z0.s, p0/m, z1.d
44; CHECK-NEXT: ret
45  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtnt.f32f64(<vscale x 4 x float> %a,
46                                                                   <vscale x 2 x i1> %pg,
47                                                                   <vscale x 2 x double> %b)
48  ret <vscale x 4 x float> %out
49}
50
51;
52; FCVTX
53;
54
55define <vscale x 4 x float> @fcvtx_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {
56; CHECK-LABEL: fcvtx_f32_f64:
57; CHECK: fcvtx z0.s, p0/m, z1.d
58; CHECK-NEXT: ret
59  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float> %a,
60                                                                  <vscale x 2 x i1> %pg,
61                                                                  <vscale x 2 x double> %b)
62  ret <vscale x 4 x float> %out
63}
64
65;
66; FCVTXNT
67;
68
69define <vscale x 4 x float> @fcvtxnt_f32_f64(<vscale x 4 x float> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {
70; CHECK-LABEL: fcvtxnt_f32_f64:
71; CHECK: fcvtxnt z0.s, p0/m, z1.d
72; CHECK-NEXT: ret
73  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcvtxnt.f32f64(<vscale x 4 x float> %a,
74                                                                    <vscale x 2 x i1> %pg,
75                                                                    <vscale x 2 x double> %b)
76  ret <vscale x 4 x float> %out
77}
78
79declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtlt.f32f16(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 8 x half>)
80declare <vscale x 2 x double> @llvm.aarch64.sve.fcvtlt.f64f32(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 4 x float>)
81declare <vscale x 8 x half> @llvm.aarch64.sve.fcvtnt.f16f32(<vscale x 8 x half>, <vscale x 4 x i1>, <vscale x 4 x float>)
82declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtnt.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)
83declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtx.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)
84declare <vscale x 4 x float> @llvm.aarch64.sve.fcvtxnt.f32f64(<vscale x 4 x float>, <vscale x 2 x i1>, <vscale x 2 x double>)
85