1;RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
2
3;
4; FMLALB (Vectors)
5;
6
7define <vscale x 4 x float> @fmlalb_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
8; CHECK-LABEL: fmlalb_h:
9; CHECK: fmlalb z0.s, z1.h, z2.h
10; CHECK-NEXT: ret
11  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float> %a,
12                                                                    <vscale x 8 x half> %b,
13                                                                    <vscale x 8 x half> %c)
14  ret <vscale x 4 x float> %out
15}
16
17;
18; FMLALB (Indexed)
19;
20
21define <vscale x 4 x float> @fmlalb_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
22; CHECK-LABEL: fmlalb_lane_h:
23; CHECK: fmlalb z0.s, z1.h, z2.h[0]
24; CHECK-NEXT: ret
25  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float> %a,
26                                                                         <vscale x 8 x half> %b,
27                                                                         <vscale x 8 x half> %c,
28                                                                         i32 0)
29  ret <vscale x 4 x float> %out
30}
31
32;
33; FMLALT (Vectors)
34;
35
36define <vscale x 4 x float> @fmlalt_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
37; CHECK-LABEL: fmlalt_h:
38; CHECK: fmlalt z0.s, z1.h, z2.h
39; CHECK-NEXT: ret
40  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float> %a,
41                                                                    <vscale x 8 x half> %b,
42                                                                    <vscale x 8 x half> %c)
43  ret <vscale x 4 x float> %out
44}
45
46;
47; FMLALT (Indexed)
48;
49
50define <vscale x 4 x float> @fmlalt_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
51; CHECK-LABEL: fmlalt_lane_h:
52; CHECK: fmlalt z0.s, z1.h, z2.h[1]
53; CHECK-NEXT: ret
54  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float> %a,
55                                                                         <vscale x 8 x half> %b,
56                                                                         <vscale x 8 x half> %c,
57                                                                         i32 1)
58  ret <vscale x 4 x float> %out
59}
60
61;
62; FMLSLB (Vectors)
63;
64
65define <vscale x 4 x float> @fmlslb_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
66; CHECK-LABEL: fmlslb_h:
67; CHECK: fmlslb z0.s, z1.h, z2.h
68; CHECK-NEXT: ret
69  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float> %a,
70                                                                    <vscale x 8 x half> %b,
71                                                                    <vscale x 8 x half> %c)
72  ret <vscale x 4 x float> %out
73}
74
75;
76; FMLSLB (Indexed)
77;
78
79define <vscale x 4 x float> @fmlslb_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
80; CHECK-LABEL: fmlslb_lane_h:
81; CHECK: fmlslb z0.s, z1.h, z2.h[2]
82; CHECK-NEXT: ret
83  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float> %a,
84                                                                         <vscale x 8 x half> %b,
85                                                                         <vscale x 8 x half> %c,
86                                                                         i32 2)
87  ret <vscale x 4 x float> %out
88}
89
90;
91; FMLSLT (Vectors)
92;
93
94define <vscale x 4 x float> @fmlslt_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
95; CHECK-LABEL: fmlslt_h:
96; CHECK: fmlslt z0.s, z1.h, z2.h
97; CHECK-NEXT: ret
98  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float> %a,
99                                                                    <vscale x 8 x half> %b,
100                                                                    <vscale x 8 x half> %c)
101 ret <vscale x 4 x float> %out
102}
103
104;
105; FMLSLT (Indexed)
106;
107
108define <vscale x 4 x float> @fmlslt_lane_h(<vscale x 4 x float> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {
109; CHECK-LABEL: fmlslt_lane_h:
110; CHECK: fmlslt z0.s, z1.h, z2.h[3]
111; CHECK-NEXT: ret
112  %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float> %a,
113                                                                         <vscale x 8 x half> %b,
114                                                                         <vscale x 8 x half> %c,
115                                                                         i32 3)
116  ret <vscale x 4 x float> %out
117}
118
119declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
120declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalb.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
121declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
122declare <vscale x 4 x float> @llvm.aarch64.sve.fmlalt.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
123
124declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
125declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslb.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
126declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>)
127declare <vscale x 4 x float> @llvm.aarch64.sve.fmlslt.lane.nxv4f32(<vscale x 4 x float>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
128