1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
2
3;
4; SADDLBT
5;
6
7define <vscale x 8 x i16> @saddlbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
8; CHECK-LABEL: saddlbt_b:
9; CHECK: saddlbt z0.h, z0.b, z1.b
10; CHECK-NEXT: ret
11  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8> %a,
12                                                              <vscale x 16 x i8> %b)
13  ret <vscale x 8 x i16> %out
14}
15
16define <vscale x 4 x i32> @saddlbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
17; CHECK-LABEL: saddlbt_h:
18; CHECK: saddlbt z0.s, z0.h, z1.h
19; CHECK-NEXT: ret
20  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16> %a,
21                                                              <vscale x 8 x i16> %b)
22  ret <vscale x 4 x i32> %out
23}
24
25define <vscale x 2 x i64> @saddlbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
26; CHECK-LABEL: saddlbt_s:
27; CHECK: saddlbt z0.d, z0.s, z1.s
28; CHECK-NEXT: ret
29  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32> %a,
30                                                              <vscale x 4 x i32> %b)
31  ret <vscale x 2 x i64> %out
32}
33
34;
35; SSUBLBT
36;
37
38define <vscale x 8 x i16> @ssublbt_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
39; CHECK-LABEL: ssublbt_b:
40; CHECK: ssublbt z0.h, z0.b, z1.b
41; CHECK-NEXT: ret
42  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8> %a,
43                                                              <vscale x 16 x i8> %b)
44  ret <vscale x 8 x i16> %out
45}
46
47define <vscale x 4 x i32> @ssublbt_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
48; CHECK-LABEL: ssublbt_h:
49; CHECK: ssublbt z0.s, z0.h, z1.h
50; CHECK-NEXT: ret
51  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16> %a,
52                                                              <vscale x 8 x i16> %b)
53  ret <vscale x 4 x i32> %out
54}
55
56define <vscale x 2 x i64> @ssublbt_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
57; CHECK-LABEL: ssublbt_s:
58; CHECK: ssublbt z0.d, z0.s, z1.s
59; CHECK-NEXT: ret
60  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32> %a,
61                                                              <vscale x 4 x i32> %b)
62  ret <vscale x 2 x i64> %out
63}
64
65;
66; SSUBLTB
67;
68
69define <vscale x 8 x i16> @ssubltb_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
70; CHECK-LABEL: ssubltb_b:
71; CHECK: ssubltb z0.h, z0.b, z1.b
72; CHECK-NEXT: ret
73  %out = call <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8> %a,
74                                                              <vscale x 16 x i8> %b)
75  ret <vscale x 8 x i16> %out
76}
77
78define <vscale x 4 x i32> @ssubltb_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
79; CHECK-LABEL: ssubltb_h:
80; CHECK: ssubltb z0.s, z0.h, z1.h
81; CHECK-NEXT: ret
82  %out = call <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16> %a,
83                                                              <vscale x 8 x i16> %b)
84  ret <vscale x 4 x i32> %out
85}
86
87define <vscale x 2 x i64> @ssubltb_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
88; CHECK-LABEL: ssubltb_s:
89; CHECK: ssubltb z0.d, z0.s, z1.s
90; CHECK-NEXT: ret
91  %out = call <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32> %a,
92                                                              <vscale x 4 x i32> %b)
93  ret <vscale x 2 x i64> %out
94}
95
96declare <vscale x 8 x i16> @llvm.aarch64.sve.saddlbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
97declare <vscale x 4 x i32> @llvm.aarch64.sve.saddlbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
98declare <vscale x 2 x i64> @llvm.aarch64.sve.saddlbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
99
100declare <vscale x 8 x i16> @llvm.aarch64.sve.ssublbt.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
101declare <vscale x 4 x i32> @llvm.aarch64.sve.ssublbt.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
102declare <vscale x 2 x i64> @llvm.aarch64.sve.ssublbt.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
103
104declare <vscale x 8 x i16> @llvm.aarch64.sve.ssubltb.nxv8i16(<vscale x 16 x i8>, <vscale x 16 x i8>)
105declare <vscale x 4 x i32> @llvm.aarch64.sve.ssubltb.nxv4i32(<vscale x 8 x i16>, <vscale x 8 x i16>)
106declare <vscale x 2 x i64> @llvm.aarch64.sve.ssubltb.nxv2i64(<vscale x 4 x i32>, <vscale x 4 x i32>)
107