1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s 3 4declare i4 @llvm.uadd.sat.i4(i4, i4) 5declare i8 @llvm.uadd.sat.i8(i8, i8) 6declare i16 @llvm.uadd.sat.i16(i16, i16) 7declare i32 @llvm.uadd.sat.i32(i32, i32) 8declare i64 @llvm.uadd.sat.i64(i64, i64) 9 10define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind { 11; CHECK-LABEL: func32: 12; CHECK: // %bb.0: 13; CHECK-NEXT: mul w8, w1, w2 14; CHECK-NEXT: adds w8, w0, w8 15; CHECK-NEXT: csinv w0, w8, wzr, lo 16; CHECK-NEXT: ret 17 %a = mul i32 %y, %z 18 %tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %a) 19 ret i32 %tmp 20} 21 22define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind { 23; CHECK-LABEL: func64: 24; CHECK: // %bb.0: 25; CHECK-NEXT: adds x8, x0, x2 26; CHECK-NEXT: csinv x0, x8, xzr, lo 27; CHECK-NEXT: ret 28 %a = mul i64 %y, %z 29 %tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %z) 30 ret i64 %tmp 31} 32 33define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind { 34; CHECK-LABEL: func16: 35; CHECK: // %bb.0: 36; CHECK-NEXT: and w8, w0, #0xffff 37; CHECK-NEXT: mul w9, w1, w2 38; CHECK-NEXT: add w8, w8, w9, uxth 39; CHECK-NEXT: mov w9, #65535 40; CHECK-NEXT: cmp w8, w9 41; CHECK-NEXT: csel w0, w8, w9, lo 42; CHECK-NEXT: ret 43 %a = mul i16 %y, %z 44 %tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %a) 45 ret i16 %tmp 46} 47 48define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind { 49; CHECK-LABEL: func8: 50; CHECK: // %bb.0: 51; CHECK-NEXT: and w8, w0, #0xff 52; CHECK-NEXT: mul w9, w1, w2 53; CHECK-NEXT: add w8, w8, w9, uxtb 54; CHECK-NEXT: cmp w8, #255 // =255 55; CHECK-NEXT: mov w9, #255 56; CHECK-NEXT: csel w0, w8, w9, lo 57; CHECK-NEXT: ret 58 %a = mul i8 %y, %z 59 %tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %a) 60 ret i8 %tmp 61} 62 63define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind { 64; CHECK-LABEL: func4: 65; CHECK: // %bb.0: 66; CHECK-NEXT: mul w9, w1, w2 67; CHECK-NEXT: and w8, w0, #0xf 68; CHECK-NEXT: and w9, w9, #0xf 69; CHECK-NEXT: add w8, w8, w9 70; CHECK-NEXT: cmp w8, #15 // =15 71; CHECK-NEXT: mov w9, #15 72; CHECK-NEXT: csel w0, w8, w9, lo 73; CHECK-NEXT: ret 74 %a = mul i4 %y, %z 75 %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %a) 76 ret i4 %tmp 77} 78