1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK
3
4declare half @llvm.experimental.vector.reduce.fmax.v1f16(<1 x half> %a)
5declare float @llvm.experimental.vector.reduce.fmax.v1f32(<1 x float> %a)
6declare double @llvm.experimental.vector.reduce.fmax.v1f64(<1 x double> %a)
7declare fp128 @llvm.experimental.vector.reduce.fmax.v1f128(<1 x fp128> %a)
8
9declare float @llvm.experimental.vector.reduce.fmax.v3f32(<3 x float> %a)
10declare fp128 @llvm.experimental.vector.reduce.fmax.v2f128(<2 x fp128> %a)
11declare float @llvm.experimental.vector.reduce.fmax.v16f32(<16 x float> %a)
12
13define half @test_v1f16(<1 x half> %a) nounwind {
14; CHECK-LABEL: test_v1f16:
15; CHECK:       // %bb.0:
16; CHECK-NEXT:    ret
17  %b = call nnan half @llvm.experimental.vector.reduce.fmax.v1f16(<1 x half> %a)
18  ret half %b
19}
20
21define float @test_v1f32(<1 x float> %a) nounwind {
22; CHECK-LABEL: test_v1f32:
23; CHECK:       // %bb.0:
24; CHECK-NEXT:    // kill: def $d0 killed $d0 def $q0
25; CHECK-NEXT:    // kill: def $s0 killed $s0 killed $q0
26; CHECK-NEXT:    ret
27  %b = call nnan float @llvm.experimental.vector.reduce.fmax.v1f32(<1 x float> %a)
28  ret float %b
29}
30
31define double @test_v1f64(<1 x double> %a) nounwind {
32; CHECK-LABEL: test_v1f64:
33; CHECK:       // %bb.0:
34; CHECK-NEXT:    ret
35  %b = call nnan double @llvm.experimental.vector.reduce.fmax.v1f64(<1 x double> %a)
36  ret double %b
37}
38
39define fp128 @test_v1f128(<1 x fp128> %a) nounwind {
40; CHECK-LABEL: test_v1f128:
41; CHECK:       // %bb.0:
42; CHECK-NEXT:    ret
43  %b = call nnan fp128 @llvm.experimental.vector.reduce.fmax.v1f128(<1 x fp128> %a)
44  ret fp128 %b
45}
46
47define float @test_v3f32(<3 x float> %a) nounwind {
48; CHECK-LABEL: test_v3f32:
49; CHECK:       // %bb.0:
50; CHECK-NEXT:    mov w8, #-8388608
51; CHECK-NEXT:    fmov s1, w8
52; CHECK-NEXT:    mov v0.s[3], v1.s[0]
53; CHECK-NEXT:    fmaxnmv s0, v0.4s
54; CHECK-NEXT:    ret
55  %b = call nnan float @llvm.experimental.vector.reduce.fmax.v3f32(<3 x float> %a)
56  ret float %b
57}
58
59define fp128 @test_v2f128(<2 x fp128> %a) nounwind {
60; CHECK-LABEL: test_v2f128:
61; CHECK:       // %bb.0:
62; CHECK-NEXT:    b fmaxl
63  %b = call nnan fp128 @llvm.experimental.vector.reduce.fmax.v2f128(<2 x fp128> %a)
64  ret fp128 %b
65}
66
67define float @test_v16f32(<16 x float> %a) nounwind {
68; CHECK-LABEL: test_v16f32:
69; CHECK:       // %bb.0:
70; CHECK-NEXT:    fmaxnm v1.4s, v1.4s, v3.4s
71; CHECK-NEXT:    fmaxnm v0.4s, v0.4s, v2.4s
72; CHECK-NEXT:    fmaxnm v0.4s, v0.4s, v1.4s
73; CHECK-NEXT:    fmaxnmv s0, v0.4s
74; CHECK-NEXT:    ret
75  %b = call nnan float @llvm.experimental.vector.reduce.fmax.v16f32(<16 x float> %a)
76  ret float %b
77}
78