1; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
2;
3; Test saving of vararg registers and backchain with packed stack.
4
5%struct.__va_list_tag = type { i64, i64, i8*, i8* }
6declare void @llvm.va_start(i8*)
7
8attributes #0 = { nounwind "packed-stack"="true" }
9define void @fun0(i64 %g0, double %d0, i64 %n, ...) #0 {
10; CHECK-LABEL: fun0:
11; CHECK:      stmg	%r4, %r15, 32(%r15)
12; CHECK-NEXT: aghi	%r15, -192
13; CHECK-NEXT: std	%f2, 328(%r15)
14; CHECK-NEXT: std	%f4, 336(%r15)
15; CHECK-NEXT: std	%f6, 344(%r15)
16; CHECK-NEXT: la	%r0, 352(%r15)
17; CHECK-NEXT: stg	%r0, 176(%r15)
18; CHECK-NEXT: la	%r0, 192(%r15)
19; CHECK-NEXT: stg	%r0, 184(%r15)
20; CHECK-NEXT: mvghi	160(%r15), 2
21; CHECK-NEXT: mvghi	168(%r15), 1
22; CHECK-NEXT: lmg	%r6, %r15, 240(%r15)
23; CHECK-NEXT: br	%r14
24entry:
25  %vl = alloca [1 x %struct.__va_list_tag], align 8
26  %0 = bitcast [1 x %struct.__va_list_tag]* %vl to i8*
27  call void @llvm.va_start(i8* nonnull %0)
28  ret void
29}
30
31attributes #1 = { nounwind "packed-stack"="true" "use-soft-float"="true" }
32define void @fun1(i64 %g0, double %d0, i64 %n, ...) #1 {
33; CHECK-LABEL: fun1:
34; CHECK:      stmg	%r5, %r15, 72(%r15)
35; CHECK-NEXT: aghi	%r15, -160
36; CHECK-NEXT: la	%r0, 192(%r15)
37; CHECK-NEXT: stg	%r0, 184(%r15)
38; CHECK-NEXT: la	%r0, 320(%r15)
39; CHECK-NEXT: stg	%r0, 176(%r15)
40; CHECK-NEXT: mvghi	168(%r15), 0
41; CHECK-NEXT: mvghi	160(%r15), 3
42; CHECK-NEXT: lmg	%r6, %r15, 240(%r15)
43; CHECK-NEXT: br	%r14
44entry:
45  %vl = alloca [1 x %struct.__va_list_tag], align 8
46  %0 = bitcast [1 x %struct.__va_list_tag]* %vl to i8*
47  call void @llvm.va_start(i8* nonnull %0)
48  ret void
49}
50
51attributes #2 = { nounwind "packed-stack"="true" "use-soft-float"="true" "backchain"}
52define void @fun2(i64 %g0, double %d0, i64 %n, ...) #2 {
53; CHECK-LABEL: fun2:
54; CHECK:      stmg	%r5, %r15, 64(%r15)
55; CHECK-NEXT: lgr	%r1, %r15
56; CHECK-NEXT: aghi	%r15, -168
57; CHECK-NEXT: stg	%r1, 152(%r15)
58; CHECK-NEXT: la	%r0, 192(%r15)
59; CHECK-NEXT: stg	%r0, 184(%r15)
60; CHECK-NEXT: la	%r0, 328(%r15)
61; CHECK-NEXT: stg	%r0, 176(%r15)
62; CHECK-NEXT: mvghi	168(%r15), 0
63; CHECK-NEXT: mvghi	160(%r15), 3
64; CHECK-NEXT: lmg	%r6, %r15, 240(%r15)
65; CHECK-NEXT: br	%r14
66entry:
67  %vl = alloca [1 x %struct.__va_list_tag], align 8
68  %0 = bitcast [1 x %struct.__va_list_tag]* %vl to i8*
69  call void @llvm.va_start(i8* nonnull %0)
70  ret void
71}
72
73