1 //===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "DAGISelMatcher.h"
10 #include "CodeGenDAGPatterns.h"
11 #include "CodeGenRegisters.h"
12 #include "llvm/ADT/SmallVector.h"
13 #include "llvm/ADT/StringMap.h"
14 #include "llvm/TableGen/Error.h"
15 #include "llvm/TableGen/Record.h"
16 #include <utility>
17 using namespace llvm;
18
19
20 /// getRegisterValueType - Look up and return the ValueType of the specified
21 /// register. If the register is a member of multiple register classes which
22 /// have different associated types, return MVT::Other.
getRegisterValueType(Record * R,const CodeGenTarget & T)23 static MVT::SimpleValueType getRegisterValueType(Record *R,
24 const CodeGenTarget &T) {
25 bool FoundRC = false;
26 MVT::SimpleValueType VT = MVT::Other;
27 const CodeGenRegister *Reg = T.getRegBank().getReg(R);
28
29 for (const auto &RC : T.getRegBank().getRegClasses()) {
30 if (!RC.contains(Reg))
31 continue;
32
33 if (!FoundRC) {
34 FoundRC = true;
35 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(0);
36 if (VVT.isSimple())
37 VT = VVT.getSimple().SimpleTy;
38 continue;
39 }
40
41 #ifndef NDEBUG
42 // If this occurs in multiple register classes, they all have to agree.
43 const ValueTypeByHwMode &T = RC.getValueTypeNum(0);
44 assert((!T.isSimple() || T.getSimple().SimpleTy == VT) &&
45 "ValueType mismatch between register classes for this register");
46 #endif
47 }
48 return VT;
49 }
50
51
52 namespace {
53 class MatcherGen {
54 const PatternToMatch &Pattern;
55 const CodeGenDAGPatterns &CGP;
56
57 /// PatWithNoTypes - This is a clone of Pattern.getSrcPattern() that starts
58 /// out with all of the types removed. This allows us to insert type checks
59 /// as we scan the tree.
60 TreePatternNodePtr PatWithNoTypes;
61
62 /// VariableMap - A map from variable names ('$dst') to the recorded operand
63 /// number that they were captured as. These are biased by 1 to make
64 /// insertion easier.
65 StringMap<unsigned> VariableMap;
66
67 /// This maintains the recorded operand number that OPC_CheckComplexPattern
68 /// drops each sub-operand into. We don't want to insert these into
69 /// VariableMap because that leads to identity checking if they are
70 /// encountered multiple times. Biased by 1 like VariableMap for
71 /// consistency.
72 StringMap<unsigned> NamedComplexPatternOperands;
73
74 /// NextRecordedOperandNo - As we emit opcodes to record matched values in
75 /// the RecordedNodes array, this keeps track of which slot will be next to
76 /// record into.
77 unsigned NextRecordedOperandNo;
78
79 /// MatchedChainNodes - This maintains the position in the recorded nodes
80 /// array of all of the recorded input nodes that have chains.
81 SmallVector<unsigned, 2> MatchedChainNodes;
82
83 /// MatchedComplexPatterns - This maintains a list of all of the
84 /// ComplexPatterns that we need to check. The second element of each pair
85 /// is the recorded operand number of the input node.
86 SmallVector<std::pair<const TreePatternNode*,
87 unsigned>, 2> MatchedComplexPatterns;
88
89 /// PhysRegInputs - List list has an entry for each explicitly specified
90 /// physreg input to the pattern. The first elt is the Register node, the
91 /// second is the recorded slot number the input pattern match saved it in.
92 SmallVector<std::pair<Record*, unsigned>, 2> PhysRegInputs;
93
94 /// Matcher - This is the top level of the generated matcher, the result.
95 Matcher *TheMatcher;
96
97 /// CurPredicate - As we emit matcher nodes, this points to the latest check
98 /// which should have future checks stuck into its Next position.
99 Matcher *CurPredicate;
100 public:
101 MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp);
102
103 bool EmitMatcherCode(unsigned Variant);
104 void EmitResultCode();
105
GetMatcher() const106 Matcher *GetMatcher() const { return TheMatcher; }
107 private:
108 void AddMatcher(Matcher *NewNode);
109 void InferPossibleTypes(unsigned ForceMode);
110
111 // Matcher Generation.
112 void EmitMatchCode(const TreePatternNode *N, TreePatternNode *NodeNoTypes,
113 unsigned ForceMode);
114 void EmitLeafMatchCode(const TreePatternNode *N);
115 void EmitOperatorMatchCode(const TreePatternNode *N,
116 TreePatternNode *NodeNoTypes,
117 unsigned ForceMode);
118
119 /// If this is the first time a node with unique identifier Name has been
120 /// seen, record it. Otherwise, emit a check to make sure this is the same
121 /// node. Returns true if this is the first encounter.
122 bool recordUniqueNode(ArrayRef<std::string> Names);
123
124 // Result Code Generation.
getNamedArgumentSlot(StringRef Name)125 unsigned getNamedArgumentSlot(StringRef Name) {
126 unsigned VarMapEntry = VariableMap[Name];
127 assert(VarMapEntry != 0 &&
128 "Variable referenced but not defined and not caught earlier!");
129 return VarMapEntry-1;
130 }
131
132 void EmitResultOperand(const TreePatternNode *N,
133 SmallVectorImpl<unsigned> &ResultOps);
134 void EmitResultOfNamedOperand(const TreePatternNode *N,
135 SmallVectorImpl<unsigned> &ResultOps);
136 void EmitResultLeafAsOperand(const TreePatternNode *N,
137 SmallVectorImpl<unsigned> &ResultOps);
138 void EmitResultInstructionAsOperand(const TreePatternNode *N,
139 SmallVectorImpl<unsigned> &ResultOps);
140 void EmitResultSDNodeXFormAsOperand(const TreePatternNode *N,
141 SmallVectorImpl<unsigned> &ResultOps);
142 };
143
144 } // end anonymous namespace
145
MatcherGen(const PatternToMatch & pattern,const CodeGenDAGPatterns & cgp)146 MatcherGen::MatcherGen(const PatternToMatch &pattern,
147 const CodeGenDAGPatterns &cgp)
148 : Pattern(pattern), CGP(cgp), NextRecordedOperandNo(0),
149 TheMatcher(nullptr), CurPredicate(nullptr) {
150 // We need to produce the matcher tree for the patterns source pattern. To do
151 // this we need to match the structure as well as the types. To do the type
152 // matching, we want to figure out the fewest number of type checks we need to
153 // emit. For example, if there is only one integer type supported by a
154 // target, there should be no type comparisons at all for integer patterns!
155 //
156 // To figure out the fewest number of type checks needed, clone the pattern,
157 // remove the types, then perform type inference on the pattern as a whole.
158 // If there are unresolved types, emit an explicit check for those types,
159 // apply the type to the tree, then rerun type inference. Iterate until all
160 // types are resolved.
161 //
162 PatWithNoTypes = Pattern.getSrcPattern()->clone();
163 PatWithNoTypes->RemoveAllTypes();
164
165 // If there are types that are manifestly known, infer them.
166 InferPossibleTypes(Pattern.ForceMode);
167 }
168
169 /// InferPossibleTypes - As we emit the pattern, we end up generating type
170 /// checks and applying them to the 'PatWithNoTypes' tree. As we do this, we
171 /// want to propagate implied types as far throughout the tree as possible so
172 /// that we avoid doing redundant type checks. This does the type propagation.
InferPossibleTypes(unsigned ForceMode)173 void MatcherGen::InferPossibleTypes(unsigned ForceMode) {
174 // TP - Get *SOME* tree pattern, we don't care which. It is only used for
175 // diagnostics, which we know are impossible at this point.
176 TreePattern &TP = *CGP.pf_begin()->second;
177 TP.getInfer().CodeGen = true;
178 TP.getInfer().ForceMode = ForceMode;
179
180 bool MadeChange = true;
181 while (MadeChange)
182 MadeChange = PatWithNoTypes->ApplyTypeConstraints(TP,
183 true/*Ignore reg constraints*/);
184 }
185
186
187 /// AddMatcher - Add a matcher node to the current graph we're building.
AddMatcher(Matcher * NewNode)188 void MatcherGen::AddMatcher(Matcher *NewNode) {
189 if (CurPredicate)
190 CurPredicate->setNext(NewNode);
191 else
192 TheMatcher = NewNode;
193 CurPredicate = NewNode;
194 }
195
196
197 //===----------------------------------------------------------------------===//
198 // Pattern Match Generation
199 //===----------------------------------------------------------------------===//
200
201 /// EmitLeafMatchCode - Generate matching code for leaf nodes.
EmitLeafMatchCode(const TreePatternNode * N)202 void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) {
203 assert(N->isLeaf() && "Not a leaf?");
204
205 // Direct match against an integer constant.
206 if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) {
207 // If this is the root of the dag we're matching, we emit a redundant opcode
208 // check to ensure that this gets folded into the normal top-level
209 // OpcodeSwitch.
210 if (N == Pattern.getSrcPattern()) {
211 const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("imm"));
212 AddMatcher(new CheckOpcodeMatcher(NI));
213 }
214
215 return AddMatcher(new CheckIntegerMatcher(II->getValue()));
216 }
217
218 // An UnsetInit represents a named node without any constraints.
219 if (isa<UnsetInit>(N->getLeafValue())) {
220 assert(N->hasName() && "Unnamed ? leaf");
221 return;
222 }
223
224 DefInit *DI = dyn_cast<DefInit>(N->getLeafValue());
225 if (!DI) {
226 errs() << "Unknown leaf kind: " << *N << "\n";
227 abort();
228 }
229
230 Record *LeafRec = DI->getDef();
231
232 // A ValueType leaf node can represent a register when named, or itself when
233 // unnamed.
234 if (LeafRec->isSubClassOf("ValueType")) {
235 // A named ValueType leaf always matches: (add i32:$a, i32:$b).
236 if (N->hasName())
237 return;
238 // An unnamed ValueType as in (sext_inreg GPR:$foo, i8).
239 return AddMatcher(new CheckValueTypeMatcher(LeafRec->getName()));
240 }
241
242 if (// Handle register references. Nothing to do here, they always match.
243 LeafRec->isSubClassOf("RegisterClass") ||
244 LeafRec->isSubClassOf("RegisterOperand") ||
245 LeafRec->isSubClassOf("PointerLikeRegClass") ||
246 LeafRec->isSubClassOf("SubRegIndex") ||
247 // Place holder for SRCVALUE nodes. Nothing to do here.
248 LeafRec->getName() == "srcvalue")
249 return;
250
251 // If we have a physreg reference like (mul gpr:$src, EAX) then we need to
252 // record the register
253 if (LeafRec->isSubClassOf("Register")) {
254 AddMatcher(new RecordMatcher("physreg input "+LeafRec->getName().str(),
255 NextRecordedOperandNo));
256 PhysRegInputs.push_back(std::make_pair(LeafRec, NextRecordedOperandNo++));
257 return;
258 }
259
260 if (LeafRec->isSubClassOf("CondCode"))
261 return AddMatcher(new CheckCondCodeMatcher(LeafRec->getName()));
262
263 if (LeafRec->isSubClassOf("ComplexPattern")) {
264 // We can't model ComplexPattern uses that don't have their name taken yet.
265 // The OPC_CheckComplexPattern operation implicitly records the results.
266 if (N->getName().empty()) {
267 std::string S;
268 raw_string_ostream OS(S);
269 OS << "We expect complex pattern uses to have names: " << *N;
270 PrintFatalError(OS.str());
271 }
272
273 // Remember this ComplexPattern so that we can emit it after all the other
274 // structural matches are done.
275 unsigned InputOperand = VariableMap[N->getName()] - 1;
276 MatchedComplexPatterns.push_back(std::make_pair(N, InputOperand));
277 return;
278 }
279
280 if (LeafRec->getName() == "immAllOnesV") {
281 // If this is the root of the dag we're matching, we emit a redundant opcode
282 // check to ensure that this gets folded into the normal top-level
283 // OpcodeSwitch.
284 if (N == Pattern.getSrcPattern()) {
285 const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("build_vector"));
286 AddMatcher(new CheckOpcodeMatcher(NI));
287 }
288 return AddMatcher(new CheckImmAllOnesVMatcher());
289 }
290 if (LeafRec->getName() == "immAllZerosV") {
291 // If this is the root of the dag we're matching, we emit a redundant opcode
292 // check to ensure that this gets folded into the normal top-level
293 // OpcodeSwitch.
294 if (N == Pattern.getSrcPattern()) {
295 const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("build_vector"));
296 AddMatcher(new CheckOpcodeMatcher(NI));
297 }
298 return AddMatcher(new CheckImmAllZerosVMatcher());
299 }
300
301 errs() << "Unknown leaf kind: " << *N << "\n";
302 abort();
303 }
304
EmitOperatorMatchCode(const TreePatternNode * N,TreePatternNode * NodeNoTypes,unsigned ForceMode)305 void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N,
306 TreePatternNode *NodeNoTypes,
307 unsigned ForceMode) {
308 assert(!N->isLeaf() && "Not an operator?");
309
310 if (N->getOperator()->isSubClassOf("ComplexPattern")) {
311 // The "name" of a non-leaf complex pattern (MY_PAT $op1, $op2) is
312 // "MY_PAT:op1:op2". We should already have validated that the uses are
313 // consistent.
314 std::string PatternName = std::string(N->getOperator()->getName());
315 for (unsigned i = 0; i < N->getNumChildren(); ++i) {
316 PatternName += ":";
317 PatternName += N->getChild(i)->getName();
318 }
319
320 if (recordUniqueNode(PatternName)) {
321 auto NodeAndOpNum = std::make_pair(N, NextRecordedOperandNo - 1);
322 MatchedComplexPatterns.push_back(NodeAndOpNum);
323 }
324
325 return;
326 }
327
328 const SDNodeInfo &CInfo = CGP.getSDNodeInfo(N->getOperator());
329
330 // If this is an 'and R, 1234' where the operation is AND/OR and the RHS is
331 // a constant without a predicate fn that has more than one bit set, handle
332 // this as a special case. This is usually for targets that have special
333 // handling of certain large constants (e.g. alpha with it's 8/16/32-bit
334 // handling stuff). Using these instructions is often far more efficient
335 // than materializing the constant. Unfortunately, both the instcombiner
336 // and the dag combiner can often infer that bits are dead, and thus drop
337 // them from the mask in the dag. For example, it might turn 'AND X, 255'
338 // into 'AND X, 254' if it knows the low bit is set. Emit code that checks
339 // to handle this.
340 if ((N->getOperator()->getName() == "and" ||
341 N->getOperator()->getName() == "or") &&
342 N->getChild(1)->isLeaf() && N->getChild(1)->getPredicateCalls().empty() &&
343 N->getPredicateCalls().empty()) {
344 if (IntInit *II = dyn_cast<IntInit>(N->getChild(1)->getLeafValue())) {
345 if (!isPowerOf2_32(II->getValue())) { // Don't bother with single bits.
346 // If this is at the root of the pattern, we emit a redundant
347 // CheckOpcode so that the following checks get factored properly under
348 // a single opcode check.
349 if (N == Pattern.getSrcPattern())
350 AddMatcher(new CheckOpcodeMatcher(CInfo));
351
352 // Emit the CheckAndImm/CheckOrImm node.
353 if (N->getOperator()->getName() == "and")
354 AddMatcher(new CheckAndImmMatcher(II->getValue()));
355 else
356 AddMatcher(new CheckOrImmMatcher(II->getValue()));
357
358 // Match the LHS of the AND as appropriate.
359 AddMatcher(new MoveChildMatcher(0));
360 EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0), ForceMode);
361 AddMatcher(new MoveParentMatcher());
362 return;
363 }
364 }
365 }
366
367 // Check that the current opcode lines up.
368 AddMatcher(new CheckOpcodeMatcher(CInfo));
369
370 // If this node has memory references (i.e. is a load or store), tell the
371 // interpreter to capture them in the memref array.
372 if (N->NodeHasProperty(SDNPMemOperand, CGP))
373 AddMatcher(new RecordMemRefMatcher());
374
375 // If this node has a chain, then the chain is operand #0 is the SDNode, and
376 // the child numbers of the node are all offset by one.
377 unsigned OpNo = 0;
378 if (N->NodeHasProperty(SDNPHasChain, CGP)) {
379 // Record the node and remember it in our chained nodes list.
380 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() +
381 "' chained node",
382 NextRecordedOperandNo));
383 // Remember all of the input chains our pattern will match.
384 MatchedChainNodes.push_back(NextRecordedOperandNo++);
385
386 // Don't look at the input chain when matching the tree pattern to the
387 // SDNode.
388 OpNo = 1;
389
390 // If this node is not the root and the subtree underneath it produces a
391 // chain, then the result of matching the node is also produce a chain.
392 // Beyond that, this means that we're also folding (at least) the root node
393 // into the node that produce the chain (for example, matching
394 // "(add reg, (load ptr))" as a add_with_memory on X86). This is
395 // problematic, if the 'reg' node also uses the load (say, its chain).
396 // Graphically:
397 //
398 // [LD]
399 // ^ ^
400 // | \ DAG's like cheese.
401 // / |
402 // / [YY]
403 // | ^
404 // [XX]--/
405 //
406 // It would be invalid to fold XX and LD. In this case, folding the two
407 // nodes together would induce a cycle in the DAG, making it a 'cyclic DAG'
408 // To prevent this, we emit a dynamic check for legality before allowing
409 // this to be folded.
410 //
411 const TreePatternNode *Root = Pattern.getSrcPattern();
412 if (N != Root) { // Not the root of the pattern.
413 // If there is a node between the root and this node, then we definitely
414 // need to emit the check.
415 bool NeedCheck = !Root->hasChild(N);
416
417 // If it *is* an immediate child of the root, we can still need a check if
418 // the root SDNode has multiple inputs. For us, this means that it is an
419 // intrinsic, has multiple operands, or has other inputs like chain or
420 // glue).
421 if (!NeedCheck) {
422 const SDNodeInfo &PInfo = CGP.getSDNodeInfo(Root->getOperator());
423 NeedCheck =
424 Root->getOperator() == CGP.get_intrinsic_void_sdnode() ||
425 Root->getOperator() == CGP.get_intrinsic_w_chain_sdnode() ||
426 Root->getOperator() == CGP.get_intrinsic_wo_chain_sdnode() ||
427 PInfo.getNumOperands() > 1 ||
428 PInfo.hasProperty(SDNPHasChain) ||
429 PInfo.hasProperty(SDNPInGlue) ||
430 PInfo.hasProperty(SDNPOptInGlue);
431 }
432
433 if (NeedCheck)
434 AddMatcher(new CheckFoldableChainNodeMatcher());
435 }
436 }
437
438 // If this node has an output glue and isn't the root, remember it.
439 if (N->NodeHasProperty(SDNPOutGlue, CGP) &&
440 N != Pattern.getSrcPattern()) {
441 // TODO: This redundantly records nodes with both glues and chains.
442
443 // Record the node and remember it in our chained nodes list.
444 AddMatcher(new RecordMatcher("'" + N->getOperator()->getName().str() +
445 "' glue output node",
446 NextRecordedOperandNo));
447 }
448
449 // If this node is known to have an input glue or if it *might* have an input
450 // glue, capture it as the glue input of the pattern.
451 if (N->NodeHasProperty(SDNPOptInGlue, CGP) ||
452 N->NodeHasProperty(SDNPInGlue, CGP))
453 AddMatcher(new CaptureGlueInputMatcher());
454
455 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
456 // Get the code suitable for matching this child. Move to the child, check
457 // it then move back to the parent.
458 AddMatcher(new MoveChildMatcher(OpNo));
459 EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i), ForceMode);
460 AddMatcher(new MoveParentMatcher());
461 }
462 }
463
recordUniqueNode(ArrayRef<std::string> Names)464 bool MatcherGen::recordUniqueNode(ArrayRef<std::string> Names) {
465 unsigned Entry = 0;
466 for (const std::string &Name : Names) {
467 unsigned &VarMapEntry = VariableMap[Name];
468 if (!Entry)
469 Entry = VarMapEntry;
470 assert(Entry == VarMapEntry);
471 }
472
473 bool NewRecord = false;
474 if (Entry == 0) {
475 // If it is a named node, we must emit a 'Record' opcode.
476 std::string WhatFor;
477 for (const std::string &Name : Names) {
478 if (!WhatFor.empty())
479 WhatFor += ',';
480 WhatFor += "$" + Name;
481 }
482 AddMatcher(new RecordMatcher(WhatFor, NextRecordedOperandNo));
483 Entry = ++NextRecordedOperandNo;
484 NewRecord = true;
485 } else {
486 // If we get here, this is a second reference to a specific name. Since
487 // we already have checked that the first reference is valid, we don't
488 // have to recursively match it, just check that it's the same as the
489 // previously named thing.
490 AddMatcher(new CheckSameMatcher(Entry-1));
491 }
492
493 for (const std::string &Name : Names)
494 VariableMap[Name] = Entry;
495
496 return NewRecord;
497 }
498
EmitMatchCode(const TreePatternNode * N,TreePatternNode * NodeNoTypes,unsigned ForceMode)499 void MatcherGen::EmitMatchCode(const TreePatternNode *N,
500 TreePatternNode *NodeNoTypes,
501 unsigned ForceMode) {
502 // If N and NodeNoTypes don't agree on a type, then this is a case where we
503 // need to do a type check. Emit the check, apply the type to NodeNoTypes and
504 // reinfer any correlated types.
505 SmallVector<unsigned, 2> ResultsToTypeCheck;
506
507 for (unsigned i = 0, e = NodeNoTypes->getNumTypes(); i != e; ++i) {
508 if (NodeNoTypes->getExtType(i) == N->getExtType(i)) continue;
509 NodeNoTypes->setType(i, N->getExtType(i));
510 InferPossibleTypes(ForceMode);
511 ResultsToTypeCheck.push_back(i);
512 }
513
514 // If this node has a name associated with it, capture it in VariableMap. If
515 // we already saw this in the pattern, emit code to verify dagness.
516 SmallVector<std::string, 4> Names;
517 if (!N->getName().empty())
518 Names.push_back(N->getName());
519
520 for (const ScopedName &Name : N->getNamesAsPredicateArg()) {
521 Names.push_back(("pred:" + Twine(Name.getScope()) + ":" + Name.getIdentifier()).str());
522 }
523
524 if (!Names.empty()) {
525 if (!recordUniqueNode(Names))
526 return;
527 }
528
529 if (N->isLeaf())
530 EmitLeafMatchCode(N);
531 else
532 EmitOperatorMatchCode(N, NodeNoTypes, ForceMode);
533
534 // If there are node predicates for this node, generate their checks.
535 for (unsigned i = 0, e = N->getPredicateCalls().size(); i != e; ++i) {
536 const TreePredicateCall &Pred = N->getPredicateCalls()[i];
537 SmallVector<unsigned, 4> Operands;
538 if (Pred.Fn.usesOperands()) {
539 TreePattern *TP = Pred.Fn.getOrigPatFragRecord();
540 for (unsigned i = 0; i < TP->getNumArgs(); ++i) {
541 std::string Name =
542 ("pred:" + Twine(Pred.Scope) + ":" + TP->getArgName(i)).str();
543 Operands.push_back(getNamedArgumentSlot(Name));
544 }
545 }
546 AddMatcher(new CheckPredicateMatcher(Pred.Fn, Operands));
547 }
548
549 for (unsigned i = 0, e = ResultsToTypeCheck.size(); i != e; ++i)
550 AddMatcher(new CheckTypeMatcher(N->getSimpleType(ResultsToTypeCheck[i]),
551 ResultsToTypeCheck[i]));
552 }
553
554 /// EmitMatcherCode - Generate the code that matches the predicate of this
555 /// pattern for the specified Variant. If the variant is invalid this returns
556 /// true and does not generate code, if it is valid, it returns false.
EmitMatcherCode(unsigned Variant)557 bool MatcherGen::EmitMatcherCode(unsigned Variant) {
558 // If the root of the pattern is a ComplexPattern and if it is specified to
559 // match some number of root opcodes, these are considered to be our variants.
560 // Depending on which variant we're generating code for, emit the root opcode
561 // check.
562 if (const ComplexPattern *CP =
563 Pattern.getSrcPattern()->getComplexPatternInfo(CGP)) {
564 const std::vector<Record*> &OpNodes = CP->getRootNodes();
565 assert(!OpNodes.empty() &&"Complex Pattern must specify what it can match");
566 if (Variant >= OpNodes.size()) return true;
567
568 AddMatcher(new CheckOpcodeMatcher(CGP.getSDNodeInfo(OpNodes[Variant])));
569 } else {
570 if (Variant != 0) return true;
571 }
572
573 // Emit the matcher for the pattern structure and types.
574 EmitMatchCode(Pattern.getSrcPattern(), PatWithNoTypes.get(),
575 Pattern.ForceMode);
576
577 // If the pattern has a predicate on it (e.g. only enabled when a subtarget
578 // feature is around, do the check).
579 if (!Pattern.getPredicateCheck().empty())
580 AddMatcher(new CheckPatternPredicateMatcher(Pattern.getPredicateCheck()));
581
582 // Now that we've completed the structural type match, emit any ComplexPattern
583 // checks (e.g. addrmode matches). We emit this after the structural match
584 // because they are generally more expensive to evaluate and more difficult to
585 // factor.
586 for (unsigned i = 0, e = MatchedComplexPatterns.size(); i != e; ++i) {
587 auto N = MatchedComplexPatterns[i].first;
588
589 // Remember where the results of this match get stuck.
590 if (N->isLeaf()) {
591 NamedComplexPatternOperands[N->getName()] = NextRecordedOperandNo + 1;
592 } else {
593 unsigned CurOp = NextRecordedOperandNo;
594 for (unsigned i = 0; i < N->getNumChildren(); ++i) {
595 NamedComplexPatternOperands[N->getChild(i)->getName()] = CurOp + 1;
596 CurOp += N->getChild(i)->getNumMIResults(CGP);
597 }
598 }
599
600 // Get the slot we recorded the value in from the name on the node.
601 unsigned RecNodeEntry = MatchedComplexPatterns[i].second;
602
603 const ComplexPattern &CP = *N->getComplexPatternInfo(CGP);
604
605 // Emit a CheckComplexPat operation, which does the match (aborting if it
606 // fails) and pushes the matched operands onto the recorded nodes list.
607 AddMatcher(new CheckComplexPatMatcher(CP, RecNodeEntry,
608 N->getName(), NextRecordedOperandNo));
609
610 // Record the right number of operands.
611 NextRecordedOperandNo += CP.getNumOperands();
612 if (CP.hasProperty(SDNPHasChain)) {
613 // If the complex pattern has a chain, then we need to keep track of the
614 // fact that we just recorded a chain input. The chain input will be
615 // matched as the last operand of the predicate if it was successful.
616 ++NextRecordedOperandNo; // Chained node operand.
617
618 // It is the last operand recorded.
619 assert(NextRecordedOperandNo > 1 &&
620 "Should have recorded input/result chains at least!");
621 MatchedChainNodes.push_back(NextRecordedOperandNo-1);
622 }
623
624 // TODO: Complex patterns can't have output glues, if they did, we'd want
625 // to record them.
626 }
627
628 return false;
629 }
630
631
632 //===----------------------------------------------------------------------===//
633 // Node Result Generation
634 //===----------------------------------------------------------------------===//
635
EmitResultOfNamedOperand(const TreePatternNode * N,SmallVectorImpl<unsigned> & ResultOps)636 void MatcherGen::EmitResultOfNamedOperand(const TreePatternNode *N,
637 SmallVectorImpl<unsigned> &ResultOps){
638 assert(!N->getName().empty() && "Operand not named!");
639
640 if (unsigned SlotNo = NamedComplexPatternOperands[N->getName()]) {
641 // Complex operands have already been completely selected, just find the
642 // right slot ant add the arguments directly.
643 for (unsigned i = 0; i < N->getNumMIResults(CGP); ++i)
644 ResultOps.push_back(SlotNo - 1 + i);
645
646 return;
647 }
648
649 unsigned SlotNo = getNamedArgumentSlot(N->getName());
650
651 // If this is an 'imm' or 'fpimm' node, make sure to convert it to the target
652 // version of the immediate so that it doesn't get selected due to some other
653 // node use.
654 if (!N->isLeaf()) {
655 StringRef OperatorName = N->getOperator()->getName();
656 if (OperatorName == "imm" || OperatorName == "fpimm") {
657 AddMatcher(new EmitConvertToTargetMatcher(SlotNo));
658 ResultOps.push_back(NextRecordedOperandNo++);
659 return;
660 }
661 }
662
663 for (unsigned i = 0; i < N->getNumMIResults(CGP); ++i)
664 ResultOps.push_back(SlotNo + i);
665 }
666
EmitResultLeafAsOperand(const TreePatternNode * N,SmallVectorImpl<unsigned> & ResultOps)667 void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
668 SmallVectorImpl<unsigned> &ResultOps) {
669 assert(N->isLeaf() && "Must be a leaf");
670
671 if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) {
672 AddMatcher(new EmitIntegerMatcher(II->getValue(), N->getSimpleType(0)));
673 ResultOps.push_back(NextRecordedOperandNo++);
674 return;
675 }
676
677 // If this is an explicit register reference, handle it.
678 if (DefInit *DI = dyn_cast<DefInit>(N->getLeafValue())) {
679 Record *Def = DI->getDef();
680 if (Def->isSubClassOf("Register")) {
681 const CodeGenRegister *Reg =
682 CGP.getTargetInfo().getRegBank().getReg(Def);
683 AddMatcher(new EmitRegisterMatcher(Reg, N->getSimpleType(0)));
684 ResultOps.push_back(NextRecordedOperandNo++);
685 return;
686 }
687
688 if (Def->getName() == "zero_reg") {
689 AddMatcher(new EmitRegisterMatcher(nullptr, N->getSimpleType(0)));
690 ResultOps.push_back(NextRecordedOperandNo++);
691 return;
692 }
693
694 if (Def->getName() == "undef_tied_input") {
695 std::array<MVT::SimpleValueType, 1> ResultVTs = {{ N->getSimpleType(0) }};
696 std::array<unsigned, 0> InstOps;
697 auto IDOperandNo = NextRecordedOperandNo++;
698 AddMatcher(new EmitNodeMatcher("TargetOpcode::IMPLICIT_DEF",
699 ResultVTs, InstOps, false, false, false,
700 false, -1, IDOperandNo));
701 ResultOps.push_back(IDOperandNo);
702 return;
703 }
704
705 // Handle a reference to a register class. This is used
706 // in COPY_TO_SUBREG instructions.
707 if (Def->isSubClassOf("RegisterOperand"))
708 Def = Def->getValueAsDef("RegClass");
709 if (Def->isSubClassOf("RegisterClass")) {
710 // If the register class has an enum integer value greater than 127, the
711 // encoding overflows the limit of 7 bits, which precludes the use of
712 // StringIntegerMatcher. In this case, fallback to using IntegerMatcher.
713 const CodeGenRegisterClass &RC =
714 CGP.getTargetInfo().getRegisterClass(Def);
715 if (RC.EnumValue <= 127) {
716 std::string Value = getQualifiedName(Def) + "RegClassID";
717 AddMatcher(new EmitStringIntegerMatcher(Value, MVT::i32));
718 ResultOps.push_back(NextRecordedOperandNo++);
719 } else {
720 AddMatcher(new EmitIntegerMatcher(RC.EnumValue, MVT::i32));
721 ResultOps.push_back(NextRecordedOperandNo++);
722 }
723 return;
724 }
725
726 // Handle a subregister index. This is used for INSERT_SUBREG etc.
727 if (Def->isSubClassOf("SubRegIndex")) {
728 const CodeGenRegBank &RB = CGP.getTargetInfo().getRegBank();
729 // If we have more than 127 subreg indices the encoding can overflow
730 // 7 bit and we cannot use StringInteger.
731 if (RB.getSubRegIndices().size() > 127) {
732 const CodeGenSubRegIndex *I = RB.findSubRegIdx(Def);
733 assert(I && "Cannot find subreg index by name!");
734 if (I->EnumValue > 127) {
735 AddMatcher(new EmitIntegerMatcher(I->EnumValue, MVT::i32));
736 ResultOps.push_back(NextRecordedOperandNo++);
737 return;
738 }
739 }
740 std::string Value = getQualifiedName(Def);
741 AddMatcher(new EmitStringIntegerMatcher(Value, MVT::i32));
742 ResultOps.push_back(NextRecordedOperandNo++);
743 return;
744 }
745 }
746
747 errs() << "unhandled leaf node: \n";
748 N->dump();
749 }
750
751 static bool
mayInstNodeLoadOrStore(const TreePatternNode * N,const CodeGenDAGPatterns & CGP)752 mayInstNodeLoadOrStore(const TreePatternNode *N,
753 const CodeGenDAGPatterns &CGP) {
754 Record *Op = N->getOperator();
755 const CodeGenTarget &CGT = CGP.getTargetInfo();
756 CodeGenInstruction &II = CGT.getInstruction(Op);
757 return II.mayLoad || II.mayStore;
758 }
759
760 static unsigned
numNodesThatMayLoadOrStore(const TreePatternNode * N,const CodeGenDAGPatterns & CGP)761 numNodesThatMayLoadOrStore(const TreePatternNode *N,
762 const CodeGenDAGPatterns &CGP) {
763 if (N->isLeaf())
764 return 0;
765
766 Record *OpRec = N->getOperator();
767 if (!OpRec->isSubClassOf("Instruction"))
768 return 0;
769
770 unsigned Count = 0;
771 if (mayInstNodeLoadOrStore(N, CGP))
772 ++Count;
773
774 for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i)
775 Count += numNodesThatMayLoadOrStore(N->getChild(i), CGP);
776
777 return Count;
778 }
779
780 void MatcherGen::
EmitResultInstructionAsOperand(const TreePatternNode * N,SmallVectorImpl<unsigned> & OutputOps)781 EmitResultInstructionAsOperand(const TreePatternNode *N,
782 SmallVectorImpl<unsigned> &OutputOps) {
783 Record *Op = N->getOperator();
784 const CodeGenTarget &CGT = CGP.getTargetInfo();
785 CodeGenInstruction &II = CGT.getInstruction(Op);
786 const DAGInstruction &Inst = CGP.getInstruction(Op);
787
788 bool isRoot = N == Pattern.getDstPattern();
789
790 // TreeHasOutGlue - True if this tree has glue.
791 bool TreeHasInGlue = false, TreeHasOutGlue = false;
792 if (isRoot) {
793 const TreePatternNode *SrcPat = Pattern.getSrcPattern();
794 TreeHasInGlue = SrcPat->TreeHasProperty(SDNPOptInGlue, CGP) ||
795 SrcPat->TreeHasProperty(SDNPInGlue, CGP);
796
797 // FIXME2: this is checking the entire pattern, not just the node in
798 // question, doing this just for the root seems like a total hack.
799 TreeHasOutGlue = SrcPat->TreeHasProperty(SDNPOutGlue, CGP);
800 }
801
802 // NumResults - This is the number of results produced by the instruction in
803 // the "outs" list.
804 unsigned NumResults = Inst.getNumResults();
805
806 // Number of operands we know the output instruction must have. If it is
807 // variadic, we could have more operands.
808 unsigned NumFixedOperands = II.Operands.size();
809
810 SmallVector<unsigned, 8> InstOps;
811
812 // Loop over all of the fixed operands of the instruction pattern, emitting
813 // code to fill them all in. The node 'N' usually has number children equal to
814 // the number of input operands of the instruction. However, in cases where
815 // there are predicate operands for an instruction, we need to fill in the
816 // 'execute always' values. Match up the node operands to the instruction
817 // operands to do this.
818 unsigned ChildNo = 0;
819
820 // Similarly to the code in TreePatternNode::ApplyTypeConstraints, count the
821 // number of operands at the end of the list which have default values.
822 // Those can come from the pattern if it provides enough arguments, or be
823 // filled in with the default if the pattern hasn't provided them. But any
824 // operand with a default value _before_ the last mandatory one will be
825 // filled in with their defaults unconditionally.
826 unsigned NonOverridableOperands = NumFixedOperands;
827 while (NonOverridableOperands > NumResults &&
828 CGP.operandHasDefault(II.Operands[NonOverridableOperands-1].Rec))
829 --NonOverridableOperands;
830
831 for (unsigned InstOpNo = NumResults, e = NumFixedOperands;
832 InstOpNo != e; ++InstOpNo) {
833 // Determine what to emit for this operand.
834 Record *OperandNode = II.Operands[InstOpNo].Rec;
835 if (CGP.operandHasDefault(OperandNode) &&
836 (InstOpNo < NonOverridableOperands || ChildNo >= N->getNumChildren())) {
837 // This is a predicate or optional def operand which the pattern has not
838 // overridden, or which we aren't letting it override; emit the 'default
839 // ops' operands.
840 const DAGDefaultOperand &DefaultOp
841 = CGP.getDefaultOperand(OperandNode);
842 for (unsigned i = 0, e = DefaultOp.DefaultOps.size(); i != e; ++i)
843 EmitResultOperand(DefaultOp.DefaultOps[i].get(), InstOps);
844 continue;
845 }
846
847 // Otherwise this is a normal operand or a predicate operand without
848 // 'execute always'; emit it.
849
850 // For operands with multiple sub-operands we may need to emit
851 // multiple child patterns to cover them all. However, ComplexPattern
852 // children may themselves emit multiple MI operands.
853 unsigned NumSubOps = 1;
854 if (OperandNode->isSubClassOf("Operand")) {
855 DagInit *MIOpInfo = OperandNode->getValueAsDag("MIOperandInfo");
856 if (unsigned NumArgs = MIOpInfo->getNumArgs())
857 NumSubOps = NumArgs;
858 }
859
860 unsigned FinalNumOps = InstOps.size() + NumSubOps;
861 while (InstOps.size() < FinalNumOps) {
862 const TreePatternNode *Child = N->getChild(ChildNo);
863 unsigned BeforeAddingNumOps = InstOps.size();
864 EmitResultOperand(Child, InstOps);
865 assert(InstOps.size() > BeforeAddingNumOps && "Didn't add any operands");
866
867 // If the operand is an instruction and it produced multiple results, just
868 // take the first one.
869 if (!Child->isLeaf() && Child->getOperator()->isSubClassOf("Instruction"))
870 InstOps.resize(BeforeAddingNumOps+1);
871
872 ++ChildNo;
873 }
874 }
875
876 // If this is a variadic output instruction (i.e. REG_SEQUENCE), we can't
877 // expand suboperands, use default operands, or other features determined from
878 // the CodeGenInstruction after the fixed operands, which were handled
879 // above. Emit the remaining instructions implicitly added by the use for
880 // variable_ops.
881 if (II.Operands.isVariadic) {
882 for (unsigned I = ChildNo, E = N->getNumChildren(); I < E; ++I)
883 EmitResultOperand(N->getChild(I), InstOps);
884 }
885
886 // If this node has input glue or explicitly specified input physregs, we
887 // need to add chained and glued copyfromreg nodes and materialize the glue
888 // input.
889 if (isRoot && !PhysRegInputs.empty()) {
890 // Emit all of the CopyToReg nodes for the input physical registers. These
891 // occur in patterns like (mul:i8 AL:i8, GR8:i8:$src).
892 for (unsigned i = 0, e = PhysRegInputs.size(); i != e; ++i) {
893 const CodeGenRegister *Reg =
894 CGP.getTargetInfo().getRegBank().getReg(PhysRegInputs[i].first);
895 AddMatcher(new EmitCopyToRegMatcher(PhysRegInputs[i].second,
896 Reg));
897 }
898
899 // Even if the node has no other glue inputs, the resultant node must be
900 // glued to the CopyFromReg nodes we just generated.
901 TreeHasInGlue = true;
902 }
903
904 // Result order: node results, chain, glue
905
906 // Determine the result types.
907 SmallVector<MVT::SimpleValueType, 4> ResultVTs;
908 for (unsigned i = 0, e = N->getNumTypes(); i != e; ++i)
909 ResultVTs.push_back(N->getSimpleType(i));
910
911 // If this is the root instruction of a pattern that has physical registers in
912 // its result pattern, add output VTs for them. For example, X86 has:
913 // (set AL, (mul ...))
914 // This also handles implicit results like:
915 // (implicit EFLAGS)
916 if (isRoot && !Pattern.getDstRegs().empty()) {
917 // If the root came from an implicit def in the instruction handling stuff,
918 // don't re-add it.
919 Record *HandledReg = nullptr;
920 if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other)
921 HandledReg = II.ImplicitDefs[0];
922
923 for (Record *Reg : Pattern.getDstRegs()) {
924 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue;
925 ResultVTs.push_back(getRegisterValueType(Reg, CGT));
926 }
927 }
928
929 // If this is the root of the pattern and the pattern we're matching includes
930 // a node that is variadic, mark the generated node as variadic so that it
931 // gets the excess operands from the input DAG.
932 int NumFixedArityOperands = -1;
933 if (isRoot &&
934 Pattern.getSrcPattern()->NodeHasProperty(SDNPVariadic, CGP))
935 NumFixedArityOperands = Pattern.getSrcPattern()->getNumChildren();
936
937 // If this is the root node and multiple matched nodes in the input pattern
938 // have MemRefs in them, have the interpreter collect them and plop them onto
939 // this node. If there is just one node with MemRefs, leave them on that node
940 // even if it is not the root.
941 //
942 // FIXME3: This is actively incorrect for result patterns with multiple
943 // memory-referencing instructions.
944 bool PatternHasMemOperands =
945 Pattern.getSrcPattern()->TreeHasProperty(SDNPMemOperand, CGP);
946
947 bool NodeHasMemRefs = false;
948 if (PatternHasMemOperands) {
949 unsigned NumNodesThatLoadOrStore =
950 numNodesThatMayLoadOrStore(Pattern.getDstPattern(), CGP);
951 bool NodeIsUniqueLoadOrStore = mayInstNodeLoadOrStore(N, CGP) &&
952 NumNodesThatLoadOrStore == 1;
953 NodeHasMemRefs =
954 NodeIsUniqueLoadOrStore || (isRoot && (mayInstNodeLoadOrStore(N, CGP) ||
955 NumNodesThatLoadOrStore != 1));
956 }
957
958 // Determine whether we need to attach a chain to this node.
959 bool NodeHasChain = false;
960 if (Pattern.getSrcPattern()->TreeHasProperty(SDNPHasChain, CGP)) {
961 // For some instructions, we were able to infer from the pattern whether
962 // they should have a chain. Otherwise, attach the chain to the root.
963 //
964 // FIXME2: This is extremely dubious for several reasons, not the least of
965 // which it gives special status to instructions with patterns that Pat<>
966 // nodes can't duplicate.
967 if (II.hasChain_Inferred)
968 NodeHasChain = II.hasChain;
969 else
970 NodeHasChain = isRoot;
971 // Instructions which load and store from memory should have a chain,
972 // regardless of whether they happen to have a pattern saying so.
973 if (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad ||
974 II.hasSideEffects)
975 NodeHasChain = true;
976 }
977
978 assert((!ResultVTs.empty() || TreeHasOutGlue || NodeHasChain) &&
979 "Node has no result");
980
981 AddMatcher(new EmitNodeMatcher(II.Namespace.str()+"::"+II.TheDef->getName().str(),
982 ResultVTs, InstOps,
983 NodeHasChain, TreeHasInGlue, TreeHasOutGlue,
984 NodeHasMemRefs, NumFixedArityOperands,
985 NextRecordedOperandNo));
986
987 // The non-chain and non-glue results of the newly emitted node get recorded.
988 for (unsigned i = 0, e = ResultVTs.size(); i != e; ++i) {
989 if (ResultVTs[i] == MVT::Other || ResultVTs[i] == MVT::Glue) break;
990 OutputOps.push_back(NextRecordedOperandNo++);
991 }
992 }
993
994 void MatcherGen::
EmitResultSDNodeXFormAsOperand(const TreePatternNode * N,SmallVectorImpl<unsigned> & ResultOps)995 EmitResultSDNodeXFormAsOperand(const TreePatternNode *N,
996 SmallVectorImpl<unsigned> &ResultOps) {
997 assert(N->getOperator()->isSubClassOf("SDNodeXForm") && "Not SDNodeXForm?");
998
999 // Emit the operand.
1000 SmallVector<unsigned, 8> InputOps;
1001
1002 // FIXME2: Could easily generalize this to support multiple inputs and outputs
1003 // to the SDNodeXForm. For now we just support one input and one output like
1004 // the old instruction selector.
1005 assert(N->getNumChildren() == 1);
1006 EmitResultOperand(N->getChild(0), InputOps);
1007
1008 // The input currently must have produced exactly one result.
1009 assert(InputOps.size() == 1 && "Unexpected input to SDNodeXForm");
1010
1011 AddMatcher(new EmitNodeXFormMatcher(InputOps[0], N->getOperator()));
1012 ResultOps.push_back(NextRecordedOperandNo++);
1013 }
1014
EmitResultOperand(const TreePatternNode * N,SmallVectorImpl<unsigned> & ResultOps)1015 void MatcherGen::EmitResultOperand(const TreePatternNode *N,
1016 SmallVectorImpl<unsigned> &ResultOps) {
1017 // This is something selected from the pattern we matched.
1018 if (!N->getName().empty())
1019 return EmitResultOfNamedOperand(N, ResultOps);
1020
1021 if (N->isLeaf())
1022 return EmitResultLeafAsOperand(N, ResultOps);
1023
1024 Record *OpRec = N->getOperator();
1025 if (OpRec->isSubClassOf("Instruction"))
1026 return EmitResultInstructionAsOperand(N, ResultOps);
1027 if (OpRec->isSubClassOf("SDNodeXForm"))
1028 return EmitResultSDNodeXFormAsOperand(N, ResultOps);
1029 errs() << "Unknown result node to emit code for: " << *N << '\n';
1030 PrintFatalError("Unknown node in result pattern!");
1031 }
1032
EmitResultCode()1033 void MatcherGen::EmitResultCode() {
1034 // Patterns that match nodes with (potentially multiple) chain inputs have to
1035 // merge them together into a token factor. This informs the generated code
1036 // what all the chained nodes are.
1037 if (!MatchedChainNodes.empty())
1038 AddMatcher(new EmitMergeInputChainsMatcher(MatchedChainNodes));
1039
1040 // Codegen the root of the result pattern, capturing the resulting values.
1041 SmallVector<unsigned, 8> Ops;
1042 EmitResultOperand(Pattern.getDstPattern(), Ops);
1043
1044 // At this point, we have however many values the result pattern produces.
1045 // However, the input pattern might not need all of these. If there are
1046 // excess values at the end (such as implicit defs of condition codes etc)
1047 // just lop them off. This doesn't need to worry about glue or chains, just
1048 // explicit results.
1049 //
1050 unsigned NumSrcResults = Pattern.getSrcPattern()->getNumTypes();
1051
1052 // If the pattern also has (implicit) results, count them as well.
1053 if (!Pattern.getDstRegs().empty()) {
1054 // If the root came from an implicit def in the instruction handling stuff,
1055 // don't re-add it.
1056 Record *HandledReg = nullptr;
1057 const TreePatternNode *DstPat = Pattern.getDstPattern();
1058 if (!DstPat->isLeaf() &&DstPat->getOperator()->isSubClassOf("Instruction")){
1059 const CodeGenTarget &CGT = CGP.getTargetInfo();
1060 CodeGenInstruction &II = CGT.getInstruction(DstPat->getOperator());
1061
1062 if (II.HasOneImplicitDefWithKnownVT(CGT) != MVT::Other)
1063 HandledReg = II.ImplicitDefs[0];
1064 }
1065
1066 for (Record *Reg : Pattern.getDstRegs()) {
1067 if (!Reg->isSubClassOf("Register") || Reg == HandledReg) continue;
1068 ++NumSrcResults;
1069 }
1070 }
1071
1072 SmallVector<unsigned, 8> Results(Ops);
1073
1074 // Apply result permutation.
1075 for (unsigned ResNo = 0; ResNo < Pattern.getDstPattern()->getNumResults();
1076 ++ResNo) {
1077 Results[ResNo] = Ops[Pattern.getDstPattern()->getResultIndex(ResNo)];
1078 }
1079
1080 Results.resize(NumSrcResults);
1081 AddMatcher(new CompleteMatchMatcher(Results, Pattern));
1082 }
1083
1084
1085 /// ConvertPatternToMatcher - Create the matcher for the specified pattern with
1086 /// the specified variant. If the variant number is invalid, this returns null.
ConvertPatternToMatcher(const PatternToMatch & Pattern,unsigned Variant,const CodeGenDAGPatterns & CGP)1087 Matcher *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern,
1088 unsigned Variant,
1089 const CodeGenDAGPatterns &CGP) {
1090 MatcherGen Gen(Pattern, CGP);
1091
1092 // Generate the code for the matcher.
1093 if (Gen.EmitMatcherCode(Variant))
1094 return nullptr;
1095
1096 // FIXME2: Kill extra MoveParent commands at the end of the matcher sequence.
1097 // FIXME2: Split result code out to another table, and make the matcher end
1098 // with an "Emit <index>" command. This allows result generation stuff to be
1099 // shared and factored?
1100
1101 // If the match succeeds, then we generate Pattern.
1102 Gen.EmitResultCode();
1103
1104 // Unconditional match.
1105 return Gen.GetMatcher();
1106 }
1107