1 //===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the Machinelegalizer class for
10 /// AArch64.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
16 
17 #include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
18 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
19 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
20 
21 namespace llvm {
22 
23 class LLVMContext;
24 class AArch64Subtarget;
25 
26 /// This class provides the information for the target register banks.
27 class AArch64LegalizerInfo : public LegalizerInfo {
28 public:
29   AArch64LegalizerInfo(const AArch64Subtarget &ST);
30 
31   bool legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI) const override;
32 
33   bool legalizeIntrinsic(LegalizerHelper &Helper,
34                          MachineInstr &MI) const override;
35 
36 private:
37   bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
38                      MachineIRBuilder &MIRBuilder) const;
39   bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
40                          MachineIRBuilder &MIRBuilder,
41                          GISelChangeObserver &Observer) const;
42   bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
43                            MachineIRBuilder &MIRBuilder,
44                            GISelChangeObserver &Observer) const;
45 
46   bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
47                                   MachineIRBuilder &MIRBuilder,
48                                   GISelChangeObserver &Observer) const;
49   bool legalizeVectorTrunc(MachineInstr &MI, LegalizerHelper &Helper) const;
50   const AArch64Subtarget *ST;
51 };
52 } // End llvm namespace.
53 #endif
54