1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
3
4declare double @llvm.sqrt.f64(double)
5
6; Test several VSX FMA mutation opportunities.
7
8; This is reasonable transformation since it eliminates extra register copy.
9define double @foo3_fmf(double %a) nounwind {
10; CHECK-LABEL: foo3_fmf:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    xstsqrtdp 0, 1
13; CHECK-NEXT:    bc 12, 2, .LBB0_2
14; CHECK-NEXT:  # %bb.1:
15; CHECK-NEXT:    xsrsqrtedp 0, 1
16; CHECK-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
17; CHECK-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
18; CHECK-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
19; CHECK-NEXT:    lfs 4, .LCPI0_1@toc@l(3)
20; CHECK-NEXT:    xsmuldp 2, 1, 0
21; CHECK-NEXT:    xsmaddmdp 2, 0, 3
22; CHECK-NEXT:    xsmuldp 0, 0, 4
23; CHECK-NEXT:    xsmuldp 0, 0, 2
24; CHECK-NEXT:    xsmuldp 1, 1, 0
25; CHECK-NEXT:    xsmaddadp 3, 1, 0
26; CHECK-NEXT:    xsmuldp 0, 1, 4
27; CHECK-NEXT:    xsmuldp 1, 0, 3
28; CHECK-NEXT:    blr
29; CHECK-NEXT:  .LBB0_2:
30; CHECK-NEXT:    xssqrtdp 1, 1
31; CHECK-NEXT:    blr
32  %r = call reassoc afn ninf double @llvm.sqrt.f64(double %a)
33  ret double %r
34}
35
36define double @foo3_safe(double %a) nounwind {
37; CHECK-LABEL: foo3_safe:
38; CHECK:       # %bb.0:
39; CHECK-NEXT:    xssqrtdp 1, 1
40; CHECK-NEXT:    blr
41  %r = call double @llvm.sqrt.f64(double %a)
42  ret double %r
43}
44
45