1; RUN: llc < %s -mcpu=a2 -verify-machineinstrs | FileCheck %s 2; RUN: llc < %s -mcpu=a2 -disable-lsr -verify-machineinstrs | FileCheck -check-prefix=NOLSR %s 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 4target triple = "powerpc64-unknown-linux-gnu" 5 6define void @main() #0 { 7entry: 8 br i1 undef, label %for.end, label %for.body 9 10for.body: ; preds = %for.body, %entry 11 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] 12 %indvars.iv.next = add i64 %indvars.iv, 1 13 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 14 %exitcond = icmp eq i32 %lftr.wideiv, 0 15 br i1 %exitcond, label %for.end, label %for.body 16 17; CHECK: @main 18; CHECK: li [[REG:[0-9]+]], -1 19; CHECK: rldic [[REG2:[0-9]+]], [[REG]], 0, 32 20; CHECK: mtctr [[REG2]] 21; CHECK: bdnz 22 23for.end: ; preds = %for.body, %entry 24 ret void 25} 26 27define void @main1() #0 { 28entry: 29 br i1 undef, label %for.end, label %for.body 30 31for.body: ; preds = %for.body, %entry 32 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] 33 %indvars.iv.next = add i64 %indvars.iv, 1 34 %exitcond = icmp eq i64 %indvars.iv.next, 0 35 br i1 %exitcond, label %for.end, label %for.body 36 37; FIXME: This should be a hardware loop. 38; cmp is optimized to uadd intrinsic in CGP pass which can not be recognized in 39; later HardwareLoops Pass. 40; CHECK: @main1 41; CHECK: li [[REG:[0-9]+]], 1 42; CHECK: addi [[REG2:[0-9]+]], [[REG]], 1 43; CHECK: cmpld 44; CHECK: bge 45 46for.end: ; preds = %for.body, %entry 47 ret void 48} 49 50define void @main2() #0 { 51entry: 52 br i1 undef, label %for.end, label %for.body 53 54for.body: ; preds = %for.body, %entry 55 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ] 56 %indvars.iv.next = add i64 %indvars.iv, 1 57 %exitcond = icmp eq i64 %indvars.iv.next, -100000 58 br i1 %exitcond, label %for.end, label %for.body 59 60; CHECK: @main2 61; CHECK: lis [[REG:[0-9]+]], -2 62; CHECK: ori [[REG2:[0-9]+]], [[REG]], 31071 63; CHECK: mtctr [[REG2]] 64; CHECK: bdnz 65 66for.end: ; preds = %for.body, %entry 67 ret void 68} 69 70define void @main3() #0 { 71entry: 72 br i1 undef, label %for.end, label %for.body 73 74for.body: ; preds = %for.body, %entry 75 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 127984, %entry ] 76 %indvars.iv.next = add i64 %indvars.iv, -16 77 %exitcond = icmp eq i64 %indvars.iv.next, -16 78 br i1 %exitcond, label %for.end, label %for.body 79 80; NOLSR: @main3 81; NOLSR: li [[REG:[0-9]+]], 8000 82; NOLSR: mtctr [[REG]] 83; NOLSR: bdnz 84 85for.end: ; preds = %for.body, %entry 86 ret void 87} 88 89attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } 90