1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = dso_local local_unnamed_addr global i8 0, align 1 10 11; Function Attrs: norecurse nounwind readnone 12define dso_local signext i32 @test_iltuc(i8 zeroext %a, i8 zeroext %b) { 13; CHECK-LABEL: test_iltuc: 14; CHECK: # %bb.0: # %entry 15; CHECK-NEXT: sub r3, r3, r4 16; CHECK-NEXT: rldicl r3, r3, 1, 63 17; CHECK-NEXT: blr 18entry: 19 %cmp = icmp ult i8 %a, %b 20 %conv2 = zext i1 %cmp to i32 21 ret i32 %conv2 22} 23 24; Function Attrs: norecurse nounwind readnone 25define dso_local signext i32 @test_iltuc_sext(i8 zeroext %a, i8 zeroext %b) { 26; CHECK-LABEL: test_iltuc_sext: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: sub r3, r3, r4 29; CHECK-NEXT: sradi r3, r3, 63 30; CHECK-NEXT: blr 31entry: 32 %cmp = icmp ult i8 %a, %b 33 %sub = sext i1 %cmp to i32 34 ret i32 %sub 35} 36 37; Function Attrs: norecurse nounwind 38define dso_local void @test_iltuc_store(i8 zeroext %a, i8 zeroext %b) { 39; CHECK-LABEL: test_iltuc_store: 40; CHECK: # %bb.0: # %entry 41; CHECK-NEXT: sub r3, r3, r4 42; CHECK-NEXT: addis r5, r2, glob@toc@ha 43; CHECK-NEXT: rldicl r3, r3, 1, 63 44; CHECK-NEXT: stb r3, glob@toc@l(r5) 45; CHECK-NEXT: blr 46entry: 47 %cmp = icmp ult i8 %a, %b 48 %conv3 = zext i1 %cmp to i8 49 store i8 %conv3, i8* @glob, align 1 50 ret void 51} 52 53; Function Attrs: norecurse nounwind 54define dso_local void @test_iltuc_sext_store(i8 zeroext %a, i8 zeroext %b) { 55; CHECK-LABEL: test_iltuc_sext_store: 56; CHECK: # %bb.0: # %entry 57; CHECK-NEXT: sub r3, r3, r4 58; CHECK-NEXT: addis r5, r2, glob@toc@ha 59; CHECK-NEXT: sradi r3, r3, 63 60; CHECK-NEXT: stb r3, glob@toc@l(r5) 61; CHECK-NEXT: blr 62entry: 63 %cmp = icmp ult i8 %a, %b 64 %conv3 = sext i1 %cmp to i8 65 store i8 %conv3, i8* @glob, align 1 66 ret void 67} 68