1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 8 9@glob = dso_local local_unnamed_addr global i16 0, align 2 10 11; Function Attrs: norecurse nounwind readnone 12define i64 @test_llltus(i16 zeroext %a, i16 zeroext %b) { 13; CHECK-LABEL: test_llltus: 14; CHECK: # %bb.0: # %entry 15; CHECK-NEXT: sub r3, r3, r4 16; CHECK-NEXT: rldicl r3, r3, 1, 63 17; CHECK-NEXT: blr 18entry: 19 %cmp = icmp ult i16 %a, %b 20 %conv3 = zext i1 %cmp to i64 21 ret i64 %conv3 22} 23 24; Function Attrs: norecurse nounwind readnone 25define i64 @test_llltus_sext(i16 zeroext %a, i16 zeroext %b) { 26; CHECK-LABEL: test_llltus_sext: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: sub r3, r3, r4 29; CHECK-NEXT: sradi r3, r3, 63 30; CHECK-NEXT: blr 31entry: 32 %cmp = icmp ult i16 %a, %b 33 %conv3 = sext i1 %cmp to i64 34 ret i64 %conv3 35} 36 37; Function Attrs: norecurse nounwind 38define dso_local void @test_llltus_store(i16 zeroext %a, i16 zeroext %b) { 39; CHECK-LABEL: test_llltus_store: 40; CHECK: # %bb.0: # %entry 41; CHECK-NEXT: sub r3, r3, r4 42; CHECK-NEXT: addis r5, r2, glob@toc@ha 43; CHECK-NEXT: rldicl r3, r3, 1, 63 44; CHECK-NEXT: sth r3, glob@toc@l(r5) 45; CHECK-NEXT: blr 46entry: 47 %cmp = icmp ult i16 %a, %b 48 %conv3 = zext i1 %cmp to i16 49 store i16 %conv3, i16* @glob, align 2 50 ret void 51} 52 53; Function Attrs: norecurse nounwind 54define dso_local void @test_llltus_sext_store(i16 zeroext %a, i16 zeroext %b) { 55; CHECK-LABEL: test_llltus_sext_store: 56; CHECK: # %bb.0: # %entry 57; CHECK-NEXT: sub r3, r3, r4 58; CHECK-NEXT: addis r5, r2, glob@toc@ha 59; CHECK-NEXT: sradi r3, r3, 63 60; CHECK-NEXT: sth r3, glob@toc@l(r5) 61; CHECK-NEXT: blr 62entry: 63 %cmp = icmp ult i16 %a, %b 64 %conv3 = sext i1 %cmp to i16 65 store i16 %conv3, i16* @glob, align 2 66 ret void 67} 68