1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = dso_local local_unnamed_addr global i64 0, align 8
10
11define i64 @test_llneull(i64 %a, i64 %b) {
12; CHECK-LABEL: test_llneull:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    xor r3, r3, r4
15; CHECK-NEXT:    addic r4, r3, -1
16; CHECK-NEXT:    subfe r3, r4, r3
17; CHECK-NEXT:    blr
18; CHECK-BE-LABEL: test_llneull:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    xor r3, r3, r4
21; CHECK-BE-NEXT:    addic r4, r3, -1
22; CHECK-BE-NEXT:    subfe r3, r4, r3
23; CHECK-BE-NEXT:    blr
24;
25; CHECK-LE-LABEL: test_llneull:
26; CHECK-LE:       # %bb.0: # %entry
27; CHECK-LE-NEXT:    xor r3, r3, r4
28; CHECK-LE-NEXT:    addic r4, r3, -1
29; CHECK-LE-NEXT:    subfe r3, r4, r3
30; CHECK-LE-NEXT:    blr
31entry:
32  %cmp = icmp ne i64 %a, %b
33  %conv1 = zext i1 %cmp to i64
34  ret i64 %conv1
35}
36
37define i64 @test_llneull_sext(i64 %a, i64 %b) {
38; CHECK-LABEL: test_llneull_sext:
39; CHECK:       # %bb.0: # %entry
40; CHECK-NEXT:    xor r3, r3, r4
41; CHECK-NEXT:    subfic r3, r3, 0
42; CHECK-NEXT:    subfe r3, r3, r3
43; CHECK-NEXT:    blr
44; CHECK-BE-LABEL: test_llneull_sext:
45; CHECK-BE:       # %bb.0: # %entry
46; CHECK-BE-NEXT:    xor r3, r3, r4
47; CHECK-BE-NEXT:    subfic r3, r3, 0
48; CHECK-BE-NEXT:    subfe r3, r3, r3
49; CHECK-BE-NEXT:    blr
50;
51; CHECK-LE-LABEL: test_llneull_sext:
52; CHECK-LE:       # %bb.0: # %entry
53; CHECK-LE-NEXT:    xor r3, r3, r4
54; CHECK-LE-NEXT:    subfic r3, r3, 0
55; CHECK-LE-NEXT:    subfe r3, r3, r3
56; CHECK-LE-NEXT:    blr
57entry:
58  %cmp = icmp ne i64 %a, %b
59  %conv1 = sext i1 %cmp to i64
60  ret i64 %conv1
61}
62
63define i64 @test_llneull_z(i64 %a) {
64; CHECK-LABEL: test_llneull_z:
65; CHECK:       # %bb.0: # %entry
66; CHECK-NEXT:    addic r4, r3, -1
67; CHECK-NEXT:    subfe r3, r4, r3
68; CHECK-NEXT:    blr
69; CHECK-BE-LABEL: test_llneull_z:
70; CHECK-BE:       # %bb.0: # %entry
71; CHECK-BE-NEXT:    addic r4, r3, -1
72; CHECK-BE-NEXT:    subfe r3, r4, r3
73; CHECK-BE-NEXT:    blr
74;
75; CHECK-LE-LABEL: test_llneull_z:
76; CHECK-LE:       # %bb.0: # %entry
77; CHECK-LE-NEXT:    addic r4, r3, -1
78; CHECK-LE-NEXT:    subfe r3, r4, r3
79; CHECK-LE-NEXT:    blr
80entry:
81  %cmp = icmp ne i64 %a, 0
82  %conv1 = zext i1 %cmp to i64
83  ret i64 %conv1
84}
85
86define i64 @test_llneull_sext_z(i64 %a) {
87; CHECK-LABEL: test_llneull_sext_z:
88; CHECK:       # %bb.0: # %entry
89; CHECK-NEXT:    subfic r3, r3, 0
90; CHECK-NEXT:    subfe r3, r3, r3
91; CHECK-NEXT:    blr
92; CHECK-BE-LABEL: test_llneull_sext_z:
93; CHECK-BE:       # %bb.0: # %entry
94; CHECK-BE-NEXT:    subfic r3, r3, 0
95; CHECK-BE-NEXT:    subfe r3, r3, r3
96; CHECK-BE-NEXT:    blr
97;
98; CHECK-LE-LABEL: test_llneull_sext_z:
99; CHECK-LE:       # %bb.0: # %entry
100; CHECK-LE-NEXT:    subfic r3, r3, 0
101; CHECK-LE-NEXT:    subfe r3, r3, r3
102; CHECK-LE-NEXT:    blr
103entry:
104  %cmp = icmp ne i64 %a, 0
105  %conv1 = sext i1 %cmp to i64
106  ret i64 %conv1
107}
108
109define dso_local void @test_llneull_store(i64 %a, i64 %b) {
110; CHECK-LABEL: test_llneull_store:
111; CHECK:       # %bb.0: # %entry
112; CHECK-NEXT:    xor r3, r3, r4
113; CHECK-NEXT:    addis r5, r2, glob@toc@ha
114; CHECK-NEXT:    addic r4, r3, -1
115; CHECK-NEXT:    subfe r3, r4, r3
116; CHECK-NEXT:    std r3, glob@toc@l(r5)
117; CHECK-NEXT:    blr
118; CHECK-BE-LABEL: test_llneull_store:
119; CHECK-BE:       # %bb.0: # %entry
120; CHECK-BE-NEXT:    xor r3, r3, r4
121; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
122; CHECK-BE-NEXT:    addic r4, r3, -1
123; CHECK-BE-NEXT:    subfe r3, r4, r3
124; CHECK-BE-NEXT:    std r3, glob@toc@l(r5)
125; CHECK-BE-NEXT:    blr
126;
127; CHECK-LE-LABEL: test_llneull_store:
128; CHECK-LE:       # %bb.0: # %entry
129; CHECK-LE-NEXT:    xor r3, r3, r4
130; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
131; CHECK-LE-NEXT:    addic r4, r3, -1
132; CHECK-LE-NEXT:    subfe r3, r4, r3
133; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
134; CHECK-LE-NEXT:    blr
135entry:
136  %cmp = icmp ne i64 %a, %b
137  %conv1 = zext i1 %cmp to i64
138  store i64 %conv1, i64* @glob, align 8
139  ret void
140}
141
142define dso_local void @test_llneull_sext_store(i64 %a, i64 %b) {
143; CHECK-LABEL: test_llneull_sext_store:
144; CHECK:       # %bb.0: # %entry
145; CHECK-NEXT:    xor r3, r3, r4
146; CHECK-NEXT:    addis r5, r2, glob@toc@ha
147; CHECK-NEXT:    subfic r3, r3, 0
148; CHECK-NEXT:    subfe r3, r3, r3
149; CHECK-NEXT:    std r3, glob@toc@l(r5)
150; CHECK-NEXT:    blr
151; CHECK-BE-LABEL: test_llneull_sext_store:
152; CHECK-BE:       # %bb.0: # %entry
153; CHECK-BE-NEXT:    xor r3, r3, r4
154; CHECK-BE-NEXT:    addis r5, r2, glob@toc@ha
155; CHECK-BE-NEXT:    subfic r3, r3, 0
156; CHECK-BE-NEXT:    subfe r3, r3, r3
157; CHECK-BE-NEXT:    std r3, glob@toc@l(r5)
158; CHECK-BE-NEXT:    blr
159;
160; CHECK-LE-LABEL: test_llneull_sext_store:
161; CHECK-LE:       # %bb.0: # %entry
162; CHECK-LE-NEXT:    xor r3, r3, r4
163; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
164; CHECK-LE-NEXT:    subfic r3, r3, 0
165; CHECK-LE-NEXT:    subfe r3, r3, r3
166; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
167; CHECK-LE-NEXT:    blr
168entry:
169  %cmp = icmp ne i64 %a, %b
170  %conv1 = sext i1 %cmp to i64
171  store i64 %conv1, i64* @glob, align 8
172  ret void
173}
174
175define dso_local void @test_llneull_z_store(i64 %a) {
176; CHECK-LABEL: test_llneull_z_store:
177; CHECK:       # %bb.0: # %entry
178; CHECK-NEXT:    addic r5, r3, -1
179; CHECK-NEXT:    addis r4, r2, glob@toc@ha
180; CHECK-NEXT:    subfe r3, r5, r3
181; CHECK-NEXT:    std r3, glob@toc@l(r4)
182; CHECK-NEXT:    blr
183; CHECK-BE-LABEL: test_llneull_z_store:
184; CHECK-BE:       # %bb.0: # %entry
185; CHECK-BE-NEXT:    addic r5, r3, -1
186; CHECK-BE-NEXT:    addis r4, r2, glob@toc@ha
187; CHECK-BE-NEXT:    subfe r3, r5, r3
188; CHECK-BE-NEXT:    std r3, glob@toc@l(r4)
189; CHECK-BE-NEXT:    blr
190;
191; CHECK-LE-LABEL: test_llneull_z_store:
192; CHECK-LE:       # %bb.0: # %entry
193; CHECK-LE-NEXT:    addic r5, r3, -1
194; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
195; CHECK-LE-NEXT:    subfe r3, r5, r3
196; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
197; CHECK-LE-NEXT:    blr
198entry:
199  %cmp = icmp ne i64 %a, 0
200  %conv1 = zext i1 %cmp to i64
201  store i64 %conv1, i64* @glob, align 8
202  ret void
203}
204
205define dso_local void @test_llneull_sext_z_store(i64 %a) {
206; CHECK-LABEL: test_llneull_sext_z_store:
207; CHECK:       # %bb.0: # %entry
208; CHECK-NEXT:    subfic r3, r3, 0
209; CHECK-NEXT:    addis r4, r2, glob@toc@ha
210; CHECK-NEXT:    subfe r3, r3, r3
211; CHECK-NEXT:    std r3, glob@toc@l(r4)
212; CHECK-NEXT:    blr
213; CHECK-BE-LABEL: test_llneull_sext_z_store:
214; CHECK-BE:       # %bb.0: # %entry
215; CHECK-BE-NEXT:    subfic r3, r3, 0
216; CHECK-BE-NEXT:    addis r4, r2, glob@toc@ha
217; CHECK-BE-NEXT:    subfe r3, r3, r3
218; CHECK-BE-NEXT:    std r3, glob@toc@l(r4)
219; CHECK-BE-NEXT:    blr
220;
221; CHECK-LE-LABEL: test_llneull_sext_z_store:
222; CHECK-LE:       # %bb.0: # %entry
223; CHECK-LE-NEXT:    subfic r3, r3, 0
224; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
225; CHECK-LE-NEXT:    subfe r3, r3, r3
226; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
227; CHECK-LE-NEXT:    blr
228entry:
229  %cmp = icmp ne i64 %a, 0
230  %conv1 = sext i1 %cmp to i64
231  store i64 %conv1, i64* @glob, align 8
232  ret void
233}
234