1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:     -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-P8
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7; RUN: FileCheck %s --check-prefix=CHECK-P9
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10; RUN: FileCheck %s --check-prefix=CHECK-BE
11
12define i32 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
13; CHECK-P8-LABEL: test2elt:
14; CHECK-P8:       # %bb.0: # %entry
15; CHECK-P8-NEXT:    xxswapd vs0, v2
16; CHECK-P8-NEXT:    xscvdpsxws f1, v2
17; CHECK-P8-NEXT:    xscvdpsxws f0, f0
18; CHECK-P8-NEXT:    mffprwz r3, f1
19; CHECK-P8-NEXT:    mtvsrd v2, r3
20; CHECK-P8-NEXT:    mffprwz r4, f0
21; CHECK-P8-NEXT:    mtvsrd v3, r4
22; CHECK-P8-NEXT:    vmrghh v2, v2, v3
23; CHECK-P8-NEXT:    xxswapd vs0, v2
24; CHECK-P8-NEXT:    mffprwz r3, f0
25; CHECK-P8-NEXT:    blr
26;
27; CHECK-P9-LABEL: test2elt:
28; CHECK-P9:       # %bb.0: # %entry
29; CHECK-P9-NEXT:    xscvdpsxws f0, v2
30; CHECK-P9-NEXT:    mffprwz r3, f0
31; CHECK-P9-NEXT:    xxswapd vs0, v2
32; CHECK-P9-NEXT:    mtvsrd v3, r3
33; CHECK-P9-NEXT:    xscvdpsxws f0, f0
34; CHECK-P9-NEXT:    mffprwz r3, f0
35; CHECK-P9-NEXT:    mtvsrd v2, r3
36; CHECK-P9-NEXT:    li r3, 0
37; CHECK-P9-NEXT:    vmrghh v2, v3, v2
38; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
39; CHECK-P9-NEXT:    blr
40;
41; CHECK-BE-LABEL: test2elt:
42; CHECK-BE:       # %bb.0: # %entry
43; CHECK-BE-NEXT:    xscvdpsxws f0, v2
44; CHECK-BE-NEXT:    mffprwz r3, f0
45; CHECK-BE-NEXT:    xxswapd vs0, v2
46; CHECK-BE-NEXT:    sldi r3, r3, 48
47; CHECK-BE-NEXT:    xscvdpsxws f0, f0
48; CHECK-BE-NEXT:    mtvsrd v3, r3
49; CHECK-BE-NEXT:    mffprwz r3, f0
50; CHECK-BE-NEXT:    sldi r3, r3, 48
51; CHECK-BE-NEXT:    mtvsrd v2, r3
52; CHECK-BE-NEXT:    li r3, 0
53; CHECK-BE-NEXT:    vmrghh v2, v3, v2
54; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
55; CHECK-BE-NEXT:    blr
56entry:
57  %0 = fptoui <2 x double> %a to <2 x i16>
58  %1 = bitcast <2 x i16> %0 to i32
59  ret i32 %1
60}
61
62define i64 @test4elt(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
63; CHECK-P8-LABEL: test4elt:
64; CHECK-P8:       # %bb.0: # %entry
65; CHECK-P8-NEXT:    li r4, 16
66; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
67; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
68; CHECK-P8-NEXT:    xscvdpsxws f2, f0
69; CHECK-P8-NEXT:    xxswapd vs0, vs0
70; CHECK-P8-NEXT:    xscvdpsxws f3, f1
71; CHECK-P8-NEXT:    xxswapd vs1, vs1
72; CHECK-P8-NEXT:    xscvdpsxws f0, f0
73; CHECK-P8-NEXT:    xscvdpsxws f1, f1
74; CHECK-P8-NEXT:    mffprwz r3, f2
75; CHECK-P8-NEXT:    mffprwz r4, f3
76; CHECK-P8-NEXT:    mtvsrd v2, r3
77; CHECK-P8-NEXT:    mtvsrd v3, r4
78; CHECK-P8-NEXT:    mffprwz r3, f0
79; CHECK-P8-NEXT:    mffprwz r4, f1
80; CHECK-P8-NEXT:    mtvsrd v4, r3
81; CHECK-P8-NEXT:    mtvsrd v5, r4
82; CHECK-P8-NEXT:    vmrghh v2, v4, v2
83; CHECK-P8-NEXT:    vmrghh v3, v5, v3
84; CHECK-P8-NEXT:    vmrglw v2, v3, v2
85; CHECK-P8-NEXT:    xxswapd vs0, v2
86; CHECK-P8-NEXT:    mffprd r3, f0
87; CHECK-P8-NEXT:    blr
88;
89; CHECK-P9-LABEL: test4elt:
90; CHECK-P9:       # %bb.0: # %entry
91; CHECK-P9-NEXT:    lxv vs1, 0(r3)
92; CHECK-P9-NEXT:    lxv vs0, 16(r3)
93; CHECK-P9-NEXT:    xscvdpsxws f2, f1
94; CHECK-P9-NEXT:    xxswapd vs1, vs1
95; CHECK-P9-NEXT:    xscvdpsxws f1, f1
96; CHECK-P9-NEXT:    mffprwz r3, f2
97; CHECK-P9-NEXT:    mtvsrd v2, r3
98; CHECK-P9-NEXT:    mffprwz r3, f1
99; CHECK-P9-NEXT:    xscvdpsxws f1, f0
100; CHECK-P9-NEXT:    xxswapd vs0, vs0
101; CHECK-P9-NEXT:    mtvsrd v3, r3
102; CHECK-P9-NEXT:    xscvdpsxws f0, f0
103; CHECK-P9-NEXT:    vmrghh v2, v2, v3
104; CHECK-P9-NEXT:    mffprwz r3, f1
105; CHECK-P9-NEXT:    mtvsrd v3, r3
106; CHECK-P9-NEXT:    mffprwz r3, f0
107; CHECK-P9-NEXT:    mtvsrd v4, r3
108; CHECK-P9-NEXT:    vmrghh v3, v3, v4
109; CHECK-P9-NEXT:    vmrglw v2, v3, v2
110; CHECK-P9-NEXT:    mfvsrld r3, v2
111; CHECK-P9-NEXT:    blr
112;
113; CHECK-BE-LABEL: test4elt:
114; CHECK-BE:       # %bb.0: # %entry
115; CHECK-BE-NEXT:    lxv vs1, 16(r3)
116; CHECK-BE-NEXT:    lxv vs0, 0(r3)
117; CHECK-BE-NEXT:    xscvdpsxws f2, f1
118; CHECK-BE-NEXT:    xxswapd vs1, vs1
119; CHECK-BE-NEXT:    xscvdpsxws f1, f1
120; CHECK-BE-NEXT:    mffprwz r3, f2
121; CHECK-BE-NEXT:    sldi r3, r3, 48
122; CHECK-BE-NEXT:    mtvsrd v2, r3
123; CHECK-BE-NEXT:    mffprwz r3, f1
124; CHECK-BE-NEXT:    xscvdpsxws f1, f0
125; CHECK-BE-NEXT:    xxswapd vs0, vs0
126; CHECK-BE-NEXT:    sldi r3, r3, 48
127; CHECK-BE-NEXT:    xscvdpsxws f0, f0
128; CHECK-BE-NEXT:    mtvsrd v3, r3
129; CHECK-BE-NEXT:    vmrghh v2, v2, v3
130; CHECK-BE-NEXT:    mffprwz r3, f1
131; CHECK-BE-NEXT:    sldi r3, r3, 48
132; CHECK-BE-NEXT:    mtvsrd v3, r3
133; CHECK-BE-NEXT:    mffprwz r3, f0
134; CHECK-BE-NEXT:    sldi r3, r3, 48
135; CHECK-BE-NEXT:    mtvsrd v4, r3
136; CHECK-BE-NEXT:    vmrghh v3, v3, v4
137; CHECK-BE-NEXT:    vmrghw v2, v3, v2
138; CHECK-BE-NEXT:    mfvsrd r3, v2
139; CHECK-BE-NEXT:    blr
140entry:
141  %a = load <4 x double>, <4 x double>* %0, align 32
142  %1 = fptoui <4 x double> %a to <4 x i16>
143  %2 = bitcast <4 x i16> %1 to i64
144  ret i64 %2
145}
146
147define <8 x i16> @test8elt(<8 x double>* nocapture readonly) local_unnamed_addr #2 {
148; CHECK-P8-LABEL: test8elt:
149; CHECK-P8:       # %bb.0: # %entry
150; CHECK-P8-NEXT:    li r4, 16
151; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
152; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
153; CHECK-P8-NEXT:    li r4, 32
154; CHECK-P8-NEXT:    lxvd2x vs2, r3, r4
155; CHECK-P8-NEXT:    li r4, 48
156; CHECK-P8-NEXT:    lxvd2x vs3, r3, r4
157; CHECK-P8-NEXT:    xscvdpsxws f4, f0
158; CHECK-P8-NEXT:    xxswapd vs0, vs0
159; CHECK-P8-NEXT:    xscvdpsxws f5, f1
160; CHECK-P8-NEXT:    xxswapd vs1, vs1
161; CHECK-P8-NEXT:    xscvdpsxws f6, f2
162; CHECK-P8-NEXT:    xxswapd vs2, vs2
163; CHECK-P8-NEXT:    xscvdpsxws f7, f3
164; CHECK-P8-NEXT:    xxswapd vs3, vs3
165; CHECK-P8-NEXT:    xscvdpsxws f0, f0
166; CHECK-P8-NEXT:    xscvdpsxws f1, f1
167; CHECK-P8-NEXT:    xscvdpsxws f2, f2
168; CHECK-P8-NEXT:    xscvdpsxws f3, f3
169; CHECK-P8-NEXT:    mffprwz r3, f4
170; CHECK-P8-NEXT:    mffprwz r4, f5
171; CHECK-P8-NEXT:    mtvsrd v2, r3
172; CHECK-P8-NEXT:    mffprwz r3, f6
173; CHECK-P8-NEXT:    mtvsrd v3, r4
174; CHECK-P8-NEXT:    mffprwz r4, f7
175; CHECK-P8-NEXT:    mtvsrd v4, r3
176; CHECK-P8-NEXT:    mtvsrd v5, r4
177; CHECK-P8-NEXT:    mffprwz r3, f0
178; CHECK-P8-NEXT:    mffprwz r4, f1
179; CHECK-P8-NEXT:    mtvsrd v0, r3
180; CHECK-P8-NEXT:    mtvsrd v1, r4
181; CHECK-P8-NEXT:    mffprwz r3, f2
182; CHECK-P8-NEXT:    mffprwz r4, f3
183; CHECK-P8-NEXT:    vmrghh v2, v0, v2
184; CHECK-P8-NEXT:    vmrghh v3, v1, v3
185; CHECK-P8-NEXT:    mtvsrd v0, r3
186; CHECK-P8-NEXT:    mtvsrd v1, r4
187; CHECK-P8-NEXT:    vmrghh v4, v0, v4
188; CHECK-P8-NEXT:    vmrghh v5, v1, v5
189; CHECK-P8-NEXT:    vmrglw v2, v3, v2
190; CHECK-P8-NEXT:    vmrglw v3, v5, v4
191; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
192; CHECK-P8-NEXT:    blr
193;
194; CHECK-P9-LABEL: test8elt:
195; CHECK-P9:       # %bb.0: # %entry
196; CHECK-P9-NEXT:    lxv vs3, 0(r3)
197; CHECK-P9-NEXT:    lxv vs2, 16(r3)
198; CHECK-P9-NEXT:    lxv vs0, 48(r3)
199; CHECK-P9-NEXT:    lxv vs1, 32(r3)
200; CHECK-P9-NEXT:    xscvdpsxws f4, f3
201; CHECK-P9-NEXT:    xxswapd vs3, vs3
202; CHECK-P9-NEXT:    xscvdpsxws f3, f3
203; CHECK-P9-NEXT:    mffprwz r3, f4
204; CHECK-P9-NEXT:    mtvsrd v2, r3
205; CHECK-P9-NEXT:    mffprwz r3, f3
206; CHECK-P9-NEXT:    xscvdpsxws f3, f2
207; CHECK-P9-NEXT:    xxswapd vs2, vs2
208; CHECK-P9-NEXT:    mtvsrd v3, r3
209; CHECK-P9-NEXT:    xscvdpsxws f2, f2
210; CHECK-P9-NEXT:    vmrghh v2, v2, v3
211; CHECK-P9-NEXT:    mffprwz r3, f3
212; CHECK-P9-NEXT:    mtvsrd v3, r3
213; CHECK-P9-NEXT:    mffprwz r3, f2
214; CHECK-P9-NEXT:    xscvdpsxws f2, f1
215; CHECK-P9-NEXT:    xxswapd vs1, vs1
216; CHECK-P9-NEXT:    mtvsrd v4, r3
217; CHECK-P9-NEXT:    xscvdpsxws f1, f1
218; CHECK-P9-NEXT:    vmrghh v3, v3, v4
219; CHECK-P9-NEXT:    mffprwz r3, f2
220; CHECK-P9-NEXT:    vmrglw v2, v3, v2
221; CHECK-P9-NEXT:    mtvsrd v3, r3
222; CHECK-P9-NEXT:    mffprwz r3, f1
223; CHECK-P9-NEXT:    xscvdpsxws f1, f0
224; CHECK-P9-NEXT:    xxswapd vs0, vs0
225; CHECK-P9-NEXT:    mtvsrd v4, r3
226; CHECK-P9-NEXT:    xscvdpsxws f0, f0
227; CHECK-P9-NEXT:    vmrghh v3, v3, v4
228; CHECK-P9-NEXT:    mffprwz r3, f1
229; CHECK-P9-NEXT:    mtvsrd v4, r3
230; CHECK-P9-NEXT:    mffprwz r3, f0
231; CHECK-P9-NEXT:    mtvsrd v5, r3
232; CHECK-P9-NEXT:    vmrghh v4, v4, v5
233; CHECK-P9-NEXT:    vmrglw v3, v4, v3
234; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
235; CHECK-P9-NEXT:    blr
236;
237; CHECK-BE-LABEL: test8elt:
238; CHECK-BE:       # %bb.0: # %entry
239; CHECK-BE-NEXT:    lxv vs3, 48(r3)
240; CHECK-BE-NEXT:    lxv vs2, 32(r3)
241; CHECK-BE-NEXT:    lxv vs0, 0(r3)
242; CHECK-BE-NEXT:    lxv vs1, 16(r3)
243; CHECK-BE-NEXT:    xscvdpsxws f4, f3
244; CHECK-BE-NEXT:    xxswapd vs3, vs3
245; CHECK-BE-NEXT:    xscvdpsxws f3, f3
246; CHECK-BE-NEXT:    mffprwz r3, f4
247; CHECK-BE-NEXT:    sldi r3, r3, 48
248; CHECK-BE-NEXT:    mtvsrd v2, r3
249; CHECK-BE-NEXT:    mffprwz r3, f3
250; CHECK-BE-NEXT:    xscvdpsxws f3, f2
251; CHECK-BE-NEXT:    xxswapd vs2, vs2
252; CHECK-BE-NEXT:    sldi r3, r3, 48
253; CHECK-BE-NEXT:    xscvdpsxws f2, f2
254; CHECK-BE-NEXT:    mtvsrd v3, r3
255; CHECK-BE-NEXT:    vmrghh v2, v2, v3
256; CHECK-BE-NEXT:    mffprwz r3, f3
257; CHECK-BE-NEXT:    sldi r3, r3, 48
258; CHECK-BE-NEXT:    mtvsrd v3, r3
259; CHECK-BE-NEXT:    mffprwz r3, f2
260; CHECK-BE-NEXT:    xscvdpsxws f2, f1
261; CHECK-BE-NEXT:    xxswapd vs1, vs1
262; CHECK-BE-NEXT:    sldi r3, r3, 48
263; CHECK-BE-NEXT:    xscvdpsxws f1, f1
264; CHECK-BE-NEXT:    mtvsrd v4, r3
265; CHECK-BE-NEXT:    vmrghh v3, v3, v4
266; CHECK-BE-NEXT:    mffprwz r3, f2
267; CHECK-BE-NEXT:    sldi r3, r3, 48
268; CHECK-BE-NEXT:    vmrghw v2, v3, v2
269; CHECK-BE-NEXT:    mtvsrd v3, r3
270; CHECK-BE-NEXT:    mffprwz r3, f1
271; CHECK-BE-NEXT:    xscvdpsxws f1, f0
272; CHECK-BE-NEXT:    xxswapd vs0, vs0
273; CHECK-BE-NEXT:    sldi r3, r3, 48
274; CHECK-BE-NEXT:    xscvdpsxws f0, f0
275; CHECK-BE-NEXT:    mtvsrd v4, r3
276; CHECK-BE-NEXT:    vmrghh v3, v3, v4
277; CHECK-BE-NEXT:    mffprwz r3, f1
278; CHECK-BE-NEXT:    sldi r3, r3, 48
279; CHECK-BE-NEXT:    mtvsrd v4, r3
280; CHECK-BE-NEXT:    mffprwz r3, f0
281; CHECK-BE-NEXT:    sldi r3, r3, 48
282; CHECK-BE-NEXT:    mtvsrd v5, r3
283; CHECK-BE-NEXT:    vmrghh v4, v4, v5
284; CHECK-BE-NEXT:    vmrghw v3, v4, v3
285; CHECK-BE-NEXT:    xxmrghd v2, v3, v2
286; CHECK-BE-NEXT:    blr
287entry:
288  %a = load <8 x double>, <8 x double>* %0, align 64
289  %1 = fptoui <8 x double> %a to <8 x i16>
290  ret <8 x i16> %1
291}
292
293define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
294; CHECK-P8-LABEL: test16elt:
295; CHECK-P8:       # %bb.0: # %entry
296; CHECK-P8-NEXT:    li r5, 16
297; CHECK-P8-NEXT:    lxvd2x vs0, 0, r4
298; CHECK-P8-NEXT:    li r6, 32
299; CHECK-P8-NEXT:    li r7, 48
300; CHECK-P8-NEXT:    lxvd2x vs1, r4, r5
301; CHECK-P8-NEXT:    lxvd2x vs2, r4, r6
302; CHECK-P8-NEXT:    li r6, 64
303; CHECK-P8-NEXT:    lxvd2x vs3, r4, r7
304; CHECK-P8-NEXT:    lxvd2x vs5, r4, r6
305; CHECK-P8-NEXT:    li r7, 80
306; CHECK-P8-NEXT:    li r6, 96
307; CHECK-P8-NEXT:    xscvdpsxws f4, f0
308; CHECK-P8-NEXT:    lxvd2x vs7, r4, r7
309; CHECK-P8-NEXT:    lxvd2x vs10, r4, r6
310; CHECK-P8-NEXT:    li r6, 112
311; CHECK-P8-NEXT:    xxswapd vs0, vs0
312; CHECK-P8-NEXT:    xscvdpsxws f6, f1
313; CHECK-P8-NEXT:    xxswapd vs1, vs1
314; CHECK-P8-NEXT:    xscvdpsxws f8, f2
315; CHECK-P8-NEXT:    xxswapd vs2, vs2
316; CHECK-P8-NEXT:    xscvdpsxws f9, f3
317; CHECK-P8-NEXT:    xxswapd vs3, vs3
318; CHECK-P8-NEXT:    xscvdpsxws f11, f5
319; CHECK-P8-NEXT:    xxswapd vs5, vs5
320; CHECK-P8-NEXT:    xscvdpsxws f12, f7
321; CHECK-P8-NEXT:    xxswapd vs7, vs7
322; CHECK-P8-NEXT:    mffprwz r7, f4
323; CHECK-P8-NEXT:    lxvd2x vs4, r4, r6
324; CHECK-P8-NEXT:    mffprwz r4, f6
325; CHECK-P8-NEXT:    xscvdpsxws f13, f10
326; CHECK-P8-NEXT:    mtvsrd v3, r4
327; CHECK-P8-NEXT:    mffprwz r4, f8
328; CHECK-P8-NEXT:    xscvdpsxws f6, f4
329; CHECK-P8-NEXT:    mtvsrd v4, r4
330; CHECK-P8-NEXT:    mffprwz r4, f9
331; CHECK-P8-NEXT:    xscvdpsxws f0, f0
332; CHECK-P8-NEXT:    mtvsrd v5, r4
333; CHECK-P8-NEXT:    mffprwz r4, f11
334; CHECK-P8-NEXT:    xscvdpsxws f1, f1
335; CHECK-P8-NEXT:    mtvsrd v0, r4
336; CHECK-P8-NEXT:    mffprwz r4, f12
337; CHECK-P8-NEXT:    xscvdpsxws f2, f2
338; CHECK-P8-NEXT:    mtvsrd v1, r4
339; CHECK-P8-NEXT:    mffprwz r4, f13
340; CHECK-P8-NEXT:    xscvdpsxws f3, f3
341; CHECK-P8-NEXT:    mtvsrd v6, r4
342; CHECK-P8-NEXT:    mffprwz r4, f6
343; CHECK-P8-NEXT:    xxswapd vs6, vs10
344; CHECK-P8-NEXT:    xscvdpsxws f5, f5
345; CHECK-P8-NEXT:    mtvsrd v7, r4
346; CHECK-P8-NEXT:    mffprwz r4, f0
347; CHECK-P8-NEXT:    xxswapd vs0, vs4
348; CHECK-P8-NEXT:    mtvsrd v2, r7
349; CHECK-P8-NEXT:    mtvsrd v8, r4
350; CHECK-P8-NEXT:    mffprwz r4, f1
351; CHECK-P8-NEXT:    xscvdpsxws f7, f7
352; CHECK-P8-NEXT:    mtvsrd v9, r4
353; CHECK-P8-NEXT:    mffprwz r4, f2
354; CHECK-P8-NEXT:    xscvdpsxws f4, f6
355; CHECK-P8-NEXT:    vmrghh v2, v8, v2
356; CHECK-P8-NEXT:    mtvsrd v8, r4
357; CHECK-P8-NEXT:    mffprwz r4, f3
358; CHECK-P8-NEXT:    xscvdpsxws f0, f0
359; CHECK-P8-NEXT:    vmrghh v3, v9, v3
360; CHECK-P8-NEXT:    mtvsrd v9, r4
361; CHECK-P8-NEXT:    mffprwz r4, f5
362; CHECK-P8-NEXT:    vmrghh v4, v8, v4
363; CHECK-P8-NEXT:    mtvsrd v8, r4
364; CHECK-P8-NEXT:    mffprwz r4, f7
365; CHECK-P8-NEXT:    vmrghh v5, v9, v5
366; CHECK-P8-NEXT:    mtvsrd v9, r4
367; CHECK-P8-NEXT:    mffprwz r4, f4
368; CHECK-P8-NEXT:    vmrghh v0, v8, v0
369; CHECK-P8-NEXT:    mtvsrd v8, r4
370; CHECK-P8-NEXT:    mffprwz r4, f0
371; CHECK-P8-NEXT:    vmrghh v1, v9, v1
372; CHECK-P8-NEXT:    mtvsrd v9, r4
373; CHECK-P8-NEXT:    vmrghh v6, v8, v6
374; CHECK-P8-NEXT:    vmrghh v7, v9, v7
375; CHECK-P8-NEXT:    vmrglw v2, v3, v2
376; CHECK-P8-NEXT:    vmrglw v3, v5, v4
377; CHECK-P8-NEXT:    vmrglw v4, v1, v0
378; CHECK-P8-NEXT:    vmrglw v5, v7, v6
379; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
380; CHECK-P8-NEXT:    stvx v2, 0, r3
381; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
382; CHECK-P8-NEXT:    stvx v3, r3, r5
383; CHECK-P8-NEXT:    blr
384;
385; CHECK-P9-LABEL: test16elt:
386; CHECK-P9:       # %bb.0: # %entry
387; CHECK-P9-NEXT:    lxv vs3, 0(r4)
388; CHECK-P9-NEXT:    lxv vs2, 16(r4)
389; CHECK-P9-NEXT:    lxv vs1, 32(r4)
390; CHECK-P9-NEXT:    lxv vs0, 48(r4)
391; CHECK-P9-NEXT:    xscvdpsxws f4, f3
392; CHECK-P9-NEXT:    xscvdpsxws f5, f2
393; CHECK-P9-NEXT:    xscvdpsxws f6, f1
394; CHECK-P9-NEXT:    xxswapd vs3, vs3
395; CHECK-P9-NEXT:    xscvdpsxws f7, f0
396; CHECK-P9-NEXT:    xxswapd vs2, vs2
397; CHECK-P9-NEXT:    xxswapd vs1, vs1
398; CHECK-P9-NEXT:    xxswapd vs0, vs0
399; CHECK-P9-NEXT:    xscvdpsxws f3, f3
400; CHECK-P9-NEXT:    xscvdpsxws f2, f2
401; CHECK-P9-NEXT:    xscvdpsxws f1, f1
402; CHECK-P9-NEXT:    xscvdpsxws f0, f0
403; CHECK-P9-NEXT:    mffprwz r5, f4
404; CHECK-P9-NEXT:    mtvsrd v2, r5
405; CHECK-P9-NEXT:    mffprwz r5, f5
406; CHECK-P9-NEXT:    mtvsrd v3, r5
407; CHECK-P9-NEXT:    mffprwz r5, f6
408; CHECK-P9-NEXT:    mtvsrd v4, r5
409; CHECK-P9-NEXT:    mffprwz r5, f7
410; CHECK-P9-NEXT:    mtvsrd v5, r5
411; CHECK-P9-NEXT:    mffprwz r5, f3
412; CHECK-P9-NEXT:    lxv vs3, 64(r4)
413; CHECK-P9-NEXT:    mtvsrd v0, r5
414; CHECK-P9-NEXT:    mffprwz r5, f2
415; CHECK-P9-NEXT:    lxv vs2, 80(r4)
416; CHECK-P9-NEXT:    vmrghh v2, v2, v0
417; CHECK-P9-NEXT:    mtvsrd v0, r5
418; CHECK-P9-NEXT:    mffprwz r5, f1
419; CHECK-P9-NEXT:    lxv vs1, 96(r4)
420; CHECK-P9-NEXT:    xscvdpsxws f4, f3
421; CHECK-P9-NEXT:    xxswapd vs3, vs3
422; CHECK-P9-NEXT:    vmrghh v3, v3, v0
423; CHECK-P9-NEXT:    mtvsrd v0, r5
424; CHECK-P9-NEXT:    mffprwz r5, f0
425; CHECK-P9-NEXT:    lxv vs0, 112(r4)
426; CHECK-P9-NEXT:    xscvdpsxws f3, f3
427; CHECK-P9-NEXT:    vmrghh v4, v4, v0
428; CHECK-P9-NEXT:    mtvsrd v0, r5
429; CHECK-P9-NEXT:    vmrglw v2, v3, v2
430; CHECK-P9-NEXT:    vmrghh v5, v5, v0
431; CHECK-P9-NEXT:    mffprwz r4, f4
432; CHECK-P9-NEXT:    vmrglw v4, v5, v4
433; CHECK-P9-NEXT:    mtvsrd v3, r4
434; CHECK-P9-NEXT:    mffprwz r4, f3
435; CHECK-P9-NEXT:    xscvdpsxws f3, f2
436; CHECK-P9-NEXT:    xxswapd vs2, vs2
437; CHECK-P9-NEXT:    xxmrgld vs4, v4, v2
438; CHECK-P9-NEXT:    mtvsrd v2, r4
439; CHECK-P9-NEXT:    xscvdpsxws f2, f2
440; CHECK-P9-NEXT:    vmrghh v2, v3, v2
441; CHECK-P9-NEXT:    stxv vs4, 0(r3)
442; CHECK-P9-NEXT:    mffprwz r4, f3
443; CHECK-P9-NEXT:    mtvsrd v3, r4
444; CHECK-P9-NEXT:    mffprwz r4, f2
445; CHECK-P9-NEXT:    xscvdpsxws f2, f1
446; CHECK-P9-NEXT:    xxswapd vs1, vs1
447; CHECK-P9-NEXT:    mtvsrd v4, r4
448; CHECK-P9-NEXT:    xscvdpsxws f1, f1
449; CHECK-P9-NEXT:    vmrghh v3, v3, v4
450; CHECK-P9-NEXT:    mffprwz r4, f2
451; CHECK-P9-NEXT:    vmrglw v2, v3, v2
452; CHECK-P9-NEXT:    mtvsrd v3, r4
453; CHECK-P9-NEXT:    mffprwz r4, f1
454; CHECK-P9-NEXT:    xscvdpsxws f1, f0
455; CHECK-P9-NEXT:    xxswapd vs0, vs0
456; CHECK-P9-NEXT:    mtvsrd v4, r4
457; CHECK-P9-NEXT:    xscvdpsxws f0, f0
458; CHECK-P9-NEXT:    vmrghh v3, v3, v4
459; CHECK-P9-NEXT:    mffprwz r4, f1
460; CHECK-P9-NEXT:    mtvsrd v4, r4
461; CHECK-P9-NEXT:    mffprwz r4, f0
462; CHECK-P9-NEXT:    mtvsrd v5, r4
463; CHECK-P9-NEXT:    vmrghh v4, v4, v5
464; CHECK-P9-NEXT:    vmrglw v3, v4, v3
465; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
466; CHECK-P9-NEXT:    stxv vs0, 16(r3)
467; CHECK-P9-NEXT:    blr
468;
469; CHECK-BE-LABEL: test16elt:
470; CHECK-BE:       # %bb.0: # %entry
471; CHECK-BE-NEXT:    lxv vs4, 48(r4)
472; CHECK-BE-NEXT:    lxv vs3, 32(r4)
473; CHECK-BE-NEXT:    lxv vs2, 16(r4)
474; CHECK-BE-NEXT:    lxv vs1, 0(r4)
475; CHECK-BE-NEXT:    xscvdpsxws f5, f4
476; CHECK-BE-NEXT:    xxswapd vs4, vs4
477; CHECK-BE-NEXT:    xscvdpsxws f6, f3
478; CHECK-BE-NEXT:    xxswapd vs3, vs3
479; CHECK-BE-NEXT:    xscvdpsxws f7, f2
480; CHECK-BE-NEXT:    lxv vs0, 112(r4)
481; CHECK-BE-NEXT:    xxswapd vs2, vs2
482; CHECK-BE-NEXT:    xscvdpsxws f4, f4
483; CHECK-BE-NEXT:    xscvdpsxws f3, f3
484; CHECK-BE-NEXT:    xscvdpsxws f2, f2
485; CHECK-BE-NEXT:    mffprwz r5, f5
486; CHECK-BE-NEXT:    sldi r5, r5, 48
487; CHECK-BE-NEXT:    mtvsrd v2, r5
488; CHECK-BE-NEXT:    mffprwz r5, f4
489; CHECK-BE-NEXT:    xscvdpsxws f4, f1
490; CHECK-BE-NEXT:    xxswapd vs1, vs1
491; CHECK-BE-NEXT:    sldi r5, r5, 48
492; CHECK-BE-NEXT:    xscvdpsxws f1, f1
493; CHECK-BE-NEXT:    mtvsrd v3, r5
494; CHECK-BE-NEXT:    mffprwz r5, f6
495; CHECK-BE-NEXT:    sldi r5, r5, 48
496; CHECK-BE-NEXT:    vmrghh v2, v2, v3
497; CHECK-BE-NEXT:    mtvsrd v3, r5
498; CHECK-BE-NEXT:    mffprwz r5, f3
499; CHECK-BE-NEXT:    xscvdpsxws f3, f0
500; CHECK-BE-NEXT:    xxswapd vs0, vs0
501; CHECK-BE-NEXT:    sldi r5, r5, 48
502; CHECK-BE-NEXT:    xscvdpsxws f0, f0
503; CHECK-BE-NEXT:    mtvsrd v4, r5
504; CHECK-BE-NEXT:    mffprwz r5, f7
505; CHECK-BE-NEXT:    sldi r5, r5, 48
506; CHECK-BE-NEXT:    vmrghh v3, v3, v4
507; CHECK-BE-NEXT:    mtvsrd v4, r5
508; CHECK-BE-NEXT:    mffprwz r5, f4
509; CHECK-BE-NEXT:    vmrghw v2, v3, v2
510; CHECK-BE-NEXT:    sldi r5, r5, 48
511; CHECK-BE-NEXT:    mtvsrd v5, r5
512; CHECK-BE-NEXT:    mffprwz r5, f3
513; CHECK-BE-NEXT:    sldi r5, r5, 48
514; CHECK-BE-NEXT:    mtvsrd v0, r5
515; CHECK-BE-NEXT:    mffprwz r5, f2
516; CHECK-BE-NEXT:    lxv vs2, 96(r4)
517; CHECK-BE-NEXT:    sldi r5, r5, 48
518; CHECK-BE-NEXT:    mtvsrd v1, r5
519; CHECK-BE-NEXT:    mffprwz r5, f1
520; CHECK-BE-NEXT:    lxv vs1, 80(r4)
521; CHECK-BE-NEXT:    xscvdpsxws f3, f2
522; CHECK-BE-NEXT:    xxswapd vs2, vs2
523; CHECK-BE-NEXT:    sldi r5, r5, 48
524; CHECK-BE-NEXT:    vmrghh v4, v4, v1
525; CHECK-BE-NEXT:    mtvsrd v1, r5
526; CHECK-BE-NEXT:    xscvdpsxws f2, f2
527; CHECK-BE-NEXT:    mffprwz r5, f0
528; CHECK-BE-NEXT:    lxv vs0, 64(r4)
529; CHECK-BE-NEXT:    vmrghh v5, v5, v1
530; CHECK-BE-NEXT:    sldi r5, r5, 48
531; CHECK-BE-NEXT:    mffprwz r4, f3
532; CHECK-BE-NEXT:    mtvsrd v1, r5
533; CHECK-BE-NEXT:    vmrghw v3, v5, v4
534; CHECK-BE-NEXT:    sldi r4, r4, 48
535; CHECK-BE-NEXT:    vmrghh v0, v0, v1
536; CHECK-BE-NEXT:    xxmrghd vs3, v3, v2
537; CHECK-BE-NEXT:    mtvsrd v2, r4
538; CHECK-BE-NEXT:    mffprwz r4, f2
539; CHECK-BE-NEXT:    xscvdpsxws f2, f1
540; CHECK-BE-NEXT:    xxswapd vs1, vs1
541; CHECK-BE-NEXT:    sldi r4, r4, 48
542; CHECK-BE-NEXT:    xscvdpsxws f1, f1
543; CHECK-BE-NEXT:    stxv vs3, 0(r3)
544; CHECK-BE-NEXT:    mtvsrd v3, r4
545; CHECK-BE-NEXT:    vmrghh v2, v2, v3
546; CHECK-BE-NEXT:    mffprwz r4, f2
547; CHECK-BE-NEXT:    sldi r4, r4, 48
548; CHECK-BE-NEXT:    vmrghw v2, v2, v0
549; CHECK-BE-NEXT:    mtvsrd v3, r4
550; CHECK-BE-NEXT:    mffprwz r4, f1
551; CHECK-BE-NEXT:    xscvdpsxws f1, f0
552; CHECK-BE-NEXT:    xxswapd vs0, vs0
553; CHECK-BE-NEXT:    sldi r4, r4, 48
554; CHECK-BE-NEXT:    xscvdpsxws f0, f0
555; CHECK-BE-NEXT:    mtvsrd v4, r4
556; CHECK-BE-NEXT:    vmrghh v3, v3, v4
557; CHECK-BE-NEXT:    mffprwz r4, f1
558; CHECK-BE-NEXT:    sldi r4, r4, 48
559; CHECK-BE-NEXT:    mtvsrd v4, r4
560; CHECK-BE-NEXT:    mffprwz r4, f0
561; CHECK-BE-NEXT:    sldi r4, r4, 48
562; CHECK-BE-NEXT:    mtvsrd v5, r4
563; CHECK-BE-NEXT:    vmrghh v4, v4, v5
564; CHECK-BE-NEXT:    vmrghw v3, v4, v3
565; CHECK-BE-NEXT:    xxmrghd vs0, v3, v2
566; CHECK-BE-NEXT:    stxv vs0, 16(r3)
567; CHECK-BE-NEXT:    blr
568entry:
569  %a = load <16 x double>, <16 x double>* %0, align 128
570  %1 = fptoui <16 x double> %a to <16 x i16>
571  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
572  ret void
573}
574
575define i32 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
576; CHECK-P8-LABEL: test2elt_signed:
577; CHECK-P8:       # %bb.0: # %entry
578; CHECK-P8-NEXT:    xxswapd vs0, v2
579; CHECK-P8-NEXT:    xscvdpsxws f1, v2
580; CHECK-P8-NEXT:    xscvdpsxws f0, f0
581; CHECK-P8-NEXT:    mffprwz r3, f1
582; CHECK-P8-NEXT:    mtvsrd v2, r3
583; CHECK-P8-NEXT:    mffprwz r4, f0
584; CHECK-P8-NEXT:    mtvsrd v3, r4
585; CHECK-P8-NEXT:    vmrghh v2, v2, v3
586; CHECK-P8-NEXT:    xxswapd vs0, v2
587; CHECK-P8-NEXT:    mffprwz r3, f0
588; CHECK-P8-NEXT:    blr
589;
590; CHECK-P9-LABEL: test2elt_signed:
591; CHECK-P9:       # %bb.0: # %entry
592; CHECK-P9-NEXT:    xscvdpsxws f0, v2
593; CHECK-P9-NEXT:    mffprwz r3, f0
594; CHECK-P9-NEXT:    xxswapd vs0, v2
595; CHECK-P9-NEXT:    mtvsrd v3, r3
596; CHECK-P9-NEXT:    xscvdpsxws f0, f0
597; CHECK-P9-NEXT:    mffprwz r3, f0
598; CHECK-P9-NEXT:    mtvsrd v2, r3
599; CHECK-P9-NEXT:    li r3, 0
600; CHECK-P9-NEXT:    vmrghh v2, v3, v2
601; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
602; CHECK-P9-NEXT:    blr
603;
604; CHECK-BE-LABEL: test2elt_signed:
605; CHECK-BE:       # %bb.0: # %entry
606; CHECK-BE-NEXT:    xscvdpsxws f0, v2
607; CHECK-BE-NEXT:    mffprwz r3, f0
608; CHECK-BE-NEXT:    xxswapd vs0, v2
609; CHECK-BE-NEXT:    sldi r3, r3, 48
610; CHECK-BE-NEXT:    xscvdpsxws f0, f0
611; CHECK-BE-NEXT:    mtvsrd v3, r3
612; CHECK-BE-NEXT:    mffprwz r3, f0
613; CHECK-BE-NEXT:    sldi r3, r3, 48
614; CHECK-BE-NEXT:    mtvsrd v2, r3
615; CHECK-BE-NEXT:    li r3, 0
616; CHECK-BE-NEXT:    vmrghh v2, v3, v2
617; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
618; CHECK-BE-NEXT:    blr
619entry:
620  %0 = fptosi <2 x double> %a to <2 x i16>
621  %1 = bitcast <2 x i16> %0 to i32
622  ret i32 %1
623}
624
625define i64 @test4elt_signed(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
626; CHECK-P8-LABEL: test4elt_signed:
627; CHECK-P8:       # %bb.0: # %entry
628; CHECK-P8-NEXT:    li r4, 16
629; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
630; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
631; CHECK-P8-NEXT:    xscvdpsxws f2, f0
632; CHECK-P8-NEXT:    xxswapd vs0, vs0
633; CHECK-P8-NEXT:    xscvdpsxws f3, f1
634; CHECK-P8-NEXT:    xxswapd vs1, vs1
635; CHECK-P8-NEXT:    xscvdpsxws f0, f0
636; CHECK-P8-NEXT:    xscvdpsxws f1, f1
637; CHECK-P8-NEXT:    mffprwz r3, f2
638; CHECK-P8-NEXT:    mffprwz r4, f3
639; CHECK-P8-NEXT:    mtvsrd v2, r3
640; CHECK-P8-NEXT:    mtvsrd v3, r4
641; CHECK-P8-NEXT:    mffprwz r3, f0
642; CHECK-P8-NEXT:    mffprwz r4, f1
643; CHECK-P8-NEXT:    mtvsrd v4, r3
644; CHECK-P8-NEXT:    mtvsrd v5, r4
645; CHECK-P8-NEXT:    vmrghh v2, v4, v2
646; CHECK-P8-NEXT:    vmrghh v3, v5, v3
647; CHECK-P8-NEXT:    vmrglw v2, v3, v2
648; CHECK-P8-NEXT:    xxswapd vs0, v2
649; CHECK-P8-NEXT:    mffprd r3, f0
650; CHECK-P8-NEXT:    blr
651;
652; CHECK-P9-LABEL: test4elt_signed:
653; CHECK-P9:       # %bb.0: # %entry
654; CHECK-P9-NEXT:    lxv vs1, 0(r3)
655; CHECK-P9-NEXT:    lxv vs0, 16(r3)
656; CHECK-P9-NEXT:    xscvdpsxws f2, f1
657; CHECK-P9-NEXT:    xxswapd vs1, vs1
658; CHECK-P9-NEXT:    xscvdpsxws f1, f1
659; CHECK-P9-NEXT:    mffprwz r3, f2
660; CHECK-P9-NEXT:    mtvsrd v2, r3
661; CHECK-P9-NEXT:    mffprwz r3, f1
662; CHECK-P9-NEXT:    xscvdpsxws f1, f0
663; CHECK-P9-NEXT:    xxswapd vs0, vs0
664; CHECK-P9-NEXT:    mtvsrd v3, r3
665; CHECK-P9-NEXT:    xscvdpsxws f0, f0
666; CHECK-P9-NEXT:    vmrghh v2, v2, v3
667; CHECK-P9-NEXT:    mffprwz r3, f1
668; CHECK-P9-NEXT:    mtvsrd v3, r3
669; CHECK-P9-NEXT:    mffprwz r3, f0
670; CHECK-P9-NEXT:    mtvsrd v4, r3
671; CHECK-P9-NEXT:    vmrghh v3, v3, v4
672; CHECK-P9-NEXT:    vmrglw v2, v3, v2
673; CHECK-P9-NEXT:    mfvsrld r3, v2
674; CHECK-P9-NEXT:    blr
675;
676; CHECK-BE-LABEL: test4elt_signed:
677; CHECK-BE:       # %bb.0: # %entry
678; CHECK-BE-NEXT:    lxv vs1, 16(r3)
679; CHECK-BE-NEXT:    lxv vs0, 0(r3)
680; CHECK-BE-NEXT:    xscvdpsxws f2, f1
681; CHECK-BE-NEXT:    xxswapd vs1, vs1
682; CHECK-BE-NEXT:    xscvdpsxws f1, f1
683; CHECK-BE-NEXT:    mffprwz r3, f2
684; CHECK-BE-NEXT:    sldi r3, r3, 48
685; CHECK-BE-NEXT:    mtvsrd v2, r3
686; CHECK-BE-NEXT:    mffprwz r3, f1
687; CHECK-BE-NEXT:    xscvdpsxws f1, f0
688; CHECK-BE-NEXT:    xxswapd vs0, vs0
689; CHECK-BE-NEXT:    sldi r3, r3, 48
690; CHECK-BE-NEXT:    xscvdpsxws f0, f0
691; CHECK-BE-NEXT:    mtvsrd v3, r3
692; CHECK-BE-NEXT:    vmrghh v2, v2, v3
693; CHECK-BE-NEXT:    mffprwz r3, f1
694; CHECK-BE-NEXT:    sldi r3, r3, 48
695; CHECK-BE-NEXT:    mtvsrd v3, r3
696; CHECK-BE-NEXT:    mffprwz r3, f0
697; CHECK-BE-NEXT:    sldi r3, r3, 48
698; CHECK-BE-NEXT:    mtvsrd v4, r3
699; CHECK-BE-NEXT:    vmrghh v3, v3, v4
700; CHECK-BE-NEXT:    vmrghw v2, v3, v2
701; CHECK-BE-NEXT:    mfvsrd r3, v2
702; CHECK-BE-NEXT:    blr
703entry:
704  %a = load <4 x double>, <4 x double>* %0, align 32
705  %1 = fptosi <4 x double> %a to <4 x i16>
706  %2 = bitcast <4 x i16> %1 to i64
707  ret i64 %2
708}
709
710define <8 x i16> @test8elt_signed(<8 x double>* nocapture readonly) local_unnamed_addr #2 {
711; CHECK-P8-LABEL: test8elt_signed:
712; CHECK-P8:       # %bb.0: # %entry
713; CHECK-P8-NEXT:    li r4, 16
714; CHECK-P8-NEXT:    lxvd2x vs0, 0, r3
715; CHECK-P8-NEXT:    lxvd2x vs1, r3, r4
716; CHECK-P8-NEXT:    li r4, 32
717; CHECK-P8-NEXT:    lxvd2x vs2, r3, r4
718; CHECK-P8-NEXT:    li r4, 48
719; CHECK-P8-NEXT:    lxvd2x vs3, r3, r4
720; CHECK-P8-NEXT:    xscvdpsxws f4, f0
721; CHECK-P8-NEXT:    xxswapd vs0, vs0
722; CHECK-P8-NEXT:    xscvdpsxws f5, f1
723; CHECK-P8-NEXT:    xxswapd vs1, vs1
724; CHECK-P8-NEXT:    xscvdpsxws f6, f2
725; CHECK-P8-NEXT:    xxswapd vs2, vs2
726; CHECK-P8-NEXT:    xscvdpsxws f7, f3
727; CHECK-P8-NEXT:    xxswapd vs3, vs3
728; CHECK-P8-NEXT:    xscvdpsxws f0, f0
729; CHECK-P8-NEXT:    xscvdpsxws f1, f1
730; CHECK-P8-NEXT:    xscvdpsxws f2, f2
731; CHECK-P8-NEXT:    xscvdpsxws f3, f3
732; CHECK-P8-NEXT:    mffprwz r3, f4
733; CHECK-P8-NEXT:    mffprwz r4, f5
734; CHECK-P8-NEXT:    mtvsrd v2, r3
735; CHECK-P8-NEXT:    mffprwz r3, f6
736; CHECK-P8-NEXT:    mtvsrd v3, r4
737; CHECK-P8-NEXT:    mffprwz r4, f7
738; CHECK-P8-NEXT:    mtvsrd v4, r3
739; CHECK-P8-NEXT:    mtvsrd v5, r4
740; CHECK-P8-NEXT:    mffprwz r3, f0
741; CHECK-P8-NEXT:    mffprwz r4, f1
742; CHECK-P8-NEXT:    mtvsrd v0, r3
743; CHECK-P8-NEXT:    mtvsrd v1, r4
744; CHECK-P8-NEXT:    mffprwz r3, f2
745; CHECK-P8-NEXT:    mffprwz r4, f3
746; CHECK-P8-NEXT:    vmrghh v2, v0, v2
747; CHECK-P8-NEXT:    vmrghh v3, v1, v3
748; CHECK-P8-NEXT:    mtvsrd v0, r3
749; CHECK-P8-NEXT:    mtvsrd v1, r4
750; CHECK-P8-NEXT:    vmrghh v4, v0, v4
751; CHECK-P8-NEXT:    vmrghh v5, v1, v5
752; CHECK-P8-NEXT:    vmrglw v2, v3, v2
753; CHECK-P8-NEXT:    vmrglw v3, v5, v4
754; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
755; CHECK-P8-NEXT:    blr
756;
757; CHECK-P9-LABEL: test8elt_signed:
758; CHECK-P9:       # %bb.0: # %entry
759; CHECK-P9-NEXT:    lxv vs3, 0(r3)
760; CHECK-P9-NEXT:    lxv vs2, 16(r3)
761; CHECK-P9-NEXT:    lxv vs0, 48(r3)
762; CHECK-P9-NEXT:    lxv vs1, 32(r3)
763; CHECK-P9-NEXT:    xscvdpsxws f4, f3
764; CHECK-P9-NEXT:    xxswapd vs3, vs3
765; CHECK-P9-NEXT:    xscvdpsxws f3, f3
766; CHECK-P9-NEXT:    mffprwz r3, f4
767; CHECK-P9-NEXT:    mtvsrd v2, r3
768; CHECK-P9-NEXT:    mffprwz r3, f3
769; CHECK-P9-NEXT:    xscvdpsxws f3, f2
770; CHECK-P9-NEXT:    xxswapd vs2, vs2
771; CHECK-P9-NEXT:    mtvsrd v3, r3
772; CHECK-P9-NEXT:    xscvdpsxws f2, f2
773; CHECK-P9-NEXT:    vmrghh v2, v2, v3
774; CHECK-P9-NEXT:    mffprwz r3, f3
775; CHECK-P9-NEXT:    mtvsrd v3, r3
776; CHECK-P9-NEXT:    mffprwz r3, f2
777; CHECK-P9-NEXT:    xscvdpsxws f2, f1
778; CHECK-P9-NEXT:    xxswapd vs1, vs1
779; CHECK-P9-NEXT:    mtvsrd v4, r3
780; CHECK-P9-NEXT:    xscvdpsxws f1, f1
781; CHECK-P9-NEXT:    vmrghh v3, v3, v4
782; CHECK-P9-NEXT:    mffprwz r3, f2
783; CHECK-P9-NEXT:    vmrglw v2, v3, v2
784; CHECK-P9-NEXT:    mtvsrd v3, r3
785; CHECK-P9-NEXT:    mffprwz r3, f1
786; CHECK-P9-NEXT:    xscvdpsxws f1, f0
787; CHECK-P9-NEXT:    xxswapd vs0, vs0
788; CHECK-P9-NEXT:    mtvsrd v4, r3
789; CHECK-P9-NEXT:    xscvdpsxws f0, f0
790; CHECK-P9-NEXT:    vmrghh v3, v3, v4
791; CHECK-P9-NEXT:    mffprwz r3, f1
792; CHECK-P9-NEXT:    mtvsrd v4, r3
793; CHECK-P9-NEXT:    mffprwz r3, f0
794; CHECK-P9-NEXT:    mtvsrd v5, r3
795; CHECK-P9-NEXT:    vmrghh v4, v4, v5
796; CHECK-P9-NEXT:    vmrglw v3, v4, v3
797; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
798; CHECK-P9-NEXT:    blr
799;
800; CHECK-BE-LABEL: test8elt_signed:
801; CHECK-BE:       # %bb.0: # %entry
802; CHECK-BE-NEXT:    lxv vs3, 48(r3)
803; CHECK-BE-NEXT:    lxv vs2, 32(r3)
804; CHECK-BE-NEXT:    lxv vs0, 0(r3)
805; CHECK-BE-NEXT:    lxv vs1, 16(r3)
806; CHECK-BE-NEXT:    xscvdpsxws f4, f3
807; CHECK-BE-NEXT:    xxswapd vs3, vs3
808; CHECK-BE-NEXT:    xscvdpsxws f3, f3
809; CHECK-BE-NEXT:    mffprwz r3, f4
810; CHECK-BE-NEXT:    sldi r3, r3, 48
811; CHECK-BE-NEXT:    mtvsrd v2, r3
812; CHECK-BE-NEXT:    mffprwz r3, f3
813; CHECK-BE-NEXT:    xscvdpsxws f3, f2
814; CHECK-BE-NEXT:    xxswapd vs2, vs2
815; CHECK-BE-NEXT:    sldi r3, r3, 48
816; CHECK-BE-NEXT:    xscvdpsxws f2, f2
817; CHECK-BE-NEXT:    mtvsrd v3, r3
818; CHECK-BE-NEXT:    vmrghh v2, v2, v3
819; CHECK-BE-NEXT:    mffprwz r3, f3
820; CHECK-BE-NEXT:    sldi r3, r3, 48
821; CHECK-BE-NEXT:    mtvsrd v3, r3
822; CHECK-BE-NEXT:    mffprwz r3, f2
823; CHECK-BE-NEXT:    xscvdpsxws f2, f1
824; CHECK-BE-NEXT:    xxswapd vs1, vs1
825; CHECK-BE-NEXT:    sldi r3, r3, 48
826; CHECK-BE-NEXT:    xscvdpsxws f1, f1
827; CHECK-BE-NEXT:    mtvsrd v4, r3
828; CHECK-BE-NEXT:    vmrghh v3, v3, v4
829; CHECK-BE-NEXT:    mffprwz r3, f2
830; CHECK-BE-NEXT:    sldi r3, r3, 48
831; CHECK-BE-NEXT:    vmrghw v2, v3, v2
832; CHECK-BE-NEXT:    mtvsrd v3, r3
833; CHECK-BE-NEXT:    mffprwz r3, f1
834; CHECK-BE-NEXT:    xscvdpsxws f1, f0
835; CHECK-BE-NEXT:    xxswapd vs0, vs0
836; CHECK-BE-NEXT:    sldi r3, r3, 48
837; CHECK-BE-NEXT:    xscvdpsxws f0, f0
838; CHECK-BE-NEXT:    mtvsrd v4, r3
839; CHECK-BE-NEXT:    vmrghh v3, v3, v4
840; CHECK-BE-NEXT:    mffprwz r3, f1
841; CHECK-BE-NEXT:    sldi r3, r3, 48
842; CHECK-BE-NEXT:    mtvsrd v4, r3
843; CHECK-BE-NEXT:    mffprwz r3, f0
844; CHECK-BE-NEXT:    sldi r3, r3, 48
845; CHECK-BE-NEXT:    mtvsrd v5, r3
846; CHECK-BE-NEXT:    vmrghh v4, v4, v5
847; CHECK-BE-NEXT:    vmrghw v3, v4, v3
848; CHECK-BE-NEXT:    xxmrghd v2, v3, v2
849; CHECK-BE-NEXT:    blr
850entry:
851  %a = load <8 x double>, <8 x double>* %0, align 64
852  %1 = fptosi <8 x double> %a to <8 x i16>
853  ret <8 x i16> %1
854}
855
856define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x double>* nocapture readonly) local_unnamed_addr #3 {
857; CHECK-P8-LABEL: test16elt_signed:
858; CHECK-P8:       # %bb.0: # %entry
859; CHECK-P8-NEXT:    li r5, 16
860; CHECK-P8-NEXT:    lxvd2x vs0, 0, r4
861; CHECK-P8-NEXT:    li r6, 32
862; CHECK-P8-NEXT:    li r7, 48
863; CHECK-P8-NEXT:    lxvd2x vs1, r4, r5
864; CHECK-P8-NEXT:    lxvd2x vs2, r4, r6
865; CHECK-P8-NEXT:    li r6, 64
866; CHECK-P8-NEXT:    lxvd2x vs3, r4, r7
867; CHECK-P8-NEXT:    lxvd2x vs5, r4, r6
868; CHECK-P8-NEXT:    li r7, 80
869; CHECK-P8-NEXT:    li r6, 96
870; CHECK-P8-NEXT:    xscvdpsxws f4, f0
871; CHECK-P8-NEXT:    lxvd2x vs7, r4, r7
872; CHECK-P8-NEXT:    lxvd2x vs10, r4, r6
873; CHECK-P8-NEXT:    li r6, 112
874; CHECK-P8-NEXT:    xxswapd vs0, vs0
875; CHECK-P8-NEXT:    xscvdpsxws f6, f1
876; CHECK-P8-NEXT:    xxswapd vs1, vs1
877; CHECK-P8-NEXT:    xscvdpsxws f8, f2
878; CHECK-P8-NEXT:    xxswapd vs2, vs2
879; CHECK-P8-NEXT:    xscvdpsxws f9, f3
880; CHECK-P8-NEXT:    xxswapd vs3, vs3
881; CHECK-P8-NEXT:    xscvdpsxws f11, f5
882; CHECK-P8-NEXT:    xxswapd vs5, vs5
883; CHECK-P8-NEXT:    xscvdpsxws f12, f7
884; CHECK-P8-NEXT:    xxswapd vs7, vs7
885; CHECK-P8-NEXT:    mffprwz r7, f4
886; CHECK-P8-NEXT:    lxvd2x vs4, r4, r6
887; CHECK-P8-NEXT:    mffprwz r4, f6
888; CHECK-P8-NEXT:    xscvdpsxws f13, f10
889; CHECK-P8-NEXT:    mtvsrd v3, r4
890; CHECK-P8-NEXT:    mffprwz r4, f8
891; CHECK-P8-NEXT:    xscvdpsxws f6, f4
892; CHECK-P8-NEXT:    mtvsrd v4, r4
893; CHECK-P8-NEXT:    mffprwz r4, f9
894; CHECK-P8-NEXT:    xscvdpsxws f0, f0
895; CHECK-P8-NEXT:    mtvsrd v5, r4
896; CHECK-P8-NEXT:    mffprwz r4, f11
897; CHECK-P8-NEXT:    xscvdpsxws f1, f1
898; CHECK-P8-NEXT:    mtvsrd v0, r4
899; CHECK-P8-NEXT:    mffprwz r4, f12
900; CHECK-P8-NEXT:    xscvdpsxws f2, f2
901; CHECK-P8-NEXT:    mtvsrd v1, r4
902; CHECK-P8-NEXT:    mffprwz r4, f13
903; CHECK-P8-NEXT:    xscvdpsxws f3, f3
904; CHECK-P8-NEXT:    mtvsrd v6, r4
905; CHECK-P8-NEXT:    mffprwz r4, f6
906; CHECK-P8-NEXT:    xxswapd vs6, vs10
907; CHECK-P8-NEXT:    xscvdpsxws f5, f5
908; CHECK-P8-NEXT:    mtvsrd v7, r4
909; CHECK-P8-NEXT:    mffprwz r4, f0
910; CHECK-P8-NEXT:    xxswapd vs0, vs4
911; CHECK-P8-NEXT:    mtvsrd v2, r7
912; CHECK-P8-NEXT:    mtvsrd v8, r4
913; CHECK-P8-NEXT:    mffprwz r4, f1
914; CHECK-P8-NEXT:    xscvdpsxws f7, f7
915; CHECK-P8-NEXT:    mtvsrd v9, r4
916; CHECK-P8-NEXT:    mffprwz r4, f2
917; CHECK-P8-NEXT:    xscvdpsxws f4, f6
918; CHECK-P8-NEXT:    vmrghh v2, v8, v2
919; CHECK-P8-NEXT:    mtvsrd v8, r4
920; CHECK-P8-NEXT:    mffprwz r4, f3
921; CHECK-P8-NEXT:    xscvdpsxws f0, f0
922; CHECK-P8-NEXT:    vmrghh v3, v9, v3
923; CHECK-P8-NEXT:    mtvsrd v9, r4
924; CHECK-P8-NEXT:    mffprwz r4, f5
925; CHECK-P8-NEXT:    vmrghh v4, v8, v4
926; CHECK-P8-NEXT:    mtvsrd v8, r4
927; CHECK-P8-NEXT:    mffprwz r4, f7
928; CHECK-P8-NEXT:    vmrghh v5, v9, v5
929; CHECK-P8-NEXT:    mtvsrd v9, r4
930; CHECK-P8-NEXT:    mffprwz r4, f4
931; CHECK-P8-NEXT:    vmrghh v0, v8, v0
932; CHECK-P8-NEXT:    mtvsrd v8, r4
933; CHECK-P8-NEXT:    mffprwz r4, f0
934; CHECK-P8-NEXT:    vmrghh v1, v9, v1
935; CHECK-P8-NEXT:    mtvsrd v9, r4
936; CHECK-P8-NEXT:    vmrghh v6, v8, v6
937; CHECK-P8-NEXT:    vmrghh v7, v9, v7
938; CHECK-P8-NEXT:    vmrglw v2, v3, v2
939; CHECK-P8-NEXT:    vmrglw v3, v5, v4
940; CHECK-P8-NEXT:    vmrglw v4, v1, v0
941; CHECK-P8-NEXT:    vmrglw v5, v7, v6
942; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
943; CHECK-P8-NEXT:    stvx v2, 0, r3
944; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
945; CHECK-P8-NEXT:    stvx v3, r3, r5
946; CHECK-P8-NEXT:    blr
947;
948; CHECK-P9-LABEL: test16elt_signed:
949; CHECK-P9:       # %bb.0: # %entry
950; CHECK-P9-NEXT:    lxv vs3, 0(r4)
951; CHECK-P9-NEXT:    lxv vs2, 16(r4)
952; CHECK-P9-NEXT:    lxv vs1, 32(r4)
953; CHECK-P9-NEXT:    lxv vs0, 48(r4)
954; CHECK-P9-NEXT:    xscvdpsxws f4, f3
955; CHECK-P9-NEXT:    xscvdpsxws f5, f2
956; CHECK-P9-NEXT:    xscvdpsxws f6, f1
957; CHECK-P9-NEXT:    xxswapd vs3, vs3
958; CHECK-P9-NEXT:    xscvdpsxws f7, f0
959; CHECK-P9-NEXT:    xxswapd vs2, vs2
960; CHECK-P9-NEXT:    xxswapd vs1, vs1
961; CHECK-P9-NEXT:    xxswapd vs0, vs0
962; CHECK-P9-NEXT:    xscvdpsxws f3, f3
963; CHECK-P9-NEXT:    xscvdpsxws f2, f2
964; CHECK-P9-NEXT:    xscvdpsxws f1, f1
965; CHECK-P9-NEXT:    xscvdpsxws f0, f0
966; CHECK-P9-NEXT:    mffprwz r5, f4
967; CHECK-P9-NEXT:    mtvsrd v2, r5
968; CHECK-P9-NEXT:    mffprwz r5, f5
969; CHECK-P9-NEXT:    mtvsrd v3, r5
970; CHECK-P9-NEXT:    mffprwz r5, f6
971; CHECK-P9-NEXT:    mtvsrd v4, r5
972; CHECK-P9-NEXT:    mffprwz r5, f7
973; CHECK-P9-NEXT:    mtvsrd v5, r5
974; CHECK-P9-NEXT:    mffprwz r5, f3
975; CHECK-P9-NEXT:    lxv vs3, 64(r4)
976; CHECK-P9-NEXT:    mtvsrd v0, r5
977; CHECK-P9-NEXT:    mffprwz r5, f2
978; CHECK-P9-NEXT:    lxv vs2, 80(r4)
979; CHECK-P9-NEXT:    vmrghh v2, v2, v0
980; CHECK-P9-NEXT:    mtvsrd v0, r5
981; CHECK-P9-NEXT:    mffprwz r5, f1
982; CHECK-P9-NEXT:    lxv vs1, 96(r4)
983; CHECK-P9-NEXT:    xscvdpsxws f4, f3
984; CHECK-P9-NEXT:    xxswapd vs3, vs3
985; CHECK-P9-NEXT:    vmrghh v3, v3, v0
986; CHECK-P9-NEXT:    mtvsrd v0, r5
987; CHECK-P9-NEXT:    mffprwz r5, f0
988; CHECK-P9-NEXT:    lxv vs0, 112(r4)
989; CHECK-P9-NEXT:    xscvdpsxws f3, f3
990; CHECK-P9-NEXT:    vmrghh v4, v4, v0
991; CHECK-P9-NEXT:    mtvsrd v0, r5
992; CHECK-P9-NEXT:    vmrglw v2, v3, v2
993; CHECK-P9-NEXT:    vmrghh v5, v5, v0
994; CHECK-P9-NEXT:    mffprwz r4, f4
995; CHECK-P9-NEXT:    vmrglw v4, v5, v4
996; CHECK-P9-NEXT:    mtvsrd v3, r4
997; CHECK-P9-NEXT:    mffprwz r4, f3
998; CHECK-P9-NEXT:    xscvdpsxws f3, f2
999; CHECK-P9-NEXT:    xxswapd vs2, vs2
1000; CHECK-P9-NEXT:    xxmrgld vs4, v4, v2
1001; CHECK-P9-NEXT:    mtvsrd v2, r4
1002; CHECK-P9-NEXT:    xscvdpsxws f2, f2
1003; CHECK-P9-NEXT:    vmrghh v2, v3, v2
1004; CHECK-P9-NEXT:    stxv vs4, 0(r3)
1005; CHECK-P9-NEXT:    mffprwz r4, f3
1006; CHECK-P9-NEXT:    mtvsrd v3, r4
1007; CHECK-P9-NEXT:    mffprwz r4, f2
1008; CHECK-P9-NEXT:    xscvdpsxws f2, f1
1009; CHECK-P9-NEXT:    xxswapd vs1, vs1
1010; CHECK-P9-NEXT:    mtvsrd v4, r4
1011; CHECK-P9-NEXT:    xscvdpsxws f1, f1
1012; CHECK-P9-NEXT:    vmrghh v3, v3, v4
1013; CHECK-P9-NEXT:    mffprwz r4, f2
1014; CHECK-P9-NEXT:    vmrglw v2, v3, v2
1015; CHECK-P9-NEXT:    mtvsrd v3, r4
1016; CHECK-P9-NEXT:    mffprwz r4, f1
1017; CHECK-P9-NEXT:    xscvdpsxws f1, f0
1018; CHECK-P9-NEXT:    xxswapd vs0, vs0
1019; CHECK-P9-NEXT:    mtvsrd v4, r4
1020; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1021; CHECK-P9-NEXT:    vmrghh v3, v3, v4
1022; CHECK-P9-NEXT:    mffprwz r4, f1
1023; CHECK-P9-NEXT:    mtvsrd v4, r4
1024; CHECK-P9-NEXT:    mffprwz r4, f0
1025; CHECK-P9-NEXT:    mtvsrd v5, r4
1026; CHECK-P9-NEXT:    vmrghh v4, v4, v5
1027; CHECK-P9-NEXT:    vmrglw v3, v4, v3
1028; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
1029; CHECK-P9-NEXT:    stxv vs0, 16(r3)
1030; CHECK-P9-NEXT:    blr
1031;
1032; CHECK-BE-LABEL: test16elt_signed:
1033; CHECK-BE:       # %bb.0: # %entry
1034; CHECK-BE-NEXT:    lxv vs4, 48(r4)
1035; CHECK-BE-NEXT:    lxv vs3, 32(r4)
1036; CHECK-BE-NEXT:    lxv vs2, 16(r4)
1037; CHECK-BE-NEXT:    lxv vs1, 0(r4)
1038; CHECK-BE-NEXT:    xscvdpsxws f5, f4
1039; CHECK-BE-NEXT:    xxswapd vs4, vs4
1040; CHECK-BE-NEXT:    xscvdpsxws f6, f3
1041; CHECK-BE-NEXT:    xxswapd vs3, vs3
1042; CHECK-BE-NEXT:    xscvdpsxws f7, f2
1043; CHECK-BE-NEXT:    lxv vs0, 112(r4)
1044; CHECK-BE-NEXT:    xxswapd vs2, vs2
1045; CHECK-BE-NEXT:    xscvdpsxws f4, f4
1046; CHECK-BE-NEXT:    xscvdpsxws f3, f3
1047; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1048; CHECK-BE-NEXT:    mffprwz r5, f5
1049; CHECK-BE-NEXT:    sldi r5, r5, 48
1050; CHECK-BE-NEXT:    mtvsrd v2, r5
1051; CHECK-BE-NEXT:    mffprwz r5, f4
1052; CHECK-BE-NEXT:    xscvdpsxws f4, f1
1053; CHECK-BE-NEXT:    xxswapd vs1, vs1
1054; CHECK-BE-NEXT:    sldi r5, r5, 48
1055; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1056; CHECK-BE-NEXT:    mtvsrd v3, r5
1057; CHECK-BE-NEXT:    mffprwz r5, f6
1058; CHECK-BE-NEXT:    sldi r5, r5, 48
1059; CHECK-BE-NEXT:    vmrghh v2, v2, v3
1060; CHECK-BE-NEXT:    mtvsrd v3, r5
1061; CHECK-BE-NEXT:    mffprwz r5, f3
1062; CHECK-BE-NEXT:    xscvdpsxws f3, f0
1063; CHECK-BE-NEXT:    xxswapd vs0, vs0
1064; CHECK-BE-NEXT:    sldi r5, r5, 48
1065; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1066; CHECK-BE-NEXT:    mtvsrd v4, r5
1067; CHECK-BE-NEXT:    mffprwz r5, f7
1068; CHECK-BE-NEXT:    sldi r5, r5, 48
1069; CHECK-BE-NEXT:    vmrghh v3, v3, v4
1070; CHECK-BE-NEXT:    mtvsrd v4, r5
1071; CHECK-BE-NEXT:    mffprwz r5, f4
1072; CHECK-BE-NEXT:    vmrghw v2, v3, v2
1073; CHECK-BE-NEXT:    sldi r5, r5, 48
1074; CHECK-BE-NEXT:    mtvsrd v5, r5
1075; CHECK-BE-NEXT:    mffprwz r5, f3
1076; CHECK-BE-NEXT:    sldi r5, r5, 48
1077; CHECK-BE-NEXT:    mtvsrd v0, r5
1078; CHECK-BE-NEXT:    mffprwz r5, f2
1079; CHECK-BE-NEXT:    lxv vs2, 96(r4)
1080; CHECK-BE-NEXT:    sldi r5, r5, 48
1081; CHECK-BE-NEXT:    mtvsrd v1, r5
1082; CHECK-BE-NEXT:    mffprwz r5, f1
1083; CHECK-BE-NEXT:    lxv vs1, 80(r4)
1084; CHECK-BE-NEXT:    xscvdpsxws f3, f2
1085; CHECK-BE-NEXT:    xxswapd vs2, vs2
1086; CHECK-BE-NEXT:    sldi r5, r5, 48
1087; CHECK-BE-NEXT:    vmrghh v4, v4, v1
1088; CHECK-BE-NEXT:    mtvsrd v1, r5
1089; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1090; CHECK-BE-NEXT:    mffprwz r5, f0
1091; CHECK-BE-NEXT:    lxv vs0, 64(r4)
1092; CHECK-BE-NEXT:    vmrghh v5, v5, v1
1093; CHECK-BE-NEXT:    sldi r5, r5, 48
1094; CHECK-BE-NEXT:    mffprwz r4, f3
1095; CHECK-BE-NEXT:    mtvsrd v1, r5
1096; CHECK-BE-NEXT:    vmrghw v3, v5, v4
1097; CHECK-BE-NEXT:    sldi r4, r4, 48
1098; CHECK-BE-NEXT:    vmrghh v0, v0, v1
1099; CHECK-BE-NEXT:    xxmrghd vs3, v3, v2
1100; CHECK-BE-NEXT:    mtvsrd v2, r4
1101; CHECK-BE-NEXT:    mffprwz r4, f2
1102; CHECK-BE-NEXT:    xscvdpsxws f2, f1
1103; CHECK-BE-NEXT:    xxswapd vs1, vs1
1104; CHECK-BE-NEXT:    sldi r4, r4, 48
1105; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1106; CHECK-BE-NEXT:    stxv vs3, 0(r3)
1107; CHECK-BE-NEXT:    mtvsrd v3, r4
1108; CHECK-BE-NEXT:    vmrghh v2, v2, v3
1109; CHECK-BE-NEXT:    mffprwz r4, f2
1110; CHECK-BE-NEXT:    sldi r4, r4, 48
1111; CHECK-BE-NEXT:    vmrghw v2, v2, v0
1112; CHECK-BE-NEXT:    mtvsrd v3, r4
1113; CHECK-BE-NEXT:    mffprwz r4, f1
1114; CHECK-BE-NEXT:    xscvdpsxws f1, f0
1115; CHECK-BE-NEXT:    xxswapd vs0, vs0
1116; CHECK-BE-NEXT:    sldi r4, r4, 48
1117; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1118; CHECK-BE-NEXT:    mtvsrd v4, r4
1119; CHECK-BE-NEXT:    vmrghh v3, v3, v4
1120; CHECK-BE-NEXT:    mffprwz r4, f1
1121; CHECK-BE-NEXT:    sldi r4, r4, 48
1122; CHECK-BE-NEXT:    mtvsrd v4, r4
1123; CHECK-BE-NEXT:    mffprwz r4, f0
1124; CHECK-BE-NEXT:    sldi r4, r4, 48
1125; CHECK-BE-NEXT:    mtvsrd v5, r4
1126; CHECK-BE-NEXT:    vmrghh v4, v4, v5
1127; CHECK-BE-NEXT:    vmrghw v3, v4, v3
1128; CHECK-BE-NEXT:    xxmrghd vs0, v3, v2
1129; CHECK-BE-NEXT:    stxv vs0, 16(r3)
1130; CHECK-BE-NEXT:    blr
1131entry:
1132  %a = load <16 x double>, <16 x double>* %0, align 128
1133  %1 = fptosi <16 x double> %a to <16 x i16>
1134  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
1135  ret void
1136}
1137