1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
5 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
6 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null
7 #include <arm_sve.h>
8
9 #ifdef SVE_OVERLOADED_FORMS
10 // A simple used,unused... macro, long enough to represent any SVE builtin.
11 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
12 #else
13 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
14 #endif
15
test_svcadd_f16_z(svbool_t pg,svfloat16_t op1,svfloat16_t op2)16 svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
17 {
18 // CHECK-LABEL: test_svcadd_f16_z
19 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
20 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
21 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 90)
22 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
23 return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 90);
24 }
25
test_svcadd_f16_z_1(svbool_t pg,svfloat16_t op1,svfloat16_t op2)26 svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
27 {
28 // CHECK-LABEL: test_svcadd_f16_z_1
29 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
30 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
31 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 270)
32 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
33 return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 270);
34 }
35
test_svcadd_f32_z(svbool_t pg,svfloat32_t op1,svfloat32_t op2)36 svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
37 {
38 // CHECK-LABEL: test_svcadd_f32_z
39 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
40 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
41 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2, i32 90)
42 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
43 return SVE_ACLE_FUNC(svcadd,_f32,_z,)(pg, op1, op2, 90);
44 }
45
test_svcadd_f64_z(svbool_t pg,svfloat64_t op1,svfloat64_t op2)46 svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
47 {
48 // CHECK-LABEL: test_svcadd_f64_z
49 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
50 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
51 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2, i32 90)
52 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
53 return SVE_ACLE_FUNC(svcadd,_f64,_z,)(pg, op1, op2, 90);
54 }
55
test_svcadd_f16_m(svbool_t pg,svfloat16_t op1,svfloat16_t op2)56 svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
57 {
58 // CHECK-LABEL: test_svcadd_f16_m
59 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
60 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
61 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
62 return SVE_ACLE_FUNC(svcadd,_f16,_m,)(pg, op1, op2, 90);
63 }
64
test_svcadd_f32_m(svbool_t pg,svfloat32_t op1,svfloat32_t op2)65 svfloat32_t test_svcadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
66 {
67 // CHECK-LABEL: test_svcadd_f32_m
68 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
69 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
70 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
71 return SVE_ACLE_FUNC(svcadd,_f32,_m,)(pg, op1, op2, 90);
72 }
73
test_svcadd_f64_m(svbool_t pg,svfloat64_t op1,svfloat64_t op2)74 svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
75 {
76 // CHECK-LABEL: test_svcadd_f64_m
77 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
78 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
79 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
80 return SVE_ACLE_FUNC(svcadd,_f64,_m,)(pg, op1, op2, 90);
81 }
82
test_svcadd_f16_x(svbool_t pg,svfloat16_t op1,svfloat16_t op2)83 svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
84 {
85 // CHECK-LABEL: test_svcadd_f16_x
86 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
87 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
88 // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
89 return SVE_ACLE_FUNC(svcadd,_f16,_x,)(pg, op1, op2, 90);
90 }
91
test_svcadd_f32_x(svbool_t pg,svfloat32_t op1,svfloat32_t op2)92 svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
93 {
94 // CHECK-LABEL: test_svcadd_f32_x
95 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
96 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
97 // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
98 return SVE_ACLE_FUNC(svcadd,_f32,_x,)(pg, op1, op2, 90);
99 }
100
test_svcadd_f64_x(svbool_t pg,svfloat64_t op1,svfloat64_t op2)101 svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
102 {
103 // CHECK-LABEL: test_svcadd_f64_x
104 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
105 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
106 // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
107 return SVE_ACLE_FUNC(svcadd,_f64,_x,)(pg, op1, op2, 90);
108 }
109