1 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
5
6 #include <arm_sve.h>
7
8 #ifdef SVE_OVERLOADED_FORMS
9 // A simple used,unused... macro, long enough to represent any SVE builtin.
10 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
11 #else
12 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
13 #endif
14
test_svld4_s8(svbool_t pg,const int8_t * base)15 svint8x4_t test_svld4_s8(svbool_t pg, const int8_t *base)
16 {
17 // CHECK-LABEL: test_svld4_s8
18 // CHECK: %[[LOAD:.*]] = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1(<vscale x 16 x i1> %pg, i8* %base)
19 // CHECK-NEXT: ret <vscale x 64 x i8> %[[LOAD]]
20 return SVE_ACLE_FUNC(svld4,_s8,,)(pg, base);
21 }
22
test_svld4_s16(svbool_t pg,const int16_t * base)23 svint16x4_t test_svld4_s16(svbool_t pg, const int16_t *base)
24 {
25 // CHECK-LABEL: test_svld4_s16
26 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
27 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x i16> @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1(<vscale x 8 x i1> %[[PG]], i16* %base)
28 // CHECK-NEXT: ret <vscale x 32 x i16> %[[LOAD]]
29 return SVE_ACLE_FUNC(svld4,_s16,,)(pg, base);
30 }
31
test_svld4_s32(svbool_t pg,const int32_t * base)32 svint32x4_t test_svld4_s32(svbool_t pg, const int32_t *base)
33 {
34 // CHECK-LABEL: test_svld4_s32
35 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
36 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x i32> @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1(<vscale x 4 x i1> %[[PG]], i32* %base)
37 // CHECK-NEXT: ret <vscale x 16 x i32> %[[LOAD]]
38 return SVE_ACLE_FUNC(svld4,_s32,,)(pg, base);
39 }
40
test_svld4_s64(svbool_t pg,const int64_t * base)41 svint64x4_t test_svld4_s64(svbool_t pg, const int64_t *base)
42 {
43 // CHECK-LABEL: test_svld4_s64
44 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
45 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i64> @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1(<vscale x 2 x i1> %[[PG]], i64* %base)
46 // CHECK-NEXT: ret <vscale x 8 x i64> %[[LOAD]]
47 return SVE_ACLE_FUNC(svld4,_s64,,)(pg, base);
48 }
49
test_svld4_u8(svbool_t pg,const uint8_t * base)50 svuint8x4_t test_svld4_u8(svbool_t pg, const uint8_t *base)
51 {
52 // CHECK-LABEL: test_svld4_u8
53 // CHECK: %[[LOAD:.*]] = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1(<vscale x 16 x i1> %pg, i8* %base)
54 // CHECK-NEXT: ret <vscale x 64 x i8> %[[LOAD]]
55 return SVE_ACLE_FUNC(svld4,_u8,,)(pg, base);
56 }
57
test_svld4_u16(svbool_t pg,const uint16_t * base)58 svuint16x4_t test_svld4_u16(svbool_t pg, const uint16_t *base)
59 {
60 // CHECK-LABEL: test_svld4_u16
61 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
62 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x i16> @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1(<vscale x 8 x i1> %[[PG]], i16* %base)
63 // CHECK-NEXT: ret <vscale x 32 x i16> %[[LOAD]]
64 return SVE_ACLE_FUNC(svld4,_u16,,)(pg, base);
65 }
66
test_svld4_u32(svbool_t pg,const uint32_t * base)67 svuint32x4_t test_svld4_u32(svbool_t pg, const uint32_t *base)
68 {
69 // CHECK-LABEL: test_svld4_u32
70 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
71 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x i32> @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1(<vscale x 4 x i1> %[[PG]], i32* %base)
72 // CHECK-NEXT: ret <vscale x 16 x i32> %[[LOAD]]
73 return SVE_ACLE_FUNC(svld4,_u32,,)(pg, base);
74 }
75
test_svld4_u64(svbool_t pg,const uint64_t * base)76 svuint64x4_t test_svld4_u64(svbool_t pg, const uint64_t *base)
77 {
78 // CHECK-LABEL: test_svld4_u64
79 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
80 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i64> @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1(<vscale x 2 x i1> %[[PG]], i64* %base)
81 // CHECK-NEXT: ret <vscale x 8 x i64> %[[LOAD]]
82 return SVE_ACLE_FUNC(svld4,_u64,,)(pg, base);
83 }
84
test_svld4_f16(svbool_t pg,const float16_t * base)85 svfloat16x4_t test_svld4_f16(svbool_t pg, const float16_t *base)
86 {
87 // CHECK-LABEL: test_svld4_f16
88 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
89 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1(<vscale x 8 x i1> %[[PG]], half* %base)
90 // CHECK-NEXT: ret <vscale x 32 x half> %[[LOAD]]
91 return SVE_ACLE_FUNC(svld4,_f16,,)(pg, base);
92 }
93
test_svld4_f32(svbool_t pg,const float32_t * base)94 svfloat32x4_t test_svld4_f32(svbool_t pg, const float32_t *base)
95 {
96 // CHECK-LABEL: test_svld4_f32
97 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
98 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x float> @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1(<vscale x 4 x i1> %[[PG]], float* %base)
99 // CHECK-NEXT: ret <vscale x 16 x float> %[[LOAD]]
100 return SVE_ACLE_FUNC(svld4,_f32,,)(pg, base);
101 }
102
test_svld4_f64(svbool_t pg,const float64_t * base)103 svfloat64x4_t test_svld4_f64(svbool_t pg, const float64_t *base)
104 {
105 // CHECK-LABEL: test_svld4_f64
106 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
107 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x double> @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1(<vscale x 2 x i1> %[[PG]], double* %base)
108 // CHECK-NEXT: ret <vscale x 8 x double> %[[LOAD]]
109 return SVE_ACLE_FUNC(svld4,_f64,,)(pg, base);
110 }
111
test_svld4_vnum_s8(svbool_t pg,const int8_t * base,int64_t vnum)112 svint8x4_t test_svld4_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum)
113 {
114 // CHECK-LABEL: test_svld4_vnum_s8
115 // CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
116 // CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum, i64 0
117 // CHECK: %[[LOAD:.*]] = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1(<vscale x 16 x i1> %pg, i8* %[[GEP]])
118 // CHECK-NEXT: ret <vscale x 64 x i8> %[[LOAD]]
119 return SVE_ACLE_FUNC(svld4_vnum,_s8,,)(pg, base, vnum);
120 }
121
test_svld4_vnum_s16(svbool_t pg,const int16_t * base,int64_t vnum)122 svint16x4_t test_svld4_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum)
123 {
124 // CHECK-LABEL: test_svld4_vnum_s16
125 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
126 // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to <vscale x 8 x i16>*
127 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BASE]], i64 %vnum, i64 0
128 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x i16> @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1(<vscale x 8 x i1> %[[PG]], i16* %[[GEP]])
129 // CHECK-NEXT: ret <vscale x 32 x i16> %[[LOAD]]
130 return SVE_ACLE_FUNC(svld4_vnum,_s16,,)(pg, base, vnum);
131 }
132
test_svld4_vnum_s32(svbool_t pg,const int32_t * base,int64_t vnum)133 svint32x4_t test_svld4_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum)
134 {
135 // CHECK-LABEL: test_svld4_vnum_s32
136 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
137 // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 4 x i32>*
138 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BASE]], i64 %vnum, i64 0
139 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x i32> @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1(<vscale x 4 x i1> %[[PG]], i32* %[[GEP]])
140 // CHECK-NEXT: ret <vscale x 16 x i32> %[[LOAD]]
141 return SVE_ACLE_FUNC(svld4_vnum,_s32,,)(pg, base, vnum);
142 }
143
test_svld4_vnum_s64(svbool_t pg,const int64_t * base,int64_t vnum)144 svint64x4_t test_svld4_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum)
145 {
146 // CHECK-LABEL: test_svld4_vnum_s64
147 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
148 // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to <vscale x 2 x i64>*
149 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BASE]], i64 %vnum, i64 0
150 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i64> @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1(<vscale x 2 x i1> %[[PG]], i64* %[[GEP]])
151 // CHECK-NEXT: ret <vscale x 8 x i64> %[[LOAD]]
152 return SVE_ACLE_FUNC(svld4_vnum,_s64,,)(pg, base, vnum);
153 }
154
test_svld4_vnum_u8(svbool_t pg,const uint8_t * base,int64_t vnum)155 svuint8x4_t test_svld4_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum)
156 {
157 // CHECK-LABEL: test_svld4_vnum_u8
158 // CHECK: %[[BASE:.*]] = bitcast i8* %base to <vscale x 16 x i8>*
159 // CHECK: %[[GEP:.*]] = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %[[BASE]], i64 %vnum, i64 0
160 // CHECK: %[[LOAD:.*]] = call <vscale x 64 x i8> @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1(<vscale x 16 x i1> %pg, i8* %[[GEP]])
161 // CHECK-NEXT: ret <vscale x 64 x i8> %[[LOAD]]
162 return SVE_ACLE_FUNC(svld4_vnum,_u8,,)(pg, base, vnum);
163 }
164
test_svld4_vnum_u16(svbool_t pg,const uint16_t * base,int64_t vnum)165 svuint16x4_t test_svld4_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum)
166 {
167 // CHECK-LABEL: test_svld4_vnum_u16
168 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
169 // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to <vscale x 8 x i16>*
170 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %[[BASE]], i64 %vnum, i64 0
171 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x i16> @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1(<vscale x 8 x i1> %[[PG]], i16* %[[GEP]])
172 // CHECK-NEXT: ret <vscale x 32 x i16> %[[LOAD]]
173 return SVE_ACLE_FUNC(svld4_vnum,_u16,,)(pg, base, vnum);
174 }
175
test_svld4_vnum_u32(svbool_t pg,const uint32_t * base,int64_t vnum)176 svuint32x4_t test_svld4_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum)
177 {
178 // CHECK-LABEL: test_svld4_vnum_u32
179 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
180 // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to <vscale x 4 x i32>*
181 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %[[BASE]], i64 %vnum, i64 0
182 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x i32> @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1(<vscale x 4 x i1> %[[PG]], i32* %[[GEP]])
183 // CHECK-NEXT: ret <vscale x 16 x i32> %[[LOAD]]
184 return SVE_ACLE_FUNC(svld4_vnum,_u32,,)(pg, base, vnum);
185 }
186
test_svld4_vnum_u64(svbool_t pg,const uint64_t * base,int64_t vnum)187 svuint64x4_t test_svld4_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum)
188 {
189 // CHECK-LABEL: test_svld4_vnum_u64
190 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
191 // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to <vscale x 2 x i64>*
192 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %[[BASE]], i64 %vnum, i64 0
193 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i64> @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1(<vscale x 2 x i1> %[[PG]], i64* %[[GEP]])
194 // CHECK-NEXT: ret <vscale x 8 x i64> %[[LOAD]]
195 return SVE_ACLE_FUNC(svld4_vnum,_u64,,)(pg, base, vnum);
196 }
197
test_svld4_vnum_f16(svbool_t pg,const float16_t * base,int64_t vnum)198 svfloat16x4_t test_svld4_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum)
199 {
200 // CHECK-LABEL: test_svld4_vnum_f16
201 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
202 // CHECK-DAG: %[[BASE:.*]] = bitcast half* %base to <vscale x 8 x half>*
203 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x half>, <vscale x 8 x half>* %[[BASE]], i64 %vnum, i64 0
204 // CHECK: %[[LOAD:.*]] = call <vscale x 32 x half> @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1(<vscale x 8 x i1> %[[PG]], half* %[[GEP]])
205 // CHECK-NEXT: ret <vscale x 32 x half> %[[LOAD]]
206 return SVE_ACLE_FUNC(svld4_vnum,_f16,,)(pg, base, vnum);
207 }
208
test_svld4_vnum_f32(svbool_t pg,const float32_t * base,int64_t vnum)209 svfloat32x4_t test_svld4_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum)
210 {
211 // CHECK-LABEL: test_svld4_vnum_f32
212 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
213 // CHECK-DAG: %[[BASE:.*]] = bitcast float* %base to <vscale x 4 x float>*
214 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x float>, <vscale x 4 x float>* %[[BASE]], i64 %vnum, i64 0
215 // CHECK: %[[LOAD:.*]] = call <vscale x 16 x float> @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1(<vscale x 4 x i1> %[[PG]], float* %[[GEP]])
216 // CHECK-NEXT: ret <vscale x 16 x float> %[[LOAD]]
217 return SVE_ACLE_FUNC(svld4_vnum,_f32,,)(pg, base, vnum);
218 }
219
test_svld4_vnum_f64(svbool_t pg,const float64_t * base,int64_t vnum)220 svfloat64x4_t test_svld4_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum)
221 {
222 // CHECK-LABEL: test_svld4_vnum_f64
223 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
224 // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to <vscale x 2 x double>*
225 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x double>, <vscale x 2 x double>* %[[BASE]], i64 %vnum, i64 0
226 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x double> @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1(<vscale x 2 x i1> %[[PG]], double* %[[GEP]])
227 // CHECK-NEXT: ret <vscale x 8 x double> %[[LOAD]]
228 return SVE_ACLE_FUNC(svld4_vnum,_f64,,)(pg, base, vnum);
229 }
230