1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null
5 #include <arm_sve.h>
6
test_svldnf1uh_s32(svbool_t pg,const uint16_t * base)7 svint32_t test_svldnf1uh_s32(svbool_t pg, const uint16_t *base)
8 {
9 // CHECK-LABEL: test_svldnf1uh_s32
10 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
11 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnf1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base)
12 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
13 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
14 return svldnf1uh_s32(pg, base);
15 }
16
test_svldnf1uh_s64(svbool_t pg,const uint16_t * base)17 svint64_t test_svldnf1uh_s64(svbool_t pg, const uint16_t *base)
18 {
19 // CHECK-LABEL: test_svldnf1uh_s64
20 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
21 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnf1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base)
22 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
23 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
24 return svldnf1uh_s64(pg, base);
25 }
26
test_svldnf1uh_u32(svbool_t pg,const uint16_t * base)27 svuint32_t test_svldnf1uh_u32(svbool_t pg, const uint16_t *base)
28 {
29 // CHECK-LABEL: test_svldnf1uh_u32
30 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
31 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnf1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %base)
32 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
33 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
34 return svldnf1uh_u32(pg, base);
35 }
36
test_svldnf1uh_u64(svbool_t pg,const uint16_t * base)37 svuint64_t test_svldnf1uh_u64(svbool_t pg, const uint16_t *base)
38 {
39 // CHECK-LABEL: test_svldnf1uh_u64
40 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
41 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnf1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %base)
42 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
43 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
44 return svldnf1uh_u64(pg, base);
45 }
46
test_svldnf1uh_vnum_s32(svbool_t pg,const uint16_t * base,int64_t vnum)47 svint32_t test_svldnf1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum)
48 {
49 // CHECK-LABEL: test_svldnf1uh_vnum_s32
50 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
51 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 4 x i16>*
52 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i16>, <vscale x 4 x i16>* %[[BITCAST]], i64 %vnum, i64 0
53 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnf1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %[[GEP]])
54 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
55 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
56 return svldnf1uh_vnum_s32(pg, base, vnum);
57 }
58
test_svldnf1uh_vnum_s64(svbool_t pg,const uint16_t * base,int64_t vnum)59 svint64_t test_svldnf1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum)
60 {
61 // CHECK-LABEL: test_svldnf1uh_vnum_s64
62 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
63 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
64 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BITCAST]], i64 %vnum, i64 0
65 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnf1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %[[GEP]])
66 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
67 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
68 return svldnf1uh_vnum_s64(pg, base, vnum);
69 }
70
test_svldnf1uh_vnum_u32(svbool_t pg,const uint16_t * base,int64_t vnum)71 svuint32_t test_svldnf1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum)
72 {
73 // CHECK-LABEL: test_svldnf1uh_vnum_u32
74 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
75 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 4 x i16>*
76 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i16>, <vscale x 4 x i16>* %[[BITCAST]], i64 %vnum, i64 0
77 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i16> @llvm.aarch64.sve.ldnf1.nxv4i16(<vscale x 4 x i1> %[[PG]], i16* %[[GEP]])
78 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i16> %[[LOAD]] to <vscale x 4 x i32>
79 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
80 return svldnf1uh_vnum_u32(pg, base, vnum);
81 }
82
test_svldnf1uh_vnum_u64(svbool_t pg,const uint16_t * base,int64_t vnum)83 svuint64_t test_svldnf1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum)
84 {
85 // CHECK-LABEL: test_svldnf1uh_vnum_u64
86 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
87 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to <vscale x 2 x i16>*
88 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i16>, <vscale x 2 x i16>* %[[BITCAST]], i64 %vnum, i64 0
89 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnf1.nxv2i16(<vscale x 2 x i1> %[[PG]], i16* %[[GEP]])
90 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i16> %[[LOAD]] to <vscale x 2 x i64>
91 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
92 return svldnf1uh_vnum_u64(pg, base, vnum);
93 }
94