1 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=PPC
2 // RUN: %clang_cc1 -mfloat-abi hard -triple armv7-unknown-linux-gnueabi -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM32
3 // RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64
4 // RUN: %clang_cc1 -mfloat-abi hard -triple x86_64-unknown-windows-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=X64
5 // RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-windows-msvc -emit-llvm -o - %s | FileCheck %s --check-prefix=WOA64
6 
7 #if defined(__x86_64__)
8 #define CC __attribute__((vectorcall))
9 #else
10 #define CC
11 #endif
12 
13 // Test that C++ classes are correctly classified as homogeneous aggregates.
14 
15 struct Base1 {
16   int x;
17 };
18 struct Base2 {
19   double x;
20 };
21 struct Base3 {
22   double x;
23 };
24 struct D1 : Base1 {  // non-homogeneous aggregate
25   double y, z;
26 };
27 struct D2 : Base2 {  // homogeneous aggregate
28   double y, z;
29 };
30 struct D3 : Base1, Base2 {  // non-homogeneous aggregate
31   double y, z;
32 };
33 struct D4 : Base2, Base3 {  // homogeneous aggregate
34   double y, z;
35 };
36 
37 struct I1 : Base2 {};
38 struct I2 : Base2 {};
39 struct I3 : Base2 {};
40 struct D5 : I1, I2, I3 {}; // homogeneous aggregate
41 
42 // PPC: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
43 // ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, [3 x i64] %x.coerce)
44 // ARM64: define{{.*}} void @_Z7func_D12D1(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
45 // X64: define dso_local x86_vectorcallcc void @"\01_Z7func_D12D1@@24"(%struct.D1* noalias sret(%struct.D1) align 8 %agg.result, %struct.D1* %x)
func_D1(D1 x)46 D1 CC func_D1(D1 x) { return x; }
47 
48 // PPC: define{{.*}} [3 x double] @_Z7func_D22D2([3 x double] %x.coerce)
49 // ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D2 @_Z7func_D22D2(%struct.D2 %x.coerce)
50 // ARM64: define{{.*}} %struct.D2 @_Z7func_D22D2([3 x double] %x.coerce)
51 // X64: define dso_local x86_vectorcallcc %struct.D2 @"\01_Z7func_D22D2@@24"(%struct.D2 inreg %x.coerce)
func_D2(D2 x)52 D2 CC func_D2(D2 x) { return x; }
53 
54 // PPC: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
55 // ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, [4 x i64] %x.coerce)
56 // ARM64: define{{.*}} void @_Z7func_D32D3(%struct.D3* noalias sret(%struct.D3) align 8 %agg.result, %struct.D3* %x)
func_D3(D3 x)57 D3 CC func_D3(D3 x) { return x; }
58 
59 // PPC: define{{.*}} [4 x double] @_Z7func_D42D4([4 x double] %x.coerce)
60 // ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D4 @_Z7func_D42D4(%struct.D4 %x.coerce)
61 // ARM64: define{{.*}} %struct.D4 @_Z7func_D42D4([4 x double] %x.coerce)
func_D4(D4 x)62 D4 CC func_D4(D4 x) { return x; }
63 
func_D5(D5 x)64 D5 CC func_D5(D5 x) { return x; }
65 // PPC: define{{.*}} [3 x double] @_Z7func_D52D5([3 x double] %x.coerce)
66 // ARM32: define{{.*}} arm_aapcs_vfpcc %struct.D5 @_Z7func_D52D5(%struct.D5 %x.coerce)
67 
68 // The C++ multiple inheritance expansion case is a little more complicated, so
69 // do some extra checking.
70 //
71 // ARM64-LABEL: define{{.*}} %struct.D5 @_Z7func_D52D5([3 x double] %x.coerce)
72 // ARM64: bitcast %struct.D5* %{{.*}} to [3 x double]*
73 // ARM64: store [3 x double] %x.coerce, [3 x double]*
74 
call_D5(D5 * p)75 void call_D5(D5 *p) {
76   func_D5(*p);
77 }
78 
79 // Check the call site.
80 //
81 // ARM64-LABEL: define{{.*}} void @_Z7call_D5P2D5(%struct.D5* %p)
82 // ARM64: load [3 x double], [3 x double]*
83 // ARM64: call %struct.D5 @_Z7func_D52D5([3 x double] %{{.*}})
84 
85 struct Empty { };
86 struct Float1 { float x; };
87 struct Float2 { float y; };
88 struct HVAWithEmptyBase : Float1, Empty, Float2 { float z; };
89 
90 // PPC: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
91 // ARM64: define{{.*}} void @_Z15with_empty_base16HVAWithEmptyBase([3 x float] %a.coerce)
92 // ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z15with_empty_base16HVAWithEmptyBase(%struct.HVAWithEmptyBase %a.coerce)
with_empty_base(HVAWithEmptyBase a)93 void CC with_empty_base(HVAWithEmptyBase a) {}
94 
95 // FIXME: MSVC doesn't consider this an HVA because of the empty base.
96 // X64: define dso_local x86_vectorcallcc void @"\01_Z15with_empty_base16HVAWithEmptyBase@@16"(%struct.HVAWithEmptyBase inreg %a.coerce)
97 
98 struct HVAWithEmptyBitField : Float1, Float2 {
99   int : 0; // Takes no space.
100   float z;
101 };
102 
103 // PPC: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
104 // ARM64: define{{.*}} void @_Z19with_empty_bitfield20HVAWithEmptyBitField([3 x float] %a.coerce)
105 // ARM32: define{{.*}} arm_aapcs_vfpcc void @_Z19with_empty_bitfield20HVAWithEmptyBitField(%struct.HVAWithEmptyBitField %a.coerce)
106 // X64: define dso_local x86_vectorcallcc void @"\01_Z19with_empty_bitfield20HVAWithEmptyBitField@@16"(%struct.HVAWithEmptyBitField inreg %a.coerce)
with_empty_bitfield(HVAWithEmptyBitField a)107 void CC with_empty_bitfield(HVAWithEmptyBitField a) {}
108 
109 namespace pr47611 {
110 // MSVC on Arm includes "isCXX14Aggregate" as part of its definition of
111 // Homogeneous Floating-point Aggregate (HFA). Additionally, it has a different
112 // handling of C++14 aggregates, which can lead to confusion.
113 
114 // Pod is a trivial HFA.
115 struct Pod {
116   double b[2];
117 };
118 // Not an aggregate according to C++14 spec => not HFA according to MSVC.
119 struct NotCXX14Aggregate {
120   NotCXX14Aggregate();
121   Pod p;
122 };
123 // NotPod is a C++14 aggregate. But not HFA, because it contains
124 // NotCXX14Aggregate (which itself is not HFA because it's not a C++14
125 // aggregate).
126 struct NotPod {
127   NotCXX14Aggregate x;
128 };
129 struct Empty {};
130 // A class with a base is returned using the sret calling convetion by MSVC.
131 struct HasEmptyBase : public Empty {
132   double b[2];
133 };
134 struct HasPodBase : public Pod {};
135 // WOA64-LABEL: define dso_local %"struct.pr47611::Pod" @"?copy@pr47611@@YA?AUPod@1@PEAU21@@Z"(%"struct.pr47611::Pod"* %x)
copy(Pod * x)136 Pod copy(Pod *x) { return *x; } // MSVC: ldp d0,d1,[x0], Clang: ldp d0,d1,[x0]
137 // WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUNotCXX14Aggregate@1@PEAU21@@Z"(%"struct.pr47611::NotCXX14Aggregate"* inreg noalias sret(%"struct.pr47611::NotCXX14Aggregate") align 8 %agg.result, %"struct.pr47611::NotCXX14Aggregate"* %x)
copy(NotCXX14Aggregate * x)138 NotCXX14Aggregate copy(NotCXX14Aggregate *x) { return *x; } // MSVC: stp x8,x9,[x0], Clang: str q0,[x0]
139 // WOA64-LABEL: define dso_local [2 x i64] @"?copy@pr47611@@YA?AUNotPod@1@PEAU21@@Z"(%"struct.pr47611::NotPod"* %x)
copy(NotPod * x)140 NotPod copy(NotPod *x) { return *x; }
141 // WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUHasEmptyBase@1@PEAU21@@Z"(%"struct.pr47611::HasEmptyBase"* inreg noalias sret(%"struct.pr47611::HasEmptyBase") align 8 %agg.result, %"struct.pr47611::HasEmptyBase"* %x)
copy(HasEmptyBase * x)142 HasEmptyBase copy(HasEmptyBase *x) { return *x; }
143 // WOA64-LABEL: define dso_local void @"?copy@pr47611@@YA?AUHasPodBase@1@PEAU21@@Z"(%"struct.pr47611::HasPodBase"* inreg noalias sret(%"struct.pr47611::HasPodBase") align 8 %agg.result, %"struct.pr47611::HasPodBase"* %x)
copy(HasPodBase * x)144 HasPodBase copy(HasPodBase *x) { return *x; }
145 
call_copy_pod(Pod * pod)146 void call_copy_pod(Pod *pod) {
147   *pod = copy(pod);
148   // WOA64-LABEL: define dso_local void @"?call_copy_pod@pr47611@@YAXPEAUPod@1@@Z"
149   // WOA64: %{{.*}} = call %"struct.pr47611::Pod" @"?copy@pr47611@@YA?AUPod@1@PEAU21@@Z"(%"struct.pr47611::Pod"* %{{.*}})
150 }
151 
call_copy_notcxx14aggregate(NotCXX14Aggregate * notcxx14aggregate)152 void call_copy_notcxx14aggregate(NotCXX14Aggregate *notcxx14aggregate) {
153   *notcxx14aggregate = copy(notcxx14aggregate);
154   // WOA64-LABEL: define dso_local void @"?call_copy_notcxx14aggregate@pr47611@@YAXPEAUNotCXX14Aggregate@1@@Z"
155   // WOA64: call void @"?copy@pr47611@@YA?AUNotCXX14Aggregate@1@PEAU21@@Z"(%"struct.pr47611::NotCXX14Aggregate"* inreg sret(%"struct.pr47611::NotCXX14Aggregate") align 8 %{{.*}}, %"struct.pr47611::NotCXX14Aggregate"* %{{.*}})
156 }
157 
call_copy_notpod(NotPod * notPod)158 void call_copy_notpod(NotPod *notPod) {
159   *notPod = copy(notPod);
160   // WOA64-LABEL: define dso_local void @"?call_copy_notpod@pr47611@@YAXPEAUNotPod@1@@Z"
161   // WOA64: %{{.*}} = call [2 x i64] @"?copy@pr47611@@YA?AUNotPod@1@PEAU21@@Z"(%"struct.pr47611::NotPod"* %{{.*}})
162 }
163 
call_copy_hasemptybase(HasEmptyBase * hasEmptyBase)164 void call_copy_hasemptybase(HasEmptyBase *hasEmptyBase) {
165   *hasEmptyBase = copy(hasEmptyBase);
166   // WOA64-LABEL: define dso_local void @"?call_copy_hasemptybase@pr47611@@YAXPEAUHasEmptyBase@1@@Z"
167   // WOA64: call void @"?copy@pr47611@@YA?AUHasEmptyBase@1@PEAU21@@Z"(%"struct.pr47611::HasEmptyBase"* inreg sret(%"struct.pr47611::HasEmptyBase") align 8 %{{.*}}, %"struct.pr47611::HasEmptyBase"* %{{.*}})
168 }
169 
call_copy_haspodbase(HasPodBase * hasPodBase)170 void call_copy_haspodbase(HasPodBase *hasPodBase) {
171   *hasPodBase = copy(hasPodBase);
172   // WOA64-LABEL: define dso_local void @"?call_copy_haspodbase@pr47611@@YAXPEAUHasPodBase@1@@Z"
173   // WOA64: call void @"?copy@pr47611@@YA?AUHasPodBase@1@PEAU21@@Z"(%"struct.pr47611::HasPodBase"* inreg sret(%"struct.pr47611::HasPodBase") align 8 %{{.*}}, %"struct.pr47611::HasPodBase"* %{{.*}})
174 }
175 }; // namespace pr47611
176