1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=gfx1010 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX10 %s
4
5define amdgpu_ps <4 x float> @load_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
6; GFX9-LABEL: load_1d:
7; GFX9:       ; %bb.0: ; %main_body
8; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
9; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
10; GFX9-NEXT:    ; return to shader part epilog
11;
12; GFX10-LABEL: load_1d:
13; GFX10:       ; %bb.0: ; %main_body
14; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
15; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
16; GFX10-NEXT:    ; return to shader part epilog
17main_body:
18  %s = extractelement <2 x i16> %coords, i32 0
19  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
20  ret <4 x float> %v
21}
22
23define amdgpu_ps <4 x float> @load_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
24; GFX9-LABEL: load_2d:
25; GFX9:       ; %bb.0: ; %main_body
26; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
27; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
28; GFX9-NEXT:    ; return to shader part epilog
29;
30; GFX10-LABEL: load_2d:
31; GFX10:       ; %bb.0: ; %main_body
32; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
33; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
34; GFX10-NEXT:    ; return to shader part epilog
35main_body:
36  %s = extractelement <2 x i16> %coords, i32 0
37  %t = extractelement <2 x i16> %coords, i32 1
38  %v = call <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
39  ret <4 x float> %v
40}
41
42define amdgpu_ps <4 x float> @load_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
43; GFX9-LABEL: load_3d:
44; GFX9:       ; %bb.0: ; %main_body
45; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
46; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
47; GFX9-NEXT:    ; return to shader part epilog
48;
49; GFX10-LABEL: load_3d:
50; GFX10:       ; %bb.0: ; %main_body
51; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
52; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
53; GFX10-NEXT:    ; return to shader part epilog
54main_body:
55  %s = extractelement <2 x i16> %coords_lo, i32 0
56  %t = extractelement <2 x i16> %coords_lo, i32 1
57  %r = extractelement <2 x i16> %coords_hi, i32 0
58  %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
59  ret <4 x float> %v
60}
61
62define amdgpu_ps <4 x float> @load_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
63; GFX9-LABEL: load_cube:
64; GFX9:       ; %bb.0: ; %main_body
65; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
66; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
67; GFX9-NEXT:    ; return to shader part epilog
68;
69; GFX10-LABEL: load_cube:
70; GFX10:       ; %bb.0: ; %main_body
71; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
72; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
73; GFX10-NEXT:    ; return to shader part epilog
74main_body:
75  %s = extractelement <2 x i16> %coords_lo, i32 0
76  %t = extractelement <2 x i16> %coords_lo, i32 1
77  %slice = extractelement <2 x i16> %coords_hi, i32 0
78  %v = call <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
79  ret <4 x float> %v
80}
81
82define amdgpu_ps <4 x float> @load_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
83; GFX9-LABEL: load_1darray:
84; GFX9:       ; %bb.0: ; %main_body
85; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
86; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
87; GFX9-NEXT:    ; return to shader part epilog
88;
89; GFX10-LABEL: load_1darray:
90; GFX10:       ; %bb.0: ; %main_body
91; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
92; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
93; GFX10-NEXT:    ; return to shader part epilog
94main_body:
95  %s = extractelement <2 x i16> %coords, i32 0
96  %slice = extractelement <2 x i16> %coords, i32 1
97  %v = call <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
98  ret <4 x float> %v
99}
100
101define amdgpu_ps <4 x float> @load_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
102; GFX9-LABEL: load_2darray:
103; GFX9:       ; %bb.0: ; %main_body
104; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
105; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
106; GFX9-NEXT:    ; return to shader part epilog
107;
108; GFX10-LABEL: load_2darray:
109; GFX10:       ; %bb.0: ; %main_body
110; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
111; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
112; GFX10-NEXT:    ; return to shader part epilog
113main_body:
114  %s = extractelement <2 x i16> %coords_lo, i32 0
115  %t = extractelement <2 x i16> %coords_lo, i32 1
116  %slice = extractelement <2 x i16> %coords_hi, i32 0
117  %v = call <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
118  ret <4 x float> %v
119}
120
121define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
122; GFX9-LABEL: load_2dmsaa:
123; GFX9:       ; %bb.0: ; %main_body
124; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x00,0xf0,0x00,0x00,0x00,0x00]
125; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
126; GFX9-NEXT:    ; return to shader part epilog
127;
128; GFX10-LABEL: load_2dmsaa:
129; GFX10:       ; %bb.0: ; %main_body
130; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
131; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
132; GFX10-NEXT:    ; return to shader part epilog
133main_body:
134  %s = extractelement <2 x i16> %coords_lo, i32 0
135  %t = extractelement <2 x i16> %coords_lo, i32 1
136  %fragid = extractelement <2 x i16> %coords_hi, i32 0
137  %v = call <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
138  ret <4 x float> %v
139}
140
141define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
142; GFX9-LABEL: load_2darraymsaa:
143; GFX9:       ; %bb.0: ; %main_body
144; GFX9-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x00,0xf0,0x00,0x00,0x00,0x00]
145; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
146; GFX9-NEXT:    ; return to shader part epilog
147;
148; GFX10-LABEL: load_2darraymsaa:
149; GFX10:       ; %bb.0: ; %main_body
150; GFX10-NEXT:    image_load v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x00,0xf0,0x00,0x00,0x00,0x40]
151; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
152; GFX10-NEXT:    ; return to shader part epilog
153main_body:
154  %s = extractelement <2 x i16> %coords_lo, i32 0
155  %t = extractelement <2 x i16> %coords_lo, i32 1
156  %slice = extractelement <2 x i16> %coords_hi, i32 0
157  %fragid = extractelement <2 x i16> %coords_hi, i32 1
158  %v = call <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
159  ret <4 x float> %v
160}
161
162define amdgpu_ps <4 x float> @load_mip_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
163; GFX9-LABEL: load_mip_1d:
164; GFX9:       ; %bb.0: ; %main_body
165; GFX9-NEXT:    image_load_mip v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
166; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
167; GFX9-NEXT:    ; return to shader part epilog
168;
169; GFX10-LABEL: load_mip_1d:
170; GFX10:       ; %bb.0: ; %main_body
171; GFX10-NEXT:    image_load_mip v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
172; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
173; GFX10-NEXT:    ; return to shader part epilog
174main_body:
175  %s = extractelement <2 x i16> %coords, i32 0
176  %mip = extractelement <2 x i16> %coords, i32 1
177  %v = call <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
178  ret <4 x float> %v
179}
180
181define amdgpu_ps <4 x float> @load_mip_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
182; GFX9-LABEL: load_mip_2d:
183; GFX9:       ; %bb.0: ; %main_body
184; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
185; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
186; GFX9-NEXT:    ; return to shader part epilog
187;
188; GFX10-LABEL: load_mip_2d:
189; GFX10:       ; %bb.0: ; %main_body
190; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
191; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
192; GFX10-NEXT:    ; return to shader part epilog
193main_body:
194  %s = extractelement <2 x i16> %coords_lo, i32 0
195  %t = extractelement <2 x i16> %coords_lo, i32 1
196  %mip = extractelement <2 x i16> %coords_hi, i32 0
197  %v = call <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
198  ret <4 x float> %v
199}
200
201define amdgpu_ps <4 x float> @load_mip_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
202; GFX9-LABEL: load_mip_3d:
203; GFX9:       ; %bb.0: ; %main_body
204; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x04,0xf0,0x00,0x00,0x00,0x00]
205; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
206; GFX9-NEXT:    ; return to shader part epilog
207;
208; GFX10-LABEL: load_mip_3d:
209; GFX10:       ; %bb.0: ; %main_body
210; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
211; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
212; GFX10-NEXT:    ; return to shader part epilog
213main_body:
214  %s = extractelement <2 x i16> %coords_lo, i32 0
215  %t = extractelement <2 x i16> %coords_lo, i32 1
216  %r = extractelement <2 x i16> %coords_hi, i32 0
217  %mip = extractelement <2 x i16> %coords_hi, i32 1
218  %v = call <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
219  ret <4 x float> %v
220}
221
222define amdgpu_ps <4 x float> @load_mip_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
223; GFX9-LABEL: load_mip_cube:
224; GFX9:       ; %bb.0: ; %main_body
225; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
226; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
227; GFX9-NEXT:    ; return to shader part epilog
228;
229; GFX10-LABEL: load_mip_cube:
230; GFX10:       ; %bb.0: ; %main_body
231; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
232; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
233; GFX10-NEXT:    ; return to shader part epilog
234main_body:
235  %s = extractelement <2 x i16> %coords_lo, i32 0
236  %t = extractelement <2 x i16> %coords_lo, i32 1
237  %slice = extractelement <2 x i16> %coords_hi, i32 0
238  %mip = extractelement <2 x i16> %coords_hi, i32 1
239  %v = call <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
240  ret <4 x float> %v
241}
242
243define amdgpu_ps <4 x float> @load_mip_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
244; GFX9-LABEL: load_mip_1darray:
245; GFX9:       ; %bb.0: ; %main_body
246; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
247; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
248; GFX9-NEXT:    ; return to shader part epilog
249;
250; GFX10-LABEL: load_mip_1darray:
251; GFX10:       ; %bb.0: ; %main_body
252; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
253; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
254; GFX10-NEXT:    ; return to shader part epilog
255main_body:
256  %s = extractelement <2 x i16> %coords_lo, i32 0
257  %slice = extractelement <2 x i16> %coords_lo, i32 1
258  %mip = extractelement <2 x i16> %coords_hi, i32 0
259  %v = call <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
260  ret <4 x float> %v
261}
262
263define amdgpu_ps <4 x float> @load_mip_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
264; GFX9-LABEL: load_mip_2darray:
265; GFX9:       ; %bb.0: ; %main_body
266; GFX9-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x04,0xf0,0x00,0x00,0x00,0x00]
267; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
268; GFX9-NEXT:    ; return to shader part epilog
269;
270; GFX10-LABEL: load_mip_2darray:
271; GFX10:       ; %bb.0: ; %main_body
272; GFX10-NEXT:    image_load_mip v[0:3], v[0:1], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x04,0xf0,0x00,0x00,0x00,0x40]
273; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
274; GFX10-NEXT:    ; return to shader part epilog
275main_body:
276  %s = extractelement <2 x i16> %coords_lo, i32 0
277  %t = extractelement <2 x i16> %coords_lo, i32 1
278  %slice = extractelement <2 x i16> %coords_hi, i32 0
279  %mip = extractelement <2 x i16> %coords_hi, i32 1
280  %v = call <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
281  ret <4 x float> %v
282}
283
284define amdgpu_ps void @store_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
285; GFX9-LABEL: store_1d:
286; GFX9:       ; %bb.0: ; %main_body
287; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
288; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
289;
290; GFX10-LABEL: store_1d:
291; GFX10:       ; %bb.0: ; %main_body
292; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
293; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
294main_body:
295  %s = extractelement <2 x i16> %coords, i32 0
296  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
297  ret void
298}
299
300define amdgpu_ps void @store_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
301; GFX9-LABEL: store_2d:
302; GFX9:       ; %bb.0: ; %main_body
303; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
304; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
305;
306; GFX10-LABEL: store_2d:
307; GFX10:       ; %bb.0: ; %main_body
308; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
309; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
310main_body:
311  %s = extractelement <2 x i16> %coords, i32 0
312  %t = extractelement <2 x i16> %coords, i32 1
313  call void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, <8 x i32> %rsrc, i32 0, i32 0)
314  ret void
315}
316
317define amdgpu_ps void @store_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
318; GFX9-LABEL: store_3d:
319; GFX9:       ; %bb.0: ; %main_body
320; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
321; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
322;
323; GFX10-LABEL: store_3d:
324; GFX10:       ; %bb.0: ; %main_body
325; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
326; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
327main_body:
328  %s = extractelement <2 x i16> %coords_lo, i32 0
329  %t = extractelement <2 x i16> %coords_lo, i32 1
330  %r = extractelement <2 x i16> %coords_hi, i32 0
331  call void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
332  ret void
333}
334
335define amdgpu_ps void @store_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
336; GFX9-LABEL: store_cube:
337; GFX9:       ; %bb.0: ; %main_body
338; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
339; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
340;
341; GFX10-LABEL: store_cube:
342; GFX10:       ; %bb.0: ; %main_body
343; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
344; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
345main_body:
346  %s = extractelement <2 x i16> %coords_lo, i32 0
347  %t = extractelement <2 x i16> %coords_lo, i32 1
348  %slice = extractelement <2 x i16> %coords_hi, i32 0
349  call void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
350  ret void
351}
352
353define amdgpu_ps void @store_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
354; GFX9-LABEL: store_1darray:
355; GFX9:       ; %bb.0: ; %main_body
356; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
357; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
358;
359; GFX10-LABEL: store_1darray:
360; GFX10:       ; %bb.0: ; %main_body
361; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
362; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
363main_body:
364  %s = extractelement <2 x i16> %coords, i32 0
365  %slice = extractelement <2 x i16> %coords, i32 1
366  call void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
367  ret void
368}
369
370define amdgpu_ps void @store_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
371; GFX9-LABEL: store_2darray:
372; GFX9:       ; %bb.0: ; %main_body
373; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
374; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
375;
376; GFX10-LABEL: store_2darray:
377; GFX10:       ; %bb.0: ; %main_body
378; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
379; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
380main_body:
381  %s = extractelement <2 x i16> %coords_lo, i32 0
382  %t = extractelement <2 x i16> %coords_lo, i32 1
383  %slice = extractelement <2 x i16> %coords_hi, i32 0
384  call void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, <8 x i32> %rsrc, i32 0, i32 0)
385  ret void
386}
387
388define amdgpu_ps void @store_2dmsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
389; GFX9-LABEL: store_2dmsaa:
390; GFX9:       ; %bb.0: ; %main_body
391; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x20,0xf0,0x04,0x00,0x00,0x00]
392; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
393;
394; GFX10-LABEL: store_2dmsaa:
395; GFX10:       ; %bb.0: ; %main_body
396; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
397; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
398main_body:
399  %s = extractelement <2 x i16> %coords_lo, i32 0
400  %t = extractelement <2 x i16> %coords_lo, i32 1
401  %fragid = extractelement <2 x i16> %coords_hi, i32 0
402  call void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
403  ret void
404}
405
406define amdgpu_ps void @store_2darraymsaa(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
407; GFX9-LABEL: store_2darraymsaa:
408; GFX9:       ; %bb.0: ; %main_body
409; GFX9-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x20,0xf0,0x04,0x00,0x00,0x00]
410; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
411;
412; GFX10-LABEL: store_2darraymsaa:
413; GFX10:       ; %bb.0: ; %main_body
414; GFX10-NEXT:    image_store v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x20,0xf0,0x04,0x00,0x00,0x40]
415; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
416main_body:
417  %s = extractelement <2 x i16> %coords_lo, i32 0
418  %t = extractelement <2 x i16> %coords_lo, i32 1
419  %slice = extractelement <2 x i16> %coords_hi, i32 0
420  %fragid = extractelement <2 x i16> %coords_hi, i32 1
421  call void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
422  ret void
423}
424
425define amdgpu_ps void @store_mip_1d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
426; GFX9-LABEL: store_mip_1d:
427; GFX9:       ; %bb.0: ; %main_body
428; GFX9-NEXT:    image_store_mip v[0:3], v4, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
429; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
430;
431; GFX10-LABEL: store_mip_1d:
432; GFX10:       ; %bb.0: ; %main_body
433; GFX10-NEXT:    image_store_mip v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
434; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
435main_body:
436  %s = extractelement <2 x i16> %coords, i32 0
437  %mip = extractelement <2 x i16> %coords, i32 1
438  call void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
439  ret void
440}
441
442define amdgpu_ps void @store_mip_2d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
443; GFX9-LABEL: store_mip_2d:
444; GFX9:       ; %bb.0: ; %main_body
445; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
446; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
447;
448; GFX10-LABEL: store_mip_2d:
449; GFX10:       ; %bb.0: ; %main_body
450; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
451; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
452main_body:
453  %s = extractelement <2 x i16> %coords_lo, i32 0
454  %t = extractelement <2 x i16> %coords_lo, i32 1
455  %mip = extractelement <2 x i16> %coords_hi, i32 0
456  call void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
457  ret void
458}
459
460define amdgpu_ps void @store_mip_3d(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
461; GFX9-LABEL: store_mip_3d:
462; GFX9:       ; %bb.0: ; %main_body
463; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x24,0xf0,0x04,0x00,0x00,0x00]
464; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
465;
466; GFX10-LABEL: store_mip_3d:
467; GFX10:       ; %bb.0: ; %main_body
468; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
469; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
470main_body:
471  %s = extractelement <2 x i16> %coords_lo, i32 0
472  %t = extractelement <2 x i16> %coords_lo, i32 1
473  %r = extractelement <2 x i16> %coords_hi, i32 0
474  %mip = extractelement <2 x i16> %coords_hi, i32 1
475  call void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %r, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
476  ret void
477}
478
479define amdgpu_ps void @store_mip_cube(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
480; GFX9-LABEL: store_mip_cube:
481; GFX9:       ; %bb.0: ; %main_body
482; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
483; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
484;
485; GFX10-LABEL: store_mip_cube:
486; GFX10:       ; %bb.0: ; %main_body
487; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
488; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
489main_body:
490  %s = extractelement <2 x i16> %coords_lo, i32 0
491  %t = extractelement <2 x i16> %coords_lo, i32 1
492  %slice = extractelement <2 x i16> %coords_hi, i32 0
493  %mip = extractelement <2 x i16> %coords_hi, i32 1
494  call void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
495  ret void
496}
497
498define amdgpu_ps void @store_mip_1darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
499; GFX9-LABEL: store_mip_1darray:
500; GFX9:       ; %bb.0: ; %main_body
501; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
502; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
503;
504; GFX10-LABEL: store_mip_1darray:
505; GFX10:       ; %bb.0: ; %main_body
506; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
507; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
508main_body:
509  %s = extractelement <2 x i16> %coords_lo, i32 0
510  %slice = extractelement <2 x i16> %coords_lo, i32 1
511  %mip = extractelement <2 x i16> %coords_hi, i32 0
512  call void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
513  ret void
514}
515
516define amdgpu_ps void @store_mip_2darray(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords_lo, <2 x i16> %coords_hi) {
517; GFX9-LABEL: store_mip_2darray:
518; GFX9:       ; %bb.0: ; %main_body
519; GFX9-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x24,0xf0,0x04,0x00,0x00,0x00]
520; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
521;
522; GFX10-LABEL: store_mip_2darray:
523; GFX10:       ; %bb.0: ; %main_body
524; GFX10-NEXT:    image_store_mip v[0:3], v[4:5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x24,0xf0,0x04,0x00,0x00,0x40]
525; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
526main_body:
527  %s = extractelement <2 x i16> %coords_lo, i32 0
528  %t = extractelement <2 x i16> %coords_lo, i32 1
529  %slice = extractelement <2 x i16> %coords_hi, i32 0
530  %mip = extractelement <2 x i16> %coords_hi, i32 1
531  call void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, i16 %t, i16 %slice, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
532  ret void
533}
534
535define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
536; GFX9-LABEL: getresinfo_1d:
537; GFX9:       ; %bb.0: ; %main_body
538; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
539; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
540; GFX9-NEXT:    ; return to shader part epilog
541;
542; GFX10-LABEL: getresinfo_1d:
543; GFX10:       ; %bb.0: ; %main_body
544; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
545; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
546; GFX10-NEXT:    ; return to shader part epilog
547main_body:
548  %mip = extractelement <2 x i16> %coords, i32 0
549  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
550  ret <4 x float> %v
551}
552
553define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
554; GFX9-LABEL: getresinfo_2d:
555; GFX9:       ; %bb.0: ; %main_body
556; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
557; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
558; GFX9-NEXT:    ; return to shader part epilog
559;
560; GFX10-LABEL: getresinfo_2d:
561; GFX10:       ; %bb.0: ; %main_body
562; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 ; encoding: [0x08,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
563; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
564; GFX10-NEXT:    ; return to shader part epilog
565main_body:
566  %mip = extractelement <2 x i16> %coords, i32 0
567  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
568  ret <4 x float> %v
569}
570
571define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
572; GFX9-LABEL: getresinfo_3d:
573; GFX9:       ; %bb.0: ; %main_body
574; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
575; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
576; GFX9-NEXT:    ; return to shader part epilog
577;
578; GFX10-LABEL: getresinfo_3d:
579; GFX10:       ; %bb.0: ; %main_body
580; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 ; encoding: [0x10,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
581; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
582; GFX10-NEXT:    ; return to shader part epilog
583main_body:
584  %mip = extractelement <2 x i16> %coords, i32 0
585  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
586  ret <4 x float> %v
587}
588
589define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
590; GFX9-LABEL: getresinfo_cube:
591; GFX9:       ; %bb.0: ; %main_body
592; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
593; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
594; GFX9-NEXT:    ; return to shader part epilog
595;
596; GFX10-LABEL: getresinfo_cube:
597; GFX10:       ; %bb.0: ; %main_body
598; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 ; encoding: [0x18,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
599; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
600; GFX10-NEXT:    ; return to shader part epilog
601main_body:
602  %mip = extractelement <2 x i16> %coords, i32 0
603  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
604  ret <4 x float> %v
605}
606
607define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
608; GFX9-LABEL: getresinfo_1darray:
609; GFX9:       ; %bb.0: ; %main_body
610; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
611; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
612; GFX9-NEXT:    ; return to shader part epilog
613;
614; GFX10-LABEL: getresinfo_1darray:
615; GFX10:       ; %bb.0: ; %main_body
616; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 ; encoding: [0x20,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
617; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
618; GFX10-NEXT:    ; return to shader part epilog
619main_body:
620  %mip = extractelement <2 x i16> %coords, i32 0
621  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
622  ret <4 x float> %v
623}
624
625define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
626; GFX9-LABEL: getresinfo_2darray:
627; GFX9:       ; %bb.0: ; %main_body
628; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
629; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
630; GFX9-NEXT:    ; return to shader part epilog
631;
632; GFX10-LABEL: getresinfo_2darray:
633; GFX10:       ; %bb.0: ; %main_body
634; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 ; encoding: [0x28,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
635; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
636; GFX10-NEXT:    ; return to shader part epilog
637main_body:
638  %mip = extractelement <2 x i16> %coords, i32 0
639  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
640  ret <4 x float> %v
641}
642
643define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
644; GFX9-LABEL: getresinfo_2dmsaa:
645; GFX9:       ; %bb.0: ; %main_body
646; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 ; encoding: [0x00,0x9f,0x38,0xf0,0x00,0x00,0x00,0x00]
647; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
648; GFX9-NEXT:    ; return to shader part epilog
649;
650; GFX10-LABEL: getresinfo_2dmsaa:
651; GFX10:       ; %bb.0: ; %main_body
652; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 ; encoding: [0x30,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
653; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
654; GFX10-NEXT:    ; return to shader part epilog
655main_body:
656  %mip = extractelement <2 x i16> %coords, i32 0
657  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
658  ret <4 x float> %v
659}
660
661define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
662; GFX9-LABEL: getresinfo_2darraymsaa:
663; GFX9:       ; %bb.0: ; %main_body
664; GFX9-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da ; encoding: [0x00,0xdf,0x38,0xf0,0x00,0x00,0x00,0x00]
665; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
666; GFX9-NEXT:    ; return to shader part epilog
667;
668; GFX10-LABEL: getresinfo_2darraymsaa:
669; GFX10:       ; %bb.0: ; %main_body
670; GFX10-NEXT:    image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 ; encoding: [0x38,0x1f,0x38,0xf0,0x00,0x00,0x00,0x40]
671; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
672; GFX10-NEXT:    ; return to shader part epilog
673main_body:
674  %mip = extractelement <2 x i16> %coords, i32 0
675  %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
676  ret <4 x float> %v
677}
678
679define amdgpu_ps float @load_1d_V1(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
680; GFX9-LABEL: load_1d_V1:
681; GFX9:       ; %bb.0: ; %main_body
682; GFX9-NEXT:    image_load v0, v0, s[0:7] dmask:0x8 unorm a16 ; encoding: [0x00,0x98,0x00,0xf0,0x00,0x00,0x00,0x00]
683; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
684; GFX9-NEXT:    ; return to shader part epilog
685;
686; GFX10-LABEL: load_1d_V1:
687; GFX10:       ; %bb.0: ; %main_body
688; GFX10-NEXT:    image_load v0, v0, s[0:7] dmask:0x8 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x18,0x00,0xf0,0x00,0x00,0x00,0x40]
689; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
690; GFX10-NEXT:    ; return to shader part epilog
691main_body:
692  %s = extractelement <2 x i16> %coords, i32 0
693  %v = call float @llvm.amdgcn.image.load.1d.f32.i16(i32 8, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
694  ret float %v
695}
696
697define amdgpu_ps <2 x float> @load_1d_V2(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
698; GFX9-LABEL: load_1d_V2:
699; GFX9:       ; %bb.0: ; %main_body
700; GFX9-NEXT:    image_load v[0:1], v0, s[0:7] dmask:0x9 unorm a16 ; encoding: [0x00,0x99,0x00,0xf0,0x00,0x00,0x00,0x00]
701; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
702; GFX9-NEXT:    ; return to shader part epilog
703;
704; GFX10-LABEL: load_1d_V2:
705; GFX10:       ; %bb.0: ; %main_body
706; GFX10-NEXT:    image_load v[0:1], v0, s[0:7] dmask:0x9 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x19,0x00,0xf0,0x00,0x00,0x00,0x40]
707; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
708; GFX10-NEXT:    ; return to shader part epilog
709main_body:
710  %s = extractelement <2 x i16> %coords, i32 0
711  %v = call <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32 9, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
712  ret <2 x float> %v
713}
714
715define amdgpu_ps void @store_1d_V1(<8 x i32> inreg %rsrc, float %vdata, <2 x i16> %coords) {
716; GFX9-LABEL: store_1d_V1:
717; GFX9:       ; %bb.0: ; %main_body
718; GFX9-NEXT:    image_store v0, v1, s[0:7] dmask:0x2 unorm a16 ; encoding: [0x00,0x92,0x20,0xf0,0x01,0x00,0x00,0x00]
719; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
720;
721; GFX10-LABEL: store_1d_V1:
722; GFX10:       ; %bb.0: ; %main_body
723; GFX10-NEXT:    image_store v0, v1, s[0:7] dmask:0x2 dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x12,0x20,0xf0,0x01,0x00,0x00,0x40]
724; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
725main_body:
726  %s = extractelement <2 x i16> %coords, i32 0
727  call void @llvm.amdgcn.image.store.1d.f32.i16(float %vdata, i32 2, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
728  ret void
729}
730
731define amdgpu_ps void @store_1d_V2(<8 x i32> inreg %rsrc, <2 x float> %vdata, <2 x i16> %coords) {
732; GFX9-LABEL: store_1d_V2:
733; GFX9:       ; %bb.0: ; %main_body
734; GFX9-NEXT:    image_store v[0:1], v2, s[0:7] dmask:0xc unorm a16 ; encoding: [0x00,0x9c,0x20,0xf0,0x02,0x00,0x00,0x00]
735; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
736;
737; GFX10-LABEL: store_1d_V2:
738; GFX10:       ; %bb.0: ; %main_body
739; GFX10-NEXT:    image_store v[0:1], v2, s[0:7] dmask:0xc dim:SQ_RSRC_IMG_1D unorm a16 ; encoding: [0x00,0x1c,0x20,0xf0,0x02,0x00,0x00,0x40]
740; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
741main_body:
742  %s = extractelement <2 x i16> %coords, i32 0
743  call void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float> %vdata, i32 12, i16 %s, <8 x i32> %rsrc, i32 0, i32 0)
744  ret void
745}
746
747define amdgpu_ps <4 x float> @load_1d_glc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
748; GFX9-LABEL: load_1d_glc:
749; GFX9:       ; %bb.0: ; %main_body
750; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc a16 ; encoding: [0x00,0xbf,0x00,0xf0,0x00,0x00,0x00,0x00]
751; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
752; GFX9-NEXT:    ; return to shader part epilog
753;
754; GFX10-LABEL: load_1d_glc:
755; GFX10:       ; %bb.0: ; %main_body
756; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 ; encoding: [0x00,0x3f,0x00,0xf0,0x00,0x00,0x00,0x40]
757; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
758; GFX10-NEXT:    ; return to shader part epilog
759main_body:
760  %s = extractelement <2 x i16> %coords, i32 0
761  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
762  ret <4 x float> %v
763}
764
765define amdgpu_ps <4 x float> @load_1d_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
766; GFX9-LABEL: load_1d_slc:
767; GFX9:       ; %bb.0: ; %main_body
768; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm slc a16 ; encoding: [0x00,0x9f,0x00,0xf2,0x00,0x00,0x00,0x00]
769; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
770; GFX9-NEXT:    ; return to shader part epilog
771;
772; GFX10-LABEL: load_1d_slc:
773; GFX10:       ; %bb.0: ; %main_body
774; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 ; encoding: [0x00,0x1f,0x00,0xf2,0x00,0x00,0x00,0x40]
775; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
776; GFX10-NEXT:    ; return to shader part epilog
777main_body:
778  %s = extractelement <2 x i16> %coords, i32 0
779  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
780  ret <4 x float> %v
781}
782
783define amdgpu_ps <4 x float> @load_1d_glc_slc(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
784; GFX9-LABEL: load_1d_glc_slc:
785; GFX9:       ; %bb.0: ; %main_body
786; GFX9-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf unorm glc slc a16 ; encoding: [0x00,0xbf,0x00,0xf2,0x00,0x00,0x00,0x00]
787; GFX9-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x0f,0x8c,0xbf]
788; GFX9-NEXT:    ; return to shader part epilog
789;
790; GFX10-LABEL: load_1d_glc_slc:
791; GFX10:       ; %bb.0: ; %main_body
792; GFX10-NEXT:    image_load v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 ; encoding: [0x00,0x3f,0x00,0xf2,0x00,0x00,0x00,0x40]
793; GFX10-NEXT:    s_waitcnt vmcnt(0) ; encoding: [0x70,0x3f,0x8c,0xbf]
794; GFX10-NEXT:    ; return to shader part epilog
795main_body:
796  %s = extractelement <2 x i16> %coords, i32 0
797  %v = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
798  ret <4 x float> %v
799}
800
801define amdgpu_ps void @store_1d_glc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
802; GFX9-LABEL: store_1d_glc:
803; GFX9:       ; %bb.0: ; %main_body
804; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc a16 ; encoding: [0x00,0xbf,0x20,0xf0,0x04,0x00,0x00,0x00]
805; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
806;
807; GFX10-LABEL: store_1d_glc:
808; GFX10:       ; %bb.0: ; %main_body
809; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc a16 ; encoding: [0x00,0x3f,0x20,0xf0,0x04,0x00,0x00,0x40]
810; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
811main_body:
812  %s = extractelement <2 x i16> %coords, i32 0
813  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 1)
814  ret void
815}
816
817define amdgpu_ps void @store_1d_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
818; GFX9-LABEL: store_1d_slc:
819; GFX9:       ; %bb.0: ; %main_body
820; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm slc a16 ; encoding: [0x00,0x9f,0x20,0xf2,0x04,0x00,0x00,0x00]
821; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
822;
823; GFX10-LABEL: store_1d_slc:
824; GFX10:       ; %bb.0: ; %main_body
825; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm slc a16 ; encoding: [0x00,0x1f,0x20,0xf2,0x04,0x00,0x00,0x40]
826; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
827main_body:
828  %s = extractelement <2 x i16> %coords, i32 0
829  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 2)
830  ret void
831}
832
833define amdgpu_ps void @store_1d_glc_slc(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) {
834; GFX9-LABEL: store_1d_glc_slc:
835; GFX9:       ; %bb.0: ; %main_body
836; GFX9-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf unorm glc slc a16 ; encoding: [0x00,0xbf,0x20,0xf2,0x04,0x00,0x00,0x00]
837; GFX9-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
838;
839; GFX10-LABEL: store_1d_glc_slc:
840; GFX10:       ; %bb.0: ; %main_body
841; GFX10-NEXT:    image_store v[0:3], v4, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm glc slc a16 ; encoding: [0x00,0x3f,0x20,0xf2,0x04,0x00,0x00,0x40]
842; GFX10-NEXT:    s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
843main_body:
844  %s = extractelement <2 x i16> %coords, i32 0
845  call void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float> %vdata, i32 15, i16 %s, <8 x i32> %rsrc, i32 0, i32 3)
846  ret void
847}
848
849define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, <2 x i16> %coords) #0 {
850; GFX9-LABEL: getresinfo_dmask0:
851; GFX9:       ; %bb.0: ; %main_body
852; GFX9-NEXT:    ; return to shader part epilog
853;
854; GFX10-LABEL: getresinfo_dmask0:
855; GFX10:       ; %bb.0: ; %main_body
856; GFX10-NEXT:    ; return to shader part epilog
857main_body:
858  %mip = extractelement <2 x i16> %coords, i32 0
859  %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0)
860  ret <4 x float> %r
861}
862
863declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #1
864declare <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
865declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
866declare <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
867declare <4 x float> @llvm.amdgcn.image.load.1darray.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
868declare <4 x float> @llvm.amdgcn.image.load.2darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
869declare <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
870declare <4 x float> @llvm.amdgcn.image.load.2darraymsaa.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
871
872declare <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
873declare <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
874declare <4 x float> @llvm.amdgcn.image.load.mip.3d.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
875declare <4 x float> @llvm.amdgcn.image.load.mip.cube.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
876declare <4 x float> @llvm.amdgcn.image.load.mip.1darray.v4f32.i16(i32, i16, i16, i16, <8 x i32>, i32, i32) #1
877declare <4 x float> @llvm.amdgcn.image.load.mip.2darray.v4f32.i16(i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #1
878
879declare void @llvm.amdgcn.image.store.1d.v4f32.i16(<4 x float>, i32, i16, <8 x i32>, i32, i32) #0
880declare void @llvm.amdgcn.image.store.2d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
881declare void @llvm.amdgcn.image.store.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
882declare void @llvm.amdgcn.image.store.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
883declare void @llvm.amdgcn.image.store.1darray.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
884declare void @llvm.amdgcn.image.store.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
885declare void @llvm.amdgcn.image.store.2dmsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
886declare void @llvm.amdgcn.image.store.2darraymsaa.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
887
888declare void @llvm.amdgcn.image.store.mip.1d.v4f32.i16(<4 x float>, i32, i16, i16, <8 x i32>, i32, i32) #0
889declare void @llvm.amdgcn.image.store.mip.2d.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
890declare void @llvm.amdgcn.image.store.mip.3d.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
891declare void @llvm.amdgcn.image.store.mip.cube.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
892declare void @llvm.amdgcn.image.store.mip.1darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, <8 x i32>, i32, i32) #0
893declare void @llvm.amdgcn.image.store.mip.2darray.v4f32.i16(<4 x float>, i32, i16, i16, i16, i16, <8 x i32>, i32, i32) #0
894
895declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
896declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
897declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
898declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
899declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
900declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
901declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
902declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32, i16, <8 x i32>, i32, i32) #2
903
904declare float @llvm.amdgcn.image.load.1d.f32.i16(i32, i16, <8 x i32>, i32, i32) #1
905declare float @llvm.amdgcn.image.load.2d.f32.i16(i32, i16, i16, <8 x i32>, i32, i32) #1
906declare <2 x float> @llvm.amdgcn.image.load.1d.v2f32.i16(i32, i16, <8 x i32>, i32, i32) #1
907declare void @llvm.amdgcn.image.store.1d.f32.i16(float, i32, i16, <8 x i32>, i32, i32) #0
908declare void @llvm.amdgcn.image.store.1d.v2f32.i16(<2 x float>, i32, i16, <8 x i32>, i32, i32) #0
909
910attributes #0 = { nounwind }
911attributes #1 = { nounwind readonly }
912attributes #2 = { nounwind readnone }
913