1; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-T
2; RUN: llc -mtriple=armv7-apple-ios   -disable-block-placement < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-A
3
4; LSR should compare against the post-incremented induction variable.
5; In this case, the immediate value is -2 which requires a cmn instruction.
6;
7; CHECK-LABEL: f:
8; CHECK: %for.body
9; CHECK: sub{{.*}}[[IV:r[0-9]+]], #2
10; CHECK-T: adds{{.*}}[[IV]], #2
11; CHECK-A: cmn{{.*}}[[IV]], #2
12; CHECK: bne
13define i32 @f(i32* nocapture %a, i32 %i) nounwind readonly ssp {
14entry:
15  %cmp3 = icmp eq i32 %i, -2
16  br i1 %cmp3, label %for.end, label %for.body
17
18for.body:                                         ; preds = %entry, %for.body
19  %bi.06 = phi i32 [ %i.addr.0.bi.0, %for.body ], [ 0, %entry ]
20  %i.addr.05 = phi i32 [ %sub, %for.body ], [ %i, %entry ]
21  %b.04 = phi i32 [ %.b.0, %for.body ], [ 0, %entry ]
22  %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.addr.05
23  %0 = load i32, i32* %arrayidx, align 4
24  %cmp1 = icmp sgt i32 %0, %b.04
25  %.b.0 = select i1 %cmp1, i32 %0, i32 %b.04
26  %i.addr.0.bi.0 = select i1 %cmp1, i32 %i.addr.05, i32 %bi.06
27  %sub = add nsw i32 %i.addr.05, -2
28  %cmp = icmp eq i32 %i.addr.05, 0
29  br i1 %cmp, label %for.end, label %for.body
30
31for.end:                                          ; preds = %for.body, %entry
32  %bi.0.lcssa = phi i32 [ 0, %entry ], [ %i.addr.0.bi.0, %for.body ]
33  ret i32 %bi.0.lcssa
34}
35