1; RUN: sed -e "s/ORDER/monotonic/" %s | llc -march=hexagon | FileCheck %s
2; RUN: sed -e "s/ORDER/acquire/"   %s | llc -march=hexagon | FileCheck %s
3; RUN: sed -e "s/ORDER/release/"   %s | llc -march=hexagon | FileCheck %s
4; RUN: sed -e "s/ORDER/acq_rel/"   %s | llc -march=hexagon | FileCheck %s
5; RUN: sed -e "s/ORDER/seq_cst/"   %s | llc -march=hexagon | FileCheck %s
6
7@g0 = global i32 0, align 4
8@g1 = global i32 0, align 4
9@g2 = global i32 0, align 4
10@g3 = global i64 0, align 8
11@g4 = global i64 0, align 8
12@g5 = global i64 0, align 8
13
14; CHECK-LABEL: f0:
15; CHECK-DAG: [[SECOND_ADDR:r[0-9]+]] = ##g1
16; CHECK-DAG: [[FIRST_VALUE:r[0-9]+]] = memw(gp+#g0)
17
18; CHECK: [[FAIL_LABEL:\.LBB.*]]:
19
20; CHECK: [[LOCKED_READ_REG:r[0-9]+]] = memw_locked([[SECOND_ADDR]])
21; CHECK: [[AND_RESULT_REG:r[0-9]+]] = and([[LOCKED_READ_REG]],[[FIRST_VALUE]])
22; CHECK: [[RESULT_REG:r[0-9]+]] = sub(#-1,[[AND_RESULT_REG]])
23; CHECK: memw_locked([[SECOND_ADDR]],[[LOCK_PRED_REG:p[0-9]+]]) = [[RESULT_REG]]
24
25; CHECK: if (![[LOCK_PRED_REG]]) jump{{.*}}[[FAIL_LABEL]]
26; CHECK-DAG: memw(gp+#g2) = [[LOCKED_READ_REG]]
27; CHECK-DAG: jumpr r31
28define void @f0() {
29b0:
30  %v0 = load i32, i32* @g0, align 4
31  %v1 = atomicrmw nand i32* @g1, i32 %v0 ORDER
32  store i32 %v1, i32* @g2, align 4
33  ret void
34}
35
36; CHECK-LABEL: f1:
37; CHECK-DAG: [[SECOND_ADDR:r[0-9]+]] = ##g4
38; CHECK-DAG: [[FIRST_VALUE:r[:0-9]+]] = memd(gp+#g3)
39
40; CHECK: [[FAIL_LABEL:\.LBB.*]]:
41
42; CHECK: [[LOCKED_READ_REG:r[:0-9]+]] = memd_locked([[SECOND_ADDR]])
43; CHECK: [[AND_RESULT_REG:r[:0-9]+]] = and([[LOCKED_READ_REG]],[[FIRST_VALUE]])
44; CHECK: [[RESULT_REG:r[:0-9]+]] = not([[AND_RESULT_REG]])
45; CHECK: memd_locked([[SECOND_ADDR]],[[LOCK_PRED_REG:p[0-9]+]]) = [[RESULT_REG]]
46
47; CHECK: if (![[LOCK_PRED_REG]]) jump{{.*}}[[FAIL_LABEL]]
48; CHECK-DAG: memd(gp+#g5) = [[LOCKED_READ_REG]]
49; CHECK-DAG: jumpr r31
50define void @f1() {
51b0:
52  %v0 = load i64, i64* @g3, align 8
53  %v1 = atomicrmw nand i64* @g4, i64 %v0 ORDER
54  store i64 %v1, i64* @g5, align 8
55  ret void
56}
57