1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s 3 4--- | 5 define dso_local arm_aapcscc void @test1(i32* nocapture %arg, i32* nocapture readonly %arg1, i32* nocapture readonly %arg2, i32 %arg3) { 6 bb: 7 %tmp = icmp eq i32 %arg3, 0 8 br i1 %tmp, label %bb27, label %bb4 9 10 bb4: ; preds = %bb 11 %tmp5 = add i32 %arg3, -1 12 %tmp6 = and i32 %arg3, 3 13 %tmp7 = icmp ult i32 %tmp5, 3 14 %tmp8 = add i32 %arg3, -4 15 %tmp9 = sub i32 %tmp8, %tmp6 16 %tmp10 = lshr i32 %tmp9, 2 17 %tmp11 = add nuw nsw i32 %tmp10, 1 18 br i1 %tmp7, label %bb13, label %bb12 19 20 bb12: ; preds = %bb4 21 %start = call i32 @llvm.start.loop.iterations.i32(i32 %tmp11) 22 br label %bb28 23 24 bb13: ; preds = %bb28, %bb4 25 %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ] 26 %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ] 27 %tmp15 = icmp eq i32 %tmp6, 0 28 br i1 %tmp15, label %bb27, label %bb16 29 30 bb16: ; preds = %bb13 31 %tmp17 = getelementptr inbounds i32, i32* %arg1, i32 %tmp14 32 %tmp18 = load i32, i32* %tmp17, align 4 33 %tmp19 = getelementptr inbounds i32, i32* %arg2, i32 %tmp14 34 %tmp20 = load i32, i32* %tmp19, align 4 35 %tmp21 = xor i32 %tmp20, %tmp18 36 %tmp22 = getelementptr inbounds i32, i32* %arg, i32 %tmp14 37 %tmp23 = load i32, i32* %tmp22, align 4 38 %tmp24 = add nsw i32 %tmp23, %tmp21 39 store i32 %tmp24, i32* %tmp22, align 4 40 %tmp25 = add nuw i32 %tmp14, 1 41 %tmp26 = icmp eq i32 %tmp6, 1 42 br i1 %tmp26, label %bb27, label %bb57 43 44 bb27: ; preds = %bb68, %bb57, %bb16, %bb13, %bb 45 ret void 46 47 bb28: ; preds = %bb28, %bb12 48 %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %start, %bb12 ] 49 %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ] 50 %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ] 51 %0 = bitcast i32* %arg1 to i8* 52 %1 = bitcast i32* %arg2 to i8* 53 %2 = bitcast i32* %arg to i8* 54 %uglygep14 = getelementptr i8, i8* %0, i32 %lsr.iv 55 %uglygep1415 = bitcast i8* %uglygep14 to i32* 56 %scevgep617 = bitcast i32* %uglygep1415 to i32* 57 %tmp34 = load i32, i32* %scevgep617, align 4 58 %uglygep8 = getelementptr i8, i8* %1, i32 %lsr.iv 59 %uglygep89 = bitcast i8* %uglygep8 to i32* 60 %scevgep418 = bitcast i32* %uglygep89 to i32* 61 %tmp35 = load i32, i32* %scevgep418, align 4 62 %tmp36 = xor i32 %tmp35, %tmp34 63 %uglygep2 = getelementptr i8, i8* %2, i32 %lsr.iv 64 %uglygep23 = bitcast i8* %uglygep2 to i32* 65 %scevgep219 = bitcast i32* %uglygep23 to i32* 66 %tmp37 = load i32, i32* %scevgep219, align 4 67 %tmp38 = add nsw i32 %tmp37, %tmp36 68 store i32 %tmp38, i32* %scevgep219, align 4 69 %uglygep33 = getelementptr i8, i8* %0, i32 %lsr.iv 70 %uglygep3334 = bitcast i8* %uglygep33 to i32* 71 %scevgep14 = getelementptr i32, i32* %uglygep3334, i32 1 72 %tmp39 = load i32, i32* %scevgep14, align 4 73 %uglygep27 = getelementptr i8, i8* %1, i32 %lsr.iv 74 %uglygep2728 = bitcast i8* %uglygep27 to i32* 75 %scevgep11 = getelementptr i32, i32* %uglygep2728, i32 1 76 %tmp40 = load i32, i32* %scevgep11, align 4 77 %tmp41 = xor i32 %tmp40, %tmp39 78 %uglygep20 = getelementptr i8, i8* %2, i32 %lsr.iv 79 %uglygep2021 = bitcast i8* %uglygep20 to i32* 80 %scevgep9 = getelementptr i32, i32* %uglygep2021, i32 1 81 %tmp42 = load i32, i32* %scevgep9, align 4 82 %tmp43 = add nsw i32 %tmp42, %tmp41 83 store i32 %tmp43, i32* %scevgep9, align 4 84 %uglygep30 = getelementptr i8, i8* %0, i32 %lsr.iv 85 %uglygep3031 = bitcast i8* %uglygep30 to i32* 86 %scevgep12 = getelementptr i32, i32* %uglygep3031, i32 2 87 %tmp44 = load i32, i32* %scevgep12, align 4 88 %uglygep24 = getelementptr i8, i8* %1, i32 %lsr.iv 89 %uglygep2425 = bitcast i8* %uglygep24 to i32* 90 %scevgep10 = getelementptr i32, i32* %uglygep2425, i32 2 91 %tmp45 = load i32, i32* %scevgep10, align 4 92 %tmp46 = xor i32 %tmp45, %tmp44 93 %uglygep17 = getelementptr i8, i8* %2, i32 %lsr.iv 94 %uglygep1718 = bitcast i8* %uglygep17 to i32* 95 %scevgep8 = getelementptr i32, i32* %uglygep1718, i32 2 96 %tmp47 = load i32, i32* %scevgep8, align 4 97 %tmp48 = add nsw i32 %tmp47, %tmp46 98 store i32 %tmp48, i32* %scevgep8, align 4 99 %uglygep11 = getelementptr i8, i8* %0, i32 %lsr.iv 100 %uglygep1112 = bitcast i8* %uglygep11 to i32* 101 %scevgep5 = getelementptr i32, i32* %uglygep1112, i32 3 102 %tmp49 = load i32, i32* %scevgep5, align 4 103 %uglygep5 = getelementptr i8, i8* %1, i32 %lsr.iv 104 %uglygep56 = bitcast i8* %uglygep5 to i32* 105 %scevgep3 = getelementptr i32, i32* %uglygep56, i32 3 106 %tmp50 = load i32, i32* %scevgep3, align 4 107 %tmp51 = xor i32 %tmp50, %tmp49 108 %uglygep = getelementptr i8, i8* %2, i32 %lsr.iv 109 %uglygep1 = bitcast i8* %uglygep to i32* 110 %scevgep1 = getelementptr i32, i32* %uglygep1, i32 3 111 %tmp52 = load i32, i32* %scevgep1, align 4 112 %tmp53 = add nsw i32 %tmp52, %tmp51 113 store i32 %tmp53, i32* %scevgep1, align 4 114 %tmp54 = add nuw i32 %tmp29, 4 115 %lsr.iv.next = add i32 %lsr.iv, 16 116 %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1) 117 %tmp56 = icmp ne i32 %loop.dec, 0 118 %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1 119 br i1 %tmp56, label %bb28, label %bb13 120 121 bb57: ; preds = %bb16 122 %tmp58 = getelementptr inbounds i32, i32* %arg1, i32 %tmp25 123 %tmp59 = load i32, i32* %tmp58, align 4 124 %tmp60 = getelementptr inbounds i32, i32* %arg2, i32 %tmp25 125 %tmp61 = load i32, i32* %tmp60, align 4 126 %tmp62 = xor i32 %tmp61, %tmp59 127 %tmp63 = getelementptr inbounds i32, i32* %arg, i32 %tmp25 128 %tmp64 = load i32, i32* %tmp63, align 4 129 %tmp65 = add nsw i32 %tmp64, %tmp62 130 store i32 %tmp65, i32* %tmp63, align 4 131 %tmp66 = add nuw i32 %tmp14, 2 132 %tmp67 = icmp eq i32 %tmp6, 2 133 br i1 %tmp67, label %bb27, label %bb68 134 135 bb68: ; preds = %bb57 136 %tmp69 = getelementptr inbounds i32, i32* %arg1, i32 %tmp66 137 %tmp70 = load i32, i32* %tmp69, align 4 138 %tmp71 = getelementptr inbounds i32, i32* %arg2, i32 %tmp66 139 %tmp72 = load i32, i32* %tmp71, align 4 140 %tmp73 = xor i32 %tmp72, %tmp70 141 %tmp74 = getelementptr inbounds i32, i32* %arg, i32 %tmp66 142 %tmp75 = load i32, i32* %tmp74, align 4 143 %tmp76 = add nsw i32 %tmp75, %tmp73 144 store i32 %tmp76, i32* %tmp74, align 4 145 br label %bb27 146 } 147 148 declare i32 @llvm.start.loop.iterations.i32(i32) 149 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) 150 151... 152--- 153name: test1 154alignment: 2 155exposesReturnsTwice: false 156legalized: false 157regBankSelected: false 158selected: false 159failedISel: false 160tracksRegLiveness: true 161hasWinCFI: false 162registers: [] 163liveins: 164 - { reg: '$r0', virtual-reg: '' } 165 - { reg: '$r1', virtual-reg: '' } 166 - { reg: '$r2', virtual-reg: '' } 167 - { reg: '$r3', virtual-reg: '' } 168frameInfo: 169 isFrameAddressTaken: false 170 isReturnAddressTaken: false 171 hasStackMap: false 172 hasPatchPoint: false 173 stackSize: 40 174 offsetAdjustment: 0 175 maxAlignment: 4 176 adjustsStack: false 177 hasCalls: false 178 stackProtector: '' 179 maxCallFrameSize: 0 180 cvBytesOfCalleeSavedRegisters: 0 181 hasOpaqueSPAdjustment: false 182 hasVAStart: false 183 hasMustTailInVarArgFunc: false 184 localFrameSize: 0 185 savePoint: '' 186 restorePoint: '' 187fixedStack: [] 188stack: 189 - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4, 190 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 191 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 192 - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 193 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 194 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 195 - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 196 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true, 197 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 198 - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 199 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 200 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 201 - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 202 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 203 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 204 - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 205 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 206 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 207 - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 208 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 209 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 210 - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 211 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 212 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 213 - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 214 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 215 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 216 - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4, 217 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 218 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 219callSites: [] 220constants: [] 221machineFunctionInfo: {} 222body: | 223 ; CHECK-LABEL: name: test1 224 ; CHECK: bb.0.bb: 225 ; CHECK: successors: %bb.8(0x30000000), %bb.1(0x50000000) 226 ; CHECK: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11 227 ; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 228 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 36 229 ; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4 230 ; CHECK: frame-setup CFI_INSTRUCTION offset $r11, -8 231 ; CHECK: frame-setup CFI_INSTRUCTION offset $r10, -12 232 ; CHECK: frame-setup CFI_INSTRUCTION offset $r9, -16 233 ; CHECK: frame-setup CFI_INSTRUCTION offset $r8, -20 234 ; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -24 235 ; CHECK: frame-setup CFI_INSTRUCTION offset $r6, -28 236 ; CHECK: frame-setup CFI_INSTRUCTION offset $r5, -32 237 ; CHECK: frame-setup CFI_INSTRUCTION offset $r4, -36 238 ; CHECK: $sp = frame-setup tSUBspi $sp, 1, 14 /* CC::al */, $noreg 239 ; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 40 240 ; CHECK: tCMPi8 renamable $r3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 241 ; CHECK: tBcc %bb.8, 0 /* CC::eq */, killed $cpsr 242 ; CHECK: bb.1.bb4: 243 ; CHECK: successors: %bb.2(0x40000000), %bb.3(0x40000000) 244 ; CHECK: liveins: $r0, $r1, $r2, $r3 245 ; CHECK: renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 246 ; CHECK: renamable $r7 = t2ANDri renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 247 ; CHECK: tCMPi8 killed renamable $r4, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 248 ; CHECK: tSTRspi killed renamable $r7, $sp, 0, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0) 249 ; CHECK: tBcc %bb.3, 2 /* CC::hs */, killed $cpsr 250 ; CHECK: bb.2: 251 ; CHECK: successors: %bb.5(0x80000000) 252 ; CHECK: liveins: $r0, $r1, $r2 253 ; CHECK: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 254 ; CHECK: tB %bb.5, 14 /* CC::al */, $noreg 255 ; CHECK: bb.3.bb12: 256 ; CHECK: successors: %bb.4(0x80000000) 257 ; CHECK: liveins: $r0, $r1, $r2, $r3 258 ; CHECK: renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 259 ; CHECK: renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg 260 ; CHECK: renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 261 ; CHECK: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 262 ; CHECK: renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg 263 ; CHECK: dead $lr = tMOVr renamable $r3, 14 /* CC::al */, $noreg 264 ; CHECK: $r12 = tMOVr killed $r3, 14 /* CC::al */, $noreg 265 ; CHECK: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 266 ; CHECK: bb.4.bb28: 267 ; CHECK: successors: %bb.4(0x7c000000), %bb.5(0x04000000) 268 ; CHECK: liveins: $r0, $r1, $r2, $r3, $r8, $r12 269 ; CHECK: renamable $r5 = tLDRr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep617) 270 ; CHECK: renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg 271 ; CHECK: renamable $r6 = tLDRr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep418) 272 ; CHECK: $lr = tMOVr killed $r12, 14 /* CC::al */, $noreg 273 ; CHECK: renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14 /* CC::al */, $noreg, $noreg 274 ; CHECK: renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 275 ; CHECK: renamable $r6 = tLDRr renamable $r0, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep219) 276 ; CHECK: renamable $lr = t2SUBri killed renamable $lr, 1, 14 /* CC::al */, $noreg, $noreg 277 ; CHECK: $r12 = tMOVr $lr, 14 /* CC::al */, $noreg 278 ; CHECK: renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 279 ; CHECK: tSTRr killed renamable $r5, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep219) 280 ; CHECK: renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg 281 ; CHECK: renamable $r4 = tLDRi renamable $r7, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep11) 282 ; CHECK: renamable $r6 = tLDRi renamable $r5, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep14) 283 ; CHECK: renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 284 ; CHECK: renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg 285 ; CHECK: $r11 = t2ADDri $r6, 4, 14 /* CC::al */, $noreg, $noreg 286 ; CHECK: renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg 287 ; CHECK: t2LDMIA killed $r11, 14 /* CC::al */, $noreg, def $r4, def $r10, def $r11 :: (load (s32) from %ir.scevgep9), (load (s32) from %ir.scevgep8), (load (s32) from %ir.scevgep1) 288 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg 289 ; CHECK: tSTRi killed renamable $r4, renamable $r6, 1, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep9) 290 ; CHECK: renamable $r9 = t2LDRi12 renamable $r5, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep12) 291 ; CHECK: renamable $r4 = tLDRi renamable $r7, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep10) 292 ; CHECK: renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg, $noreg 293 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14 /* CC::al */, $noreg 294 ; CHECK: tSTRi killed renamable $r4, renamable $r6, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep8) 295 ; CHECK: renamable $r4 = tLDRi killed renamable $r5, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep5) 296 ; CHECK: renamable $r5 = tLDRi killed renamable $r7, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep3) 297 ; CHECK: renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14 /* CC::al */, $noreg 298 ; CHECK: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14 /* CC::al */, $noreg 299 ; CHECK: tSTRi killed renamable $r4, killed renamable $r6, 3, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep1) 300 ; CHECK: t2CMPri killed renamable $lr, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 301 ; CHECK: tBcc %bb.4, 1 /* CC::ne */, killed $cpsr 302 ; CHECK: tB %bb.5, 14 /* CC::al */, $noreg 303 ; CHECK: bb.5.bb13: 304 ; CHECK: successors: %bb.8(0x30000000), %bb.6(0x50000000) 305 ; CHECK: liveins: $r0, $r1, $r2, $r8 306 ; CHECK: renamable $r5 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0) 307 ; CHECK: tCBZ $r5, %bb.8 308 ; CHECK: bb.6.bb16: 309 ; CHECK: successors: %bb.8(0x40000000), %bb.7(0x40000000) 310 ; CHECK: liveins: $r0, $r1, $r2, $r5, $r8 311 ; CHECK: renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp17) 312 ; CHECK: tCMPi8 renamable $r5, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 313 ; CHECK: renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp19) 314 ; CHECK: renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14 /* CC::al */, $noreg, $noreg 315 ; CHECK: renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp22) 316 ; CHECK: renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14 /* CC::al */, $noreg 317 ; CHECK: t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp22) 318 ; CHECK: tBcc %bb.8, 0 /* CC::eq */, killed $cpsr 319 ; CHECK: bb.7.bb57: 320 ; CHECK: successors: %bb.8(0x40000000), %bb.9(0x40000000) 321 ; CHECK: liveins: $r0, $r1, $r2, $r5, $r8 322 ; CHECK: renamable $r3 = nuw t2ADDri renamable $r8, 1, 14 /* CC::al */, $noreg, $noreg 323 ; CHECK: tCMPi8 killed renamable $r5, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 324 ; CHECK: renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp58) 325 ; CHECK: renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp60) 326 ; CHECK: renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 327 ; CHECK: renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp63) 328 ; CHECK: renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg 329 ; CHECK: t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp63) 330 ; CHECK: tBcc %bb.9, 1 /* CC::ne */, killed $cpsr 331 ; CHECK: bb.8.bb27: 332 ; CHECK: $sp = tADDspi $sp, 1, 14 /* CC::al */, $noreg 333 ; CHECK: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 334 ; CHECK: bb.9.bb68: 335 ; CHECK: liveins: $r0, $r1, $r2, $r8 336 ; CHECK: renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14 /* CC::al */, $noreg, $noreg 337 ; CHECK: renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp69) 338 ; CHECK: renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp71) 339 ; CHECK: renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 340 ; CHECK: renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp74) 341 ; CHECK: renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 342 ; CHECK: t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp74) 343 ; CHECK: $sp = tADDspi $sp, 1, 14 /* CC::al */, $noreg 344 ; CHECK: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 345 bb.0.bb: 346 successors: %bb.8(0x30000000), %bb.1(0x50000000) 347 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr 348 349 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 350 frame-setup CFI_INSTRUCTION def_cfa_offset 36 351 frame-setup CFI_INSTRUCTION offset $lr, -4 352 frame-setup CFI_INSTRUCTION offset $r11, -8 353 frame-setup CFI_INSTRUCTION offset $r10, -12 354 frame-setup CFI_INSTRUCTION offset $r9, -16 355 frame-setup CFI_INSTRUCTION offset $r8, -20 356 frame-setup CFI_INSTRUCTION offset $r7, -24 357 frame-setup CFI_INSTRUCTION offset $r6, -28 358 frame-setup CFI_INSTRUCTION offset $r5, -32 359 frame-setup CFI_INSTRUCTION offset $r4, -36 360 $sp = frame-setup tSUBspi $sp, 1, 14, $noreg 361 frame-setup CFI_INSTRUCTION def_cfa_offset 40 362 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 363 tBcc %bb.8, 0, killed $cpsr 364 365 bb.1.bb4: 366 successors: %bb.2(0x40000000), %bb.3(0x40000000) 367 liveins: $r0, $r1, $r2, $r3 368 369 renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 370 renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg 371 tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr 372 tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store (s32) into %stack.0) 373 tBcc %bb.3, 2, killed $cpsr 374 375 bb.2: 376 successors: %bb.5(0x80000000) 377 liveins: $r0, $r1, $r2 378 379 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 380 tB %bb.5, 14, $noreg 381 382 bb.3.bb12: 383 successors: %bb.4(0x80000000) 384 liveins: $r0, $r1, $r2, $r3 385 386 renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg 387 renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg 388 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 389 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 390 renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg 391 $lr = t2DoLoopStart renamable $r3 392 $r12 = tMOVr killed $r3, 14, $noreg 393 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 394 395 bb.4.bb28: 396 successors: %bb.4(0x7c000000), %bb.5(0x04000000) 397 liveins: $r0, $r1, $r2, $r3, $r8, $r12 398 399 renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load (s32) from %ir.scevgep617) 400 renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg 401 renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load (s32) from %ir.scevgep418) 402 $lr = tMOVr $r12, 14, $noreg 403 renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg 404 renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg 405 renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load (s32) from %ir.scevgep219) 406 renamable $lr = t2LoopDec killed renamable $lr, 1 407 $r12 = tMOVr $lr, 14, $noreg 408 renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg 409 tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store (s32) into %ir.scevgep219) 410 renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg 411 renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load (s32) from %ir.scevgep11) 412 renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load (s32) from %ir.scevgep14) 413 renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg 414 renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg 415 $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg 416 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg 417 t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load (s32) from %ir.scevgep9), (load (s32) from %ir.scevgep8), (load (s32) from %ir.scevgep1) 418 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg 419 tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store (s32) into %ir.scevgep9) 420 renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load (s32) from %ir.scevgep12) 421 renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load (s32) from %ir.scevgep10) 422 renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg 423 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg 424 tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store (s32) into %ir.scevgep8) 425 renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load (s32) from %ir.scevgep5) 426 renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load (s32) from %ir.scevgep3) 427 renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg 428 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg 429 tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store (s32) into %ir.scevgep1) 430 t2LoopEnd killed renamable $lr, %bb.4, implicit-def dead $cpsr 431 tB %bb.5, 14, $noreg 432 433 bb.5.bb13: 434 successors: %bb.8(0x30000000), %bb.6(0x50000000) 435 liveins: $r0, $r1, $r2, $r8 436 437 renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load (s32) from %stack.0) 438 tCBZ $r5, %bb.8 439 440 bb.6.bb16: 441 successors: %bb.8(0x40000000), %bb.7(0x40000000) 442 liveins: $r0, $r1, $r2, $r5, $r8 443 444 renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp17) 445 tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr 446 renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp19) 447 renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg 448 renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp22) 449 renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg 450 t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store (s32) into %ir.tmp22) 451 tBcc %bb.8, 0, killed $cpsr 452 453 bb.7.bb57: 454 successors: %bb.8(0x40000000), %bb.9(0x40000000) 455 liveins: $r0, $r1, $r2, $r5, $r8 456 457 renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg 458 tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr 459 renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp58) 460 renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp60) 461 renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg 462 renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp63) 463 renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg 464 t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store (s32) into %ir.tmp63) 465 tBcc %bb.9, 1, killed $cpsr 466 467 bb.8.bb27: 468 $sp = tADDspi $sp, 1, 14, $noreg 469 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 470 471 bb.9.bb68: 472 liveins: $r0, $r1, $r2, $r8 473 474 renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg 475 renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp69) 476 renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp71) 477 renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg 478 renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp74) 479 renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg 480 t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store (s32) into %ir.tmp74) 481 $sp = tADDspi $sp, 1, 14, $noreg 482 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 483 484... 485