1; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each 2; pass. Ignore it with 'grep -v'. 3; RUN: llc -mtriple=x86_64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 \ 4; RUN: | grep -v 'Verify generated machine code' | FileCheck %s 5 6; REQUIRES: asserts 7 8; CHECK-LABEL: Pass Arguments: 9; CHECK-NEXT: Target Library Information 10; CHECK-NEXT: Target Pass Configuration 11; CHECK-NEXT: Machine Module Information 12; CHECK-NEXT: Target Transform Information 13; CHECK-NEXT: Create Garbage Collector Module Metadata 14; CHECK-NEXT: Assumption Cache Tracker 15; CHECK-NEXT: Profile summary info 16; CHECK-NEXT: Machine Branch Probability Analysis 17; CHECK-NEXT: ModulePass Manager 18; CHECK-NEXT: Pre-ISel Intrinsic Lowering 19; CHECK-NEXT: FunctionPass Manager 20; CHECK-NEXT: Expand Atomic instructions 21; CHECK-NEXT: Lower AMX intrinsics 22; CHECK-NEXT: Lower AMX type for load/store 23; CHECK-NEXT: Pre AMX Tile Config 24; CHECK-NEXT: Module Verifier 25; CHECK-NEXT: Lower Garbage Collection Instructions 26; CHECK-NEXT: Shadow Stack GC Lowering 27; CHECK-NEXT: Lower constant intrinsics 28; CHECK-NEXT: Remove unreachable blocks from the CFG 29; CHECK-NEXT: Expand vector predication intrinsics 30; CHECK-NEXT: Scalarize Masked Memory Intrinsics 31; CHECK-NEXT: Expand reduction intrinsics 32; CHECK-NEXT: Expand indirectbr instructions 33; CHECK-NEXT: Exception handling preparation 34; CHECK-NEXT: Safe Stack instrumentation pass 35; CHECK-NEXT: Insert stack protectors 36; CHECK-NEXT: Module Verifier 37; CHECK-NEXT: X86 DAG->DAG Instruction Selection 38; CHECK-NEXT: X86 PIC Global Base Reg Initialization 39; CHECK-NEXT: Finalize ISel and expand pseudo-instructions 40; CHECK-NEXT: Local Stack Slot Allocation 41; CHECK-NEXT: X86 speculative load hardening 42; CHECK-NEXT: MachineDominator Tree Construction 43; CHECK-NEXT: X86 EFLAGS copy lowering 44; CHECK-NEXT: X86 WinAlloca Expander 45; CHECK-NEXT: Eliminate PHI nodes for register allocation 46; CHECK-NEXT: Two-Address instruction pass 47; CHECK-NEXT: Fast Register Allocator 48; CHECK-NEXT: Fast Tile Register Configure 49; CHECK-NEXT: X86 Lower Tile Copy 50; CHECK-NEXT: Bundle Machine CFG Edges 51; CHECK-NEXT: X86 FP Stackifier 52; CHECK-NEXT: Remove Redundant DEBUG_VALUE analysis 53; CHECK-NEXT: Fixup Statepoint Caller Saved 54; CHECK-NEXT: Lazy Machine Block Frequency Analysis 55; CHECK-NEXT: Machine Optimization Remark Emitter 56; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization 57; CHECK-NEXT: Post-RA pseudo instruction expansion pass 58; CHECK-NEXT: X86 pseudo instruction expansion pass 59; CHECK-NEXT: Analyze Machine Code For Garbage Collection 60; CHECK-NEXT: Insert fentry calls 61; CHECK-NEXT: Insert XRay ops 62; CHECK-NEXT: Implement the 'patchable-function' attribute 63; CHECK-NEXT: X86 Indirect Branch Tracking 64; CHECK-NEXT: X86 vzeroupper inserter 65; CHECK-NEXT: Compressing EVEX instrs to VEX encoding when possibl 66; CHECK-NEXT: X86 Discriminate Memory Operands 67; CHECK-NEXT: X86 Insert Cache Prefetches 68; CHECK-NEXT: X86 insert wait instruction 69; CHECK-NEXT: Contiguously Lay Out Funclets 70; CHECK-NEXT: StackMap Liveness Analysis 71; CHECK-NEXT: Live DEBUG_VALUE analysis 72; CHECK-NEXT: X86 Speculative Execution Side Effect Suppression 73; CHECK-NEXT: X86 Indirect Thunks 74; CHECK-NEXT: Check CFA info and insert CFI instructions if needed 75; CHECK-NEXT: X86 Load Value Injection (LVI) Ret-Hardening 76; CHECK-NEXT: Lazy Machine Block Frequency Analysis 77; CHECK-NEXT: Machine Optimization Remark Emitter 78; CHECK-NEXT: X86 Assembly Printer 79; CHECK-NEXT: Free MachineFunction 80 81define void @f() { 82 ret void 83} 84