1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
4
5declare <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float>, <16 x float>) #3
6
7define <8 x i64> @test_mm512_cvtne2ps2bf16_512(<16 x float> %A, <16 x float> %B) local_unnamed_addr #2 {
8; CHECK-LABEL: test_mm512_cvtne2ps2bf16_512:
9; CHECK:       # %bb.0: # %entry
10; CHECK-NEXT:    vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7f,0x48,0x72,0xc1]
11; CHECK-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
12entry:
13  %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
14  %1 = bitcast <32 x i16> %0 to <8 x i64>
15  ret <8 x i64> %1
16}
17
18define <8 x i64> @test_mm512_maskz_cvtne2ps2bf16_512(<16 x float> %A, <16 x float> %B, i32 %U) local_unnamed_addr #2 {
19; X86-LABEL: test_mm512_maskz_cvtne2ps2bf16_512:
20; X86:       # %bb.0: # %entry
21; X86-NEXT:    kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
22; X86-NEXT:    vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x72,0xc1]
23; X86-NEXT:    retl # encoding: [0xc3]
24;
25; X64-LABEL: test_mm512_maskz_cvtne2ps2bf16_512:
26; X64:       # %bb.0: # %entry
27; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
28; X64-NEXT:    vcvtne2ps2bf16 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x72,0xc1]
29; X64-NEXT:    retq # encoding: [0xc3]
30entry:
31  %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
32  %1 = bitcast i32 %U to <32 x i1>
33  %2 = select <32 x i1> %1, <32 x i16> %0, <32 x i16> zeroinitializer
34  %3 = bitcast <32 x i16> %2 to <8 x i64>
35  ret <8 x i64> %3
36}
37
38define <8 x i64> @test_mm512_mask_cvtne2ps2bf16_512(<8 x i64> %C, i32 %U, <16 x float> %A, <16 x float> %B) local_unnamed_addr #2 {
39; X86-LABEL: test_mm512_mask_cvtne2ps2bf16_512:
40; X86:       # %bb.0: # %entry
41; X86-NEXT:    kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
42; X86-NEXT:    vcvtne2ps2bf16 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x72,0xc2]
43; X86-NEXT:    retl # encoding: [0xc3]
44;
45; X64-LABEL: test_mm512_mask_cvtne2ps2bf16_512:
46; X64:       # %bb.0: # %entry
47; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
48; X64-NEXT:    vcvtne2ps2bf16 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x72,0xc2]
49; X64-NEXT:    retq # encoding: [0xc3]
50entry:
51  %0 = tail call <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float> %A, <16 x float> %B) #4
52  %1 = bitcast <8 x i64> %C to <32 x i16>
53  %2 = bitcast i32 %U to <32 x i1>
54  %3 = select <32 x i1> %2, <32 x i16> %0, <32 x i16> %1
55  %4 = bitcast <32 x i16> %3 to <8 x i64>
56  ret <8 x i64> %4
57}
58
59declare <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float>) #3
60
61define <4 x i64> @test_mm512_cvtneps2bf16_512(<16 x float> %A) local_unnamed_addr #2 {
62; CHECK-LABEL: test_mm512_cvtneps2bf16_512:
63; CHECK:       # %bb.0: # %entry
64; CHECK-NEXT:    vcvtneps2bf16 %zmm0, %ymm0 # encoding: [0x62,0xf2,0x7e,0x48,0x72,0xc0]
65; CHECK-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
66entry:
67  %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
68  %1 = bitcast <16 x i16> %0 to <4 x i64>
69  ret <4 x i64> %1
70}
71
72define <4 x i64> @test_mm512_maskz_cvtneps2bf16_512(<16 x float> %A, i16 %U) local_unnamed_addr #2 {
73; X86-LABEL: test_mm512_maskz_cvtneps2bf16_512:
74; X86:       # %bb.0: # %entry
75; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
76; X86-NEXT:    vcvtneps2bf16 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x72,0xc0]
77; X86-NEXT:    retl # encoding: [0xc3]
78;
79; X64-LABEL: test_mm512_maskz_cvtneps2bf16_512:
80; X64:       # %bb.0: # %entry
81; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
82; X64-NEXT:    vcvtneps2bf16 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x72,0xc0]
83; X64-NEXT:    retq # encoding: [0xc3]
84entry:
85  %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
86  %1 = bitcast i16 %U to <16 x i1>
87  %2 = select <16 x i1> %1, <16 x i16> %0, <16 x i16> zeroinitializer
88  %3 = bitcast <16 x i16> %2 to <4 x i64>
89  ret <4 x i64> %3
90}
91
92define <4 x i64> @test_mm512_mask_cvtneps2bf16_512(<4 x i64> %C, i16 %U, <16 x float> %A) local_unnamed_addr #2 {
93; X86-LABEL: test_mm512_mask_cvtneps2bf16_512:
94; X86:       # %bb.0: # %entry
95; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
96; X86-NEXT:    vcvtneps2bf16 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x72,0xc1]
97; X86-NEXT:    retl # encoding: [0xc3]
98;
99; X64-LABEL: test_mm512_mask_cvtneps2bf16_512:
100; X64:       # %bb.0: # %entry
101; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
102; X64-NEXT:    vcvtneps2bf16 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x72,0xc1]
103; X64-NEXT:    retq # encoding: [0xc3]
104entry:
105  %0 = tail call <16 x i16> @llvm.x86.avx512bf16.cvtneps2bf16.512(<16 x float> %A) #4
106  %1 = bitcast <4 x i64> %C to <16 x i16>
107  %2 = bitcast i16 %U to <16 x i1>
108  %3 = select <16 x i1> %2, <16 x i16> %0, <16 x i16> %1
109  %4 = bitcast <16 x i16> %3 to <4 x i64>
110  ret <4 x i64> %4
111}
112
113declare <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float>, <16 x i32>, <16 x i32>) #3
114
115define <16 x float> @test_mm512_dpbf16ps_512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) local_unnamed_addr #2 {
116; CHECK-LABEL: test_mm512_dpbf16ps_512:
117; CHECK:       # %bb.0: # %entry
118; CHECK-NEXT:    vdpbf16ps %zmm2, %zmm1, %zmm0 # encoding: [0x62,0xf2,0x76,0x48,0x52,0xc2]
119; CHECK-NEXT:    ret{{[l|q]}} # encoding: [0xc3]
120entry:
121  %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
122  ret <16 x float> %0
123}
124
125define <16 x float> @test_mm512_maskz_dpbf16ps_512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B, i16 zeroext %U) local_unnamed_addr #2 {
126; X86-LABEL: test_mm512_maskz_dpbf16ps_512:
127; X86:       # %bb.0: # %entry
128; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
129; X86-NEXT:    vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xc9,0x52,0xc2]
130; X86-NEXT:    retl # encoding: [0xc3]
131;
132; X64-LABEL: test_mm512_maskz_dpbf16ps_512:
133; X64:       # %bb.0: # %entry
134; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
135; X64-NEXT:    vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x76,0xc9,0x52,0xc2]
136; X64-NEXT:    retq # encoding: [0xc3]
137entry:
138  %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
139  %1 = bitcast i16 %U to <16 x i1>
140  %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> zeroinitializer
141  ret <16 x float> %2
142}
143define <16 x float> @test_mm512_mask_dpbf16ps_512(i16 zeroext %U, <16 x float> %E, <16 x i32> %A, <16 x i32> %B) local_unnamed_addr #2 {
144; X86-LABEL: test_mm512_mask_dpbf16ps_512:
145; X86:       # %bb.0: # %entry
146; X86-NEXT:    kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
147; X86-NEXT:    vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x49,0x52,0xc2]
148; X86-NEXT:    retl # encoding: [0xc3]
149;
150; X64-LABEL: test_mm512_mask_dpbf16ps_512:
151; X64:       # %bb.0: # %entry
152; X64-NEXT:    kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
153; X64-NEXT:    vdpbf16ps %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x76,0x49,0x52,0xc2]
154; X64-NEXT:    retq # encoding: [0xc3]
155entry:
156  %0 = tail call <16 x float> @llvm.x86.avx512bf16.dpbf16ps.512(<16 x float> %E, <16 x i32> %A, <16 x i32> %B) #4
157  %1 = bitcast i16 %U to <16 x i1>
158  %2 = select <16 x i1> %1, <16 x float> %0, <16 x float> %E
159  ret <16 x float> %2
160}
161