1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -run-pass x86-domain-reassignment -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq -o - %s | FileCheck %s 3--- | 4 ; ModuleID = '../test/CodeGen/X86/gpr-to-mask.ll' 5 source_filename = "../test/CodeGen/X86/gpr-to-mask.ll" 6 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 7 target triple = "x86_64-unknown-unknown" 8 9 define void @test_fcmp_storefloat(i1 %cond, float* %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) #0 { 10 entry: 11 br i1 %cond, label %if, label %else 12 13 if: ; preds = %entry 14 %cmp1 = fcmp oeq float %f3, %f4 15 br label %exit 16 17 else: ; preds = %entry 18 %cmp2 = fcmp oeq float %f5, %f6 19 br label %exit 20 21 exit: ; preds = %else, %if 22 %val = phi i1 [ %cmp1, %if ], [ %cmp2, %else ] 23 %selected = select i1 %val, float %f1, float %f2 24 store float %selected, float* %fptr 25 ret void 26 } 27 28 define void @test_8bitops() #0 { 29 ret void 30 } 31 define void @test_16bitops() #0 { 32 ret void 33 } 34 define void @test_32bitops() #0 { 35 ret void 36 } 37 define void @test_64bitops() #0 { 38 ret void 39 } 40 define void @test_16bitext() #0 { 41 ret void 42 } 43 define void @test_32bitext() #0 { 44 ret void 45 } 46 define void @test_64bitext() #0 { 47 ret void 48 } 49... 50--- 51name: test_fcmp_storefloat 52alignment: 16 53exposesReturnsTwice: false 54legalized: false 55regBankSelected: false 56selected: false 57tracksRegLiveness: true 58registers: 59 - { id: 0, class: gr8, preferred-register: '' } 60 - { id: 1, class: gr8, preferred-register: '' } 61 - { id: 2, class: gr8, preferred-register: '' } 62 - { id: 3, class: gr32, preferred-register: '' } 63 - { id: 4, class: gr64, preferred-register: '' } 64 - { id: 5, class: vr128x, preferred-register: '' } 65 - { id: 6, class: fr32x, preferred-register: '' } 66 - { id: 7, class: fr32x, preferred-register: '' } 67 - { id: 8, class: fr32x, preferred-register: '' } 68 - { id: 9, class: fr32x, preferred-register: '' } 69 - { id: 10, class: fr32x, preferred-register: '' } 70 - { id: 11, class: gr8, preferred-register: '' } 71 - { id: 12, class: vk1, preferred-register: '' } 72 - { id: 13, class: gr32, preferred-register: '' } 73 - { id: 14, class: vk1, preferred-register: '' } 74 - { id: 15, class: gr32, preferred-register: '' } 75 - { id: 16, class: gr32, preferred-register: '' } 76 - { id: 17, class: gr32, preferred-register: '' } 77 - { id: 18, class: vk1wm, preferred-register: '' } 78 - { id: 19, class: vr128x, preferred-register: '' } 79 - { id: 20, class: vr128, preferred-register: '' } 80 - { id: 21, class: vr128, preferred-register: '' } 81 - { id: 22, class: fr32x, preferred-register: '' } 82liveins: 83 - { reg: '$edi', virtual-reg: '%3' } 84 - { reg: '$rsi', virtual-reg: '%4' } 85 - { reg: '$xmm0', virtual-reg: '%5' } 86 - { reg: '$xmm1', virtual-reg: '%6' } 87 - { reg: '$xmm2', virtual-reg: '%7' } 88 - { reg: '$xmm3', virtual-reg: '%8' } 89 - { reg: '$xmm4', virtual-reg: '%9' } 90 - { reg: '$xmm5', virtual-reg: '%10' } 91frameInfo: 92 isFrameAddressTaken: false 93 isReturnAddressTaken: false 94 hasStackMap: false 95 hasPatchPoint: false 96 stackSize: 0 97 offsetAdjustment: 0 98 maxAlignment: 0 99 adjustsStack: false 100 hasCalls: false 101 stackProtector: '' 102 maxCallFrameSize: 4294967295 103 hasOpaqueSPAdjustment: false 104 hasVAStart: false 105 hasMustTailInVarArgFunc: false 106 savePoint: '' 107 restorePoint: '' 108fixedStack: 109stack: 110constants: 111body: | 112 ; CHECK-LABEL: name: test_fcmp_storefloat 113 ; CHECK: bb.0.entry: 114 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 115 ; CHECK: liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5 116 ; CHECK: [[COPY:%[0-9]+]]:fr32x = COPY $xmm5 117 ; CHECK: [[COPY1:%[0-9]+]]:fr32x = COPY $xmm4 118 ; CHECK: [[COPY2:%[0-9]+]]:fr32x = COPY $xmm3 119 ; CHECK: [[COPY3:%[0-9]+]]:fr32x = COPY $xmm2 120 ; CHECK: [[COPY4:%[0-9]+]]:fr32x = COPY $xmm1 121 ; CHECK: [[COPY5:%[0-9]+]]:vr128x = COPY $xmm0 122 ; CHECK: [[COPY6:%[0-9]+]]:gr64 = COPY $rsi 123 ; CHECK: [[COPY7:%[0-9]+]]:gr32 = COPY $edi 124 ; CHECK: [[COPY8:%[0-9]+]]:gr8 = COPY [[COPY7]].sub_8bit 125 ; CHECK: TEST8ri killed [[COPY8]], 1, implicit-def $eflags 126 ; CHECK: JCC_1 %bb.2, 4, implicit $eflags 127 ; CHECK: JMP_1 %bb.1 128 ; CHECK: bb.1.if: 129 ; CHECK: successors: %bb.3(0x80000000) 130 ; CHECK: [[VCMPSSZrr:%[0-9]+]]:vk1 = VCMPSSZrr [[COPY3]], [[COPY2]], 0 131 ; CHECK: [[COPY9:%[0-9]+]]:vk32 = COPY [[VCMPSSZrr]] 132 ; CHECK: [[COPY10:%[0-9]+]]:vk8 = COPY [[COPY9]] 133 ; CHECK: JMP_1 %bb.3 134 ; CHECK: bb.2.else: 135 ; CHECK: successors: %bb.3(0x80000000) 136 ; CHECK: [[VCMPSSZrr1:%[0-9]+]]:vk1 = VCMPSSZrr [[COPY1]], [[COPY]], 0 137 ; CHECK: [[COPY11:%[0-9]+]]:vk32 = COPY [[VCMPSSZrr1]] 138 ; CHECK: [[COPY12:%[0-9]+]]:vk8 = COPY [[COPY11]] 139 ; CHECK: bb.3.exit: 140 ; CHECK: [[PHI:%[0-9]+]]:vk8 = PHI [[COPY12]], %bb.2, [[COPY10]], %bb.1 141 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF 142 ; CHECK: [[COPY13:%[0-9]+]]:vk32 = COPY [[PHI]] 143 ; CHECK: [[COPY14:%[0-9]+]]:vk1wm = COPY [[COPY13]] 144 ; CHECK: [[COPY15:%[0-9]+]]:vr128x = COPY [[COPY4]] 145 ; CHECK: [[DEF1:%[0-9]+]]:vr128 = IMPLICIT_DEF 146 ; CHECK: [[VMOVSSZrrk:%[0-9]+]]:vr128 = VMOVSSZrrk [[COPY15]], killed [[COPY14]], killed [[DEF1]], [[COPY5]] 147 ; CHECK: [[COPY16:%[0-9]+]]:fr32x = COPY [[VMOVSSZrrk]] 148 ; CHECK: VMOVSSZmr [[COPY6]], 1, $noreg, 0, $noreg, killed [[COPY16]] :: (store (s32) into %ir.fptr) 149 ; CHECK: RET 0 150 bb.0.entry: 151 successors: %bb.1(0x40000000), %bb.2(0x40000000) 152 liveins: $edi, $rsi, $xmm0, $xmm1, $xmm2, $xmm3, $xmm4, $xmm5 153 154 %10 = COPY $xmm5 155 %9 = COPY $xmm4 156 %8 = COPY $xmm3 157 %7 = COPY $xmm2 158 %6 = COPY $xmm1 159 %5 = COPY $xmm0 160 %4 = COPY $rsi 161 %3 = COPY $edi 162 %11 = COPY %3.sub_8bit 163 TEST8ri killed %11, 1, implicit-def $eflags 164 JCC_1 %bb.2, 4, implicit $eflags 165 JMP_1 %bb.1 166 167 bb.1.if: 168 successors: %bb.3(0x80000000) 169 170 %14 = VCMPSSZrr %7, %8, 0, implicit $mxcsr 171 172 ; check that cross domain copies are replaced with same domain copies. 173 174 %15 = COPY %14 175 %0 = COPY %15.sub_8bit 176 JMP_1 %bb.3 177 178 bb.2.else: 179 successors: %bb.3(0x80000000) 180 %12 = VCMPSSZrr %9, %10, 0, implicit $mxcsr 181 182 ; check that cross domain copies are replaced with same domain copies. 183 184 %13 = COPY %12 185 %1 = COPY %13.sub_8bit 186 187 bb.3.exit: 188 189 ; check PHI, IMPLICIT_DEF, and INSERT_SUBREG replacers. 190 191 %2 = PHI %1, %bb.2, %0, %bb.1 192 %17 = IMPLICIT_DEF 193 %16 = INSERT_SUBREG %17, %2, %subreg.sub_8bit_hi 194 %18 = COPY %16 195 %19 = COPY %6 196 %21 = IMPLICIT_DEF 197 %20 = VMOVSSZrrk %19, killed %18, killed %21, %5 198 %22 = COPY %20 199 VMOVSSZmr %4, 1, $noreg, 0, $noreg, killed %22 :: (store (s32) into %ir.fptr) 200 RET 0 201 202... 203--- 204name: test_8bitops 205alignment: 16 206exposesReturnsTwice: false 207legalized: false 208regBankSelected: false 209selected: false 210tracksRegLiveness: true 211registers: 212 - { id: 0, class: gr64, preferred-register: '' } 213 - { id: 1, class: vr512, preferred-register: '' } 214 - { id: 2, class: vr512, preferred-register: '' } 215 - { id: 3, class: vr512, preferred-register: '' } 216 - { id: 4, class: vr512, preferred-register: '' } 217 - { id: 5, class: vk8, preferred-register: '' } 218 - { id: 6, class: gr32, preferred-register: '' } 219 - { id: 7, class: gr8, preferred-register: '' } 220 - { id: 8, class: gr32, preferred-register: '' } 221 - { id: 9, class: gr32, preferred-register: '' } 222 - { id: 10, class: vk8wm, preferred-register: '' } 223 - { id: 11, class: vr512, preferred-register: '' } 224 - { id: 12, class: gr8, preferred-register: '' } 225 - { id: 13, class: gr8, preferred-register: '' } 226 - { id: 14, class: gr8, preferred-register: '' } 227 - { id: 15, class: gr8, preferred-register: '' } 228 - { id: 16, class: gr8, preferred-register: '' } 229 - { id: 17, class: gr8, preferred-register: '' } 230 - { id: 18, class: gr8, preferred-register: '' } 231liveins: 232 - { reg: '$rdi', virtual-reg: '%0' } 233 - { reg: '$zmm0', virtual-reg: '%1' } 234 - { reg: '$zmm1', virtual-reg: '%2' } 235 - { reg: '$zmm2', virtual-reg: '%3' } 236 - { reg: '$zmm3', virtual-reg: '%4' } 237frameInfo: 238 isFrameAddressTaken: false 239 isReturnAddressTaken: false 240 hasStackMap: false 241 hasPatchPoint: false 242 stackSize: 0 243 offsetAdjustment: 0 244 maxAlignment: 0 245 adjustsStack: false 246 hasCalls: false 247 stackProtector: '' 248 maxCallFrameSize: 4294967295 249 hasOpaqueSPAdjustment: false 250 hasVAStart: false 251 hasMustTailInVarArgFunc: false 252 savePoint: '' 253 restorePoint: '' 254fixedStack: 255stack: 256constants: 257body: | 258 ; CHECK-LABEL: name: test_8bitops 259 ; CHECK: bb.0: 260 ; CHECK: successors: %bb.1(0x80000000) 261 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 262 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 263 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 264 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 265 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2 266 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3 267 ; CHECK: [[VCMPPDZrri:%[0-9]+]]:vk8 = VCMPPDZrri [[COPY3]], [[COPY4]], 0 268 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPDZrri]] 269 ; CHECK: [[COPY6:%[0-9]+]]:vk8 = COPY [[COPY5]] 270 ; CHECK: [[KSHIFTRBri:%[0-9]+]]:vk8 = KSHIFTRBri [[COPY6]], 2 271 ; CHECK: [[KSHIFTLBri:%[0-9]+]]:vk8 = KSHIFTLBri [[KSHIFTRBri]], 1 272 ; CHECK: [[KNOTBrr:%[0-9]+]]:vk8 = KNOTBrr [[KSHIFTLBri]] 273 ; CHECK: [[KORBrr:%[0-9]+]]:vk8 = KORBrr [[KNOTBrr]], [[KSHIFTRBri]] 274 ; CHECK: [[KANDBrr:%[0-9]+]]:vk8 = KANDBrr [[KORBrr]], [[KSHIFTLBri]] 275 ; CHECK: [[KXORBrr:%[0-9]+]]:vk8 = KXORBrr [[KANDBrr]], [[KSHIFTRBri]] 276 ; CHECK: [[KADDBrr:%[0-9]+]]:vk8 = KADDBrr [[KXORBrr]], [[KNOTBrr]] 277 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF 278 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KADDBrr]] 279 ; CHECK: [[COPY8:%[0-9]+]]:vk8wm = COPY [[COPY7]] 280 ; CHECK: [[VMOVAPDZrrk:%[0-9]+]]:vr512 = VMOVAPDZrrk [[COPY2]], killed [[COPY8]], [[COPY1]] 281 ; CHECK: VMOVAPDZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPDZrrk]] 282 ; CHECK: bb.1: 283 ; CHECK: successors: %bb.2(0x80000000) 284 ; CHECK: bb.2: 285 ; CHECK: RET 0 286 bb.0: 287 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 288 289 %0 = COPY $rdi 290 %1 = COPY $zmm0 291 %2 = COPY $zmm1 292 %3 = COPY $zmm2 293 %4 = COPY $zmm3 294 295 %5 = VCMPPDZrri %3, %4, 0, implicit $mxcsr 296 %6 = COPY %5 297 %7 = COPY %6.sub_8bit 298 299 %12 = SHR8ri %7, 2, implicit-def dead $eflags 300 %13 = SHL8ri %12, 1, implicit-def dead $eflags 301 %14 = NOT8r %13 302 %15 = OR8rr %14, %12, implicit-def dead $eflags 303 %16 = AND8rr %15, %13, implicit-def dead $eflags 304 %17 = XOR8rr %16, %12, implicit-def dead $eflags 305 %18 = ADD8rr %17, %14, implicit-def dead $eflags 306 307 %8 = IMPLICIT_DEF 308 %9 = INSERT_SUBREG %8, %18, %subreg.sub_8bit_hi 309 %10 = COPY %9 310 %11 = VMOVAPDZrrk %2, killed %10, %1 311 VMOVAPDZmr %0, 1, $noreg, 0, $noreg, killed %11 312 313 ; FIXME We can't replace TEST with KTEST due to flag differences 314 ; TEST8rr %18, %18, implicit-def $eflags 315 ; JCC_1 %bb.1, 4, implicit $eflags 316 ; JMP_1 %bb.2 317 318 bb.1: 319 320 bb.2: 321 RET 0 322 323... 324--- 325name: test_16bitops 326alignment: 16 327exposesReturnsTwice: false 328legalized: false 329regBankSelected: false 330selected: false 331tracksRegLiveness: true 332registers: 333 - { id: 0, class: gr64, preferred-register: '' } 334 - { id: 1, class: vr512, preferred-register: '' } 335 - { id: 2, class: vr512, preferred-register: '' } 336 - { id: 3, class: vr512, preferred-register: '' } 337 - { id: 4, class: vr512, preferred-register: '' } 338 - { id: 5, class: vk16, preferred-register: '' } 339 - { id: 6, class: gr32, preferred-register: '' } 340 - { id: 7, class: gr16, preferred-register: '' } 341 - { id: 8, class: gr32, preferred-register: '' } 342 - { id: 9, class: gr32, preferred-register: '' } 343 - { id: 10, class: vk16wm, preferred-register: '' } 344 - { id: 11, class: vr512, preferred-register: '' } 345 - { id: 12, class: gr16, preferred-register: '' } 346 - { id: 13, class: gr16, preferred-register: '' } 347 - { id: 14, class: gr16, preferred-register: '' } 348 - { id: 15, class: gr16, preferred-register: '' } 349 - { id: 16, class: gr16, preferred-register: '' } 350 - { id: 17, class: gr16, preferred-register: '' } 351liveins: 352 - { reg: '$rdi', virtual-reg: '%0' } 353 - { reg: '$zmm0', virtual-reg: '%1' } 354 - { reg: '$zmm1', virtual-reg: '%2' } 355 - { reg: '$zmm2', virtual-reg: '%3' } 356 - { reg: '$zmm3', virtual-reg: '%4' } 357frameInfo: 358 isFrameAddressTaken: false 359 isReturnAddressTaken: false 360 hasStackMap: false 361 hasPatchPoint: false 362 stackSize: 0 363 offsetAdjustment: 0 364 maxAlignment: 0 365 adjustsStack: false 366 hasCalls: false 367 stackProtector: '' 368 maxCallFrameSize: 4294967295 369 hasOpaqueSPAdjustment: false 370 hasVAStart: false 371 hasMustTailInVarArgFunc: false 372 savePoint: '' 373 restorePoint: '' 374fixedStack: 375stack: 376constants: 377body: | 378 ; CHECK-LABEL: name: test_16bitops 379 ; CHECK: bb.0: 380 ; CHECK: successors: %bb.1(0x80000000) 381 ; CHECK: liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 382 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 383 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 384 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 385 ; CHECK: [[COPY3:%[0-9]+]]:vr512 = COPY $zmm2 386 ; CHECK: [[COPY4:%[0-9]+]]:vr512 = COPY $zmm3 387 ; CHECK: [[VCMPPSZrri:%[0-9]+]]:vk16 = VCMPPSZrri [[COPY3]], [[COPY4]], 0 388 ; CHECK: [[COPY5:%[0-9]+]]:vk32 = COPY [[VCMPPSZrri]] 389 ; CHECK: [[COPY6:%[0-9]+]]:vk16 = COPY [[COPY5]] 390 ; CHECK: [[KSHIFTRWri:%[0-9]+]]:vk16 = KSHIFTRWri [[COPY6]], 2 391 ; CHECK: [[KSHIFTLWri:%[0-9]+]]:vk16 = KSHIFTLWri [[KSHIFTRWri]], 1 392 ; CHECK: [[KNOTWrr:%[0-9]+]]:vk16 = KNOTWrr [[KSHIFTLWri]] 393 ; CHECK: [[KORWrr:%[0-9]+]]:vk16 = KORWrr [[KNOTWrr]], [[KSHIFTRWri]] 394 ; CHECK: [[KANDWrr:%[0-9]+]]:vk16 = KANDWrr [[KORWrr]], [[KSHIFTLWri]] 395 ; CHECK: [[KXORWrr:%[0-9]+]]:vk16 = KXORWrr [[KANDWrr]], [[KSHIFTRWri]] 396 ; CHECK: [[DEF:%[0-9]+]]:vk32 = IMPLICIT_DEF 397 ; CHECK: [[COPY7:%[0-9]+]]:vk32 = COPY [[KXORWrr]] 398 ; CHECK: [[COPY8:%[0-9]+]]:vk16wm = COPY [[COPY7]] 399 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY8]], [[COPY1]] 400 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]] 401 ; CHECK: bb.1: 402 ; CHECK: successors: %bb.2(0x80000000) 403 ; CHECK: bb.2: 404 ; CHECK: RET 0 405 bb.0: 406 liveins: $rdi, $zmm0, $zmm1, $zmm2, $zmm3 407 408 %0 = COPY $rdi 409 %1 = COPY $zmm0 410 %2 = COPY $zmm1 411 %3 = COPY $zmm2 412 %4 = COPY $zmm3 413 414 %5 = VCMPPSZrri %3, %4, 0, implicit $mxcsr 415 %6 = COPY %5 416 %7 = COPY %6.sub_16bit 417 418 %12 = SHR16ri %7, 2, implicit-def dead $eflags 419 %13 = SHL16ri %12, 1, implicit-def dead $eflags 420 %14 = NOT16r %13 421 %15 = OR16rr %14, %12, implicit-def dead $eflags 422 %16 = AND16rr %15, %13, implicit-def dead $eflags 423 %17 = XOR16rr %16, %12, implicit-def dead $eflags 424 425 %8 = IMPLICIT_DEF 426 %9 = INSERT_SUBREG %8, %17, %subreg.sub_16bit 427 %10 = COPY %9 428 %11 = VMOVAPSZrrk %2, killed %10, %1 429 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %11 430 431 ; FIXME We can't replace TEST with KTEST due to flag differences 432 ; FIXME TEST16rr %17, %17, implicit-def $eflags 433 ; FIXME JCC_1 %bb.1, 4, implicit $eflags 434 ; FIXME JMP_1 %bb.2 435 436 bb.1: 437 438 bb.2: 439 RET 0 440 441... 442--- 443name: test_32bitops 444alignment: 16 445exposesReturnsTwice: false 446legalized: false 447regBankSelected: false 448selected: false 449tracksRegLiveness: true 450registers: 451 - { id: 0, class: gr64, preferred-register: '' } 452 - { id: 1, class: vr512, preferred-register: '' } 453 - { id: 2, class: vr512, preferred-register: '' } 454 - { id: 3, class: vk32wm, preferred-register: '' } 455 - { id: 4, class: vr512, preferred-register: '' } 456 - { id: 5, class: gr32, preferred-register: '' } 457 - { id: 6, class: gr32, preferred-register: '' } 458 - { id: 7, class: gr32, preferred-register: '' } 459 - { id: 8, class: gr32, preferred-register: '' } 460 - { id: 9, class: gr32, preferred-register: '' } 461 - { id: 10, class: gr32, preferred-register: '' } 462 - { id: 11, class: gr32, preferred-register: '' } 463 - { id: 12, class: gr32, preferred-register: '' } 464 - { id: 13, class: gr32, preferred-register: '' } 465liveins: 466 - { reg: '$rdi', virtual-reg: '%0' } 467 - { reg: '$zmm0', virtual-reg: '%1' } 468 - { reg: '$zmm1', virtual-reg: '%2' } 469frameInfo: 470 isFrameAddressTaken: false 471 isReturnAddressTaken: false 472 hasStackMap: false 473 hasPatchPoint: false 474 stackSize: 0 475 offsetAdjustment: 0 476 maxAlignment: 0 477 adjustsStack: false 478 hasCalls: false 479 stackProtector: '' 480 maxCallFrameSize: 4294967295 481 hasOpaqueSPAdjustment: false 482 hasVAStart: false 483 hasMustTailInVarArgFunc: false 484 savePoint: '' 485 restorePoint: '' 486fixedStack: 487stack: 488constants: 489body: | 490 ; CHECK-LABEL: name: test_32bitops 491 ; CHECK: bb.0: 492 ; CHECK: successors: %bb.1(0x80000000) 493 ; CHECK: liveins: $rdi, $zmm0, $zmm1 494 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 495 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 496 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 497 ; CHECK: [[KMOVDkm:%[0-9]+]]:vk32 = KMOVDkm [[COPY]], 1, $noreg, 0, $noreg 498 ; CHECK: [[KSHIFTRDri:%[0-9]+]]:vk32 = KSHIFTRDri [[KMOVDkm]], 2 499 ; CHECK: [[KSHIFTLDri:%[0-9]+]]:vk32 = KSHIFTLDri [[KSHIFTRDri]], 1 500 ; CHECK: [[KNOTDrr:%[0-9]+]]:vk32 = KNOTDrr [[KSHIFTLDri]] 501 ; CHECK: [[KORDrr:%[0-9]+]]:vk32 = KORDrr [[KNOTDrr]], [[KSHIFTRDri]] 502 ; CHECK: [[KANDDrr:%[0-9]+]]:vk32 = KANDDrr [[KORDrr]], [[KSHIFTLDri]] 503 ; CHECK: [[KXORDrr:%[0-9]+]]:vk32 = KXORDrr [[KANDDrr]], [[KSHIFTRDri]] 504 ; CHECK: [[KANDNDrr:%[0-9]+]]:vk32 = KANDNDrr [[KXORDrr]], [[KORDrr]] 505 ; CHECK: [[KADDDrr:%[0-9]+]]:vk32 = KADDDrr [[KANDNDrr]], [[KXORDrr]] 506 ; CHECK: [[COPY3:%[0-9]+]]:vk32wm = COPY [[KADDDrr]] 507 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]] 508 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]] 509 ; CHECK: bb.1: 510 ; CHECK: successors: %bb.2(0x80000000) 511 ; CHECK: bb.2: 512 ; CHECK: RET 0 513 bb.0: 514 liveins: $rdi, $zmm0, $zmm1 515 516 %0 = COPY $rdi 517 %1 = COPY $zmm0 518 %2 = COPY $zmm1 519 520 %5 = MOV32rm %0, 1, $noreg, 0, $noreg 521 %6 = SHR32ri %5, 2, implicit-def dead $eflags 522 %7 = SHL32ri %6, 1, implicit-def dead $eflags 523 %8 = NOT32r %7 524 %9 = OR32rr %8, %6, implicit-def dead $eflags 525 %10 = AND32rr %9, %7, implicit-def dead $eflags 526 %11 = XOR32rr %10, %6, implicit-def dead $eflags 527 %12 = ANDN32rr %11, %9, implicit-def dead $eflags 528 %13 = ADD32rr %12, %11, implicit-def dead $eflags 529 530 %3 = COPY %13 531 %4 = VMOVDQU16Zrrk %2, killed %3, %1 532 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 533 534 ; FIXME We can't replace TEST with KTEST due to flag differences 535 ; FIXME TEST32rr %13, %13, implicit-def $eflags 536 ; FIXME JCC_1 %bb.1, 4, implicit $eflags 537 ; FIXME JMP_1 %bb.2 538 539 bb.1: 540 541 bb.2: 542 RET 0 543 544... 545--- 546name: test_64bitops 547alignment: 16 548exposesReturnsTwice: false 549legalized: false 550regBankSelected: false 551selected: false 552tracksRegLiveness: true 553registers: 554 - { id: 0, class: gr64, preferred-register: '' } 555 - { id: 1, class: vr512, preferred-register: '' } 556 - { id: 2, class: vr512, preferred-register: '' } 557 - { id: 3, class: vk64wm, preferred-register: '' } 558 - { id: 4, class: vr512, preferred-register: '' } 559 - { id: 5, class: gr64, preferred-register: '' } 560 - { id: 6, class: gr64, preferred-register: '' } 561 - { id: 7, class: gr64, preferred-register: '' } 562 - { id: 8, class: gr64, preferred-register: '' } 563 - { id: 9, class: gr64, preferred-register: '' } 564 - { id: 10, class: gr64, preferred-register: '' } 565 - { id: 11, class: gr64, preferred-register: '' } 566 - { id: 12, class: gr64, preferred-register: '' } 567 - { id: 13, class: gr64, preferred-register: '' } 568liveins: 569 - { reg: '$rdi', virtual-reg: '%0' } 570 - { reg: '$zmm0', virtual-reg: '%1' } 571 - { reg: '$zmm1', virtual-reg: '%2' } 572frameInfo: 573 isFrameAddressTaken: false 574 isReturnAddressTaken: false 575 hasStackMap: false 576 hasPatchPoint: false 577 stackSize: 0 578 offsetAdjustment: 0 579 maxAlignment: 0 580 adjustsStack: false 581 hasCalls: false 582 stackProtector: '' 583 maxCallFrameSize: 4294967295 584 hasOpaqueSPAdjustment: false 585 hasVAStart: false 586 hasMustTailInVarArgFunc: false 587 savePoint: '' 588 restorePoint: '' 589fixedStack: 590stack: 591constants: 592body: | 593 ; CHECK-LABEL: name: test_64bitops 594 ; CHECK: bb.0: 595 ; CHECK: successors: %bb.1(0x80000000) 596 ; CHECK: liveins: $rdi, $zmm0, $zmm1 597 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 598 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 599 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 600 ; CHECK: [[KMOVQkm:%[0-9]+]]:vk64 = KMOVQkm [[COPY]], 1, $noreg, 0, $noreg 601 ; CHECK: [[KSHIFTRQri:%[0-9]+]]:vk64 = KSHIFTRQri [[KMOVQkm]], 2 602 ; CHECK: [[KSHIFTLQri:%[0-9]+]]:vk64 = KSHIFTLQri [[KSHIFTRQri]], 1 603 ; CHECK: [[KNOTQrr:%[0-9]+]]:vk64 = KNOTQrr [[KSHIFTLQri]] 604 ; CHECK: [[KORQrr:%[0-9]+]]:vk64 = KORQrr [[KNOTQrr]], [[KSHIFTRQri]] 605 ; CHECK: [[KANDQrr:%[0-9]+]]:vk64 = KANDQrr [[KORQrr]], [[KSHIFTLQri]] 606 ; CHECK: [[KXORQrr:%[0-9]+]]:vk64 = KXORQrr [[KANDQrr]], [[KSHIFTRQri]] 607 ; CHECK: [[KANDNQrr:%[0-9]+]]:vk64 = KANDNQrr [[KXORQrr]], [[KORQrr]] 608 ; CHECK: [[KADDQrr:%[0-9]+]]:vk64 = KADDQrr [[KANDNQrr]], [[KXORQrr]] 609 ; CHECK: [[COPY3:%[0-9]+]]:vk64wm = COPY [[KADDQrr]] 610 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY3]], [[COPY1]] 611 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]] 612 ; CHECK: bb.1: 613 ; CHECK: successors: %bb.2(0x80000000) 614 ; CHECK: bb.2: 615 ; CHECK: RET 0 616 bb.0: 617 liveins: $rdi, $zmm0, $zmm1 618 619 %0 = COPY $rdi 620 %1 = COPY $zmm0 621 %2 = COPY $zmm1 622 623 %5 = MOV64rm %0, 1, $noreg, 0, $noreg 624 %6 = SHR64ri %5, 2, implicit-def dead $eflags 625 %7 = SHL64ri %6, 1, implicit-def dead $eflags 626 %8 = NOT64r %7 627 %9 = OR64rr %8, %6, implicit-def dead $eflags 628 %10 = AND64rr %9, %7, implicit-def dead $eflags 629 %11 = XOR64rr %10, %6, implicit-def dead $eflags 630 %12 = ANDN64rr %11, %9, implicit-def dead $eflags 631 %13 = ADD64rr %12, %11, implicit-def dead $eflags 632 633 %3 = COPY %13 634 %4 = VMOVDQU8Zrrk %2, killed %3, %1 635 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 636 637 ; FIXME We can't replace TEST with KTEST due to flag differences 638 ; FIXME TEST64rr %13, %13, implicit-def $eflags 639 ; FIXME JCC_1 %bb.1, 4, implicit $eflags 640 ; FIXME JMP_1 %bb.2 641 642 bb.1: 643 644 bb.2: 645 RET 0 646 647... 648--- 649name: test_16bitext 650alignment: 16 651exposesReturnsTwice: false 652legalized: false 653regBankSelected: false 654selected: false 655tracksRegLiveness: true 656registers: 657 - { id: 0, class: gr64, preferred-register: '' } 658 - { id: 1, class: vr512, preferred-register: '' } 659 - { id: 2, class: vr512, preferred-register: '' } 660 - { id: 3, class: vk16wm, preferred-register: '' } 661 - { id: 4, class: vr512, preferred-register: '' } 662 - { id: 5, class: gr16, preferred-register: '' } 663 - { id: 6, class: gr16, preferred-register: '' } 664liveins: 665 - { reg: '$rdi', virtual-reg: '%0' } 666 - { reg: '$zmm0', virtual-reg: '%1' } 667 - { reg: '$zmm1', virtual-reg: '%2' } 668frameInfo: 669 isFrameAddressTaken: false 670 isReturnAddressTaken: false 671 hasStackMap: false 672 hasPatchPoint: false 673 stackSize: 0 674 offsetAdjustment: 0 675 maxAlignment: 0 676 adjustsStack: false 677 hasCalls: false 678 stackProtector: '' 679 maxCallFrameSize: 4294967295 680 hasOpaqueSPAdjustment: false 681 hasVAStart: false 682 hasMustTailInVarArgFunc: false 683 savePoint: '' 684 restorePoint: '' 685fixedStack: 686stack: 687constants: 688body: | 689 bb.0: 690 liveins: $rdi, $zmm0, $zmm1 691 692 ; CHECK-LABEL: name: test_16bitext 693 ; CHECK: liveins: $rdi, $zmm0, $zmm1 694 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 695 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 696 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 697 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 698 ; CHECK: [[COPY3:%[0-9]+]]:vk16 = COPY [[KMOVBkm]] 699 ; CHECK: [[KNOTWrr:%[0-9]+]]:vk16 = KNOTWrr [[COPY3]] 700 ; CHECK: [[COPY4:%[0-9]+]]:vk16wm = COPY [[KNOTWrr]] 701 ; CHECK: [[VMOVAPSZrrk:%[0-9]+]]:vr512 = VMOVAPSZrrk [[COPY2]], killed [[COPY4]], [[COPY1]] 702 ; CHECK: VMOVAPSZmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVAPSZrrk]] 703 ; CHECK: RET 0 704 %0 = COPY $rdi 705 %1 = COPY $zmm0 706 %2 = COPY $zmm1 707 708 %5 = MOVZX16rm8 %0, 1, $noreg, 0, $noreg 709 %6 = NOT16r %5 710 711 %3 = COPY %6 712 %4 = VMOVAPSZrrk %2, killed %3, %1 713 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %4 714 RET 0 715 716... 717--- 718name: test_32bitext 719alignment: 16 720exposesReturnsTwice: false 721legalized: false 722regBankSelected: false 723selected: false 724tracksRegLiveness: true 725registers: 726 - { id: 0, class: gr64, preferred-register: '' } 727 - { id: 1, class: vr512, preferred-register: '' } 728 - { id: 2, class: vr512, preferred-register: '' } 729 - { id: 3, class: vk64wm, preferred-register: '' } 730 - { id: 4, class: vr512, preferred-register: '' } 731 - { id: 5, class: gr32, preferred-register: '' } 732 - { id: 6, class: gr32, preferred-register: '' } 733 - { id: 7, class: gr32, preferred-register: '' } 734liveins: 735 - { reg: '$rdi', virtual-reg: '%0' } 736 - { reg: '$zmm0', virtual-reg: '%1' } 737 - { reg: '$zmm1', virtual-reg: '%2' } 738frameInfo: 739 isFrameAddressTaken: false 740 isReturnAddressTaken: false 741 hasStackMap: false 742 hasPatchPoint: false 743 stackSize: 0 744 offsetAdjustment: 0 745 maxAlignment: 0 746 adjustsStack: false 747 hasCalls: false 748 stackProtector: '' 749 maxCallFrameSize: 4294967295 750 hasOpaqueSPAdjustment: false 751 hasVAStart: false 752 hasMustTailInVarArgFunc: false 753 savePoint: '' 754 restorePoint: '' 755fixedStack: 756stack: 757constants: 758body: | 759 bb.0: 760 liveins: $rdi, $zmm0, $zmm1 761 762 ; CHECK-LABEL: name: test_32bitext 763 ; CHECK: liveins: $rdi, $zmm0, $zmm1 764 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 765 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 766 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 767 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 768 ; CHECK: [[COPY3:%[0-9]+]]:vk32 = COPY [[KMOVBkm]] 769 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg 770 ; CHECK: [[COPY4:%[0-9]+]]:vk32 = COPY [[KMOVWkm]] 771 ; CHECK: [[KADDDrr:%[0-9]+]]:vk32 = KADDDrr [[COPY3]], [[COPY4]] 772 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDDrr]] 773 ; CHECK: [[VMOVDQU16Zrrk:%[0-9]+]]:vr512 = VMOVDQU16Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]] 774 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU16Zrrk]] 775 ; CHECK: RET 0 776 %0 = COPY $rdi 777 %1 = COPY $zmm0 778 %2 = COPY $zmm1 779 780 %5 = MOVZX32rm8 %0, 1, $noreg, 0, $noreg 781 %6 = MOVZX32rm16 %0, 1, $noreg, 0, $noreg 782 %7 = ADD32rr %5, %6, implicit-def dead $eflags 783 784 %3 = COPY %7 785 %4 = VMOVDQU16Zrrk %2, killed %3, %1 786 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 787 RET 0 788 789... 790--- 791name: test_64bitext 792alignment: 16 793exposesReturnsTwice: false 794legalized: false 795regBankSelected: false 796selected: false 797tracksRegLiveness: true 798registers: 799 - { id: 0, class: gr64, preferred-register: '' } 800 - { id: 1, class: vr512, preferred-register: '' } 801 - { id: 2, class: vr512, preferred-register: '' } 802 - { id: 3, class: vk64wm, preferred-register: '' } 803 - { id: 4, class: vr512, preferred-register: '' } 804 - { id: 5, class: gr64, preferred-register: '' } 805 - { id: 6, class: gr64, preferred-register: '' } 806 - { id: 7, class: gr64, preferred-register: '' } 807liveins: 808 - { reg: '$rdi', virtual-reg: '%0' } 809 - { reg: '$zmm0', virtual-reg: '%1' } 810 - { reg: '$zmm1', virtual-reg: '%2' } 811frameInfo: 812 isFrameAddressTaken: false 813 isReturnAddressTaken: false 814 hasStackMap: false 815 hasPatchPoint: false 816 stackSize: 0 817 offsetAdjustment: 0 818 maxAlignment: 0 819 adjustsStack: false 820 hasCalls: false 821 stackProtector: '' 822 maxCallFrameSize: 4294967295 823 hasOpaqueSPAdjustment: false 824 hasVAStart: false 825 hasMustTailInVarArgFunc: false 826 savePoint: '' 827 restorePoint: '' 828fixedStack: 829stack: 830constants: 831body: | 832 bb.0: 833 liveins: $rdi, $zmm0, $zmm1 834 835 ; CHECK-LABEL: name: test_64bitext 836 ; CHECK: liveins: $rdi, $zmm0, $zmm1 837 ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 838 ; CHECK: [[COPY1:%[0-9]+]]:vr512 = COPY $zmm0 839 ; CHECK: [[COPY2:%[0-9]+]]:vr512 = COPY $zmm1 840 ; CHECK: [[KMOVBkm:%[0-9]+]]:vk8 = KMOVBkm [[COPY]], 1, $noreg, 0, $noreg 841 ; CHECK: [[COPY3:%[0-9]+]]:vk64 = COPY [[KMOVBkm]] 842 ; CHECK: [[KMOVWkm:%[0-9]+]]:vk16 = KMOVWkm [[COPY]], 1, $noreg, 0, $noreg 843 ; CHECK: [[COPY4:%[0-9]+]]:vk64 = COPY [[KMOVWkm]] 844 ; CHECK: [[KADDQrr:%[0-9]+]]:vk64 = KADDQrr [[COPY3]], [[COPY4]] 845 ; CHECK: [[COPY5:%[0-9]+]]:vk64wm = COPY [[KADDQrr]] 846 ; CHECK: [[VMOVDQU8Zrrk:%[0-9]+]]:vr512 = VMOVDQU8Zrrk [[COPY2]], killed [[COPY5]], [[COPY1]] 847 ; CHECK: VMOVDQA32Zmr [[COPY]], 1, $noreg, 0, $noreg, killed [[VMOVDQU8Zrrk]] 848 ; CHECK: RET 0 849 %0 = COPY $rdi 850 %1 = COPY $zmm0 851 %2 = COPY $zmm1 852 853 %5 = MOVZX64rm8 %0, 1, $noreg, 0, $noreg 854 %6 = MOVZX64rm16 %0, 1, $noreg, 0, $noreg 855 %7 = ADD64rr %5, %6, implicit-def dead $eflags 856 857 %3 = COPY %7 858 %4 = VMOVDQU8Zrrk %2, killed %3, %1 859 VMOVDQA32Zmr %0, 1, $noreg, 0, $noreg, killed %4 860 RET 0 861 862... 863