1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s
3
4; Use h-register extract and zero-extend.
5
6define double @foo8(double* nocapture inreg %p, i64 inreg %x) nounwind readonly {
7; CHECK-LABEL: foo8:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    movq %rsi, %rax
10; CHECK-NEXT:    movzbl %ah, %eax
11; CHECK-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
12; CHECK-NEXT:    retq
13  %t0 = lshr i64 %x, 8
14  %t1 = and i64 %t0, 255
15  %t2 = getelementptr double, double* %p, i64 %t1
16  %t3 = load double, double* %t2, align 8
17  ret double %t3
18}
19
20define float @foo4(float* nocapture inreg %p, i64 inreg %x) nounwind readonly {
21; CHECK-LABEL: foo4:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    movq %rsi, %rax
24; CHECK-NEXT:    movzbl %ah, %eax
25; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
26; CHECK-NEXT:    retq
27  %t0 = lshr i64 %x, 8
28  %t1 = and i64 %t0, 255
29  %t2 = getelementptr float, float* %p, i64 %t1
30  %t3 = load float, float* %t2, align 8
31  ret float %t3
32}
33
34define i16 @foo2(i16* nocapture inreg %p, i64 inreg %x) nounwind readonly {
35; CHECK-LABEL: foo2:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    movq %rsi, %rax
38; CHECK-NEXT:    movzbl %ah, %eax
39; CHECK-NEXT:    movzwl (%rdi,%rax,2), %eax
40; CHECK-NEXT:    retq
41  %t0 = lshr i64 %x, 8
42  %t1 = and i64 %t0, 255
43  %t2 = getelementptr i16, i16* %p, i64 %t1
44  %t3 = load i16, i16* %t2, align 8
45  ret i16 %t3
46}
47
48define i8 @foo1(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
49; CHECK-LABEL: foo1:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    movq %rsi, %rax
52; CHECK-NEXT:    movzbl %ah, %eax
53; CHECK-NEXT:    movb (%rdi,%rax), %al
54; CHECK-NEXT:    retq
55  %t0 = lshr i64 %x, 8
56  %t1 = and i64 %t0, 255
57  %t2 = getelementptr i8, i8* %p, i64 %t1
58  %t3 = load i8, i8* %t2, align 8
59  ret i8 %t3
60}
61
62define i8 @bar8(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
63; CHECK-LABEL: bar8:
64; CHECK:       # %bb.0:
65; CHECK-NEXT:    movq %rsi, %rax
66; CHECK-NEXT:    movzbl %ah, %eax
67; CHECK-NEXT:    movb (%rdi,%rax,8), %al
68; CHECK-NEXT:    retq
69  %t0 = lshr i64 %x, 5
70  %t1 = and i64 %t0, 2040
71  %t2 = getelementptr i8, i8* %p, i64 %t1
72  %t3 = load i8, i8* %t2, align 8
73  ret i8 %t3
74}
75
76define i8 @bar4(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
77; CHECK-LABEL: bar4:
78; CHECK:       # %bb.0:
79; CHECK-NEXT:    movq %rsi, %rax
80; CHECK-NEXT:    movzbl %ah, %eax
81; CHECK-NEXT:    movb (%rdi,%rax,4), %al
82; CHECK-NEXT:    retq
83  %t0 = lshr i64 %x, 6
84  %t1 = and i64 %t0, 1020
85  %t2 = getelementptr i8, i8* %p, i64 %t1
86  %t3 = load i8, i8* %t2, align 8
87  ret i8 %t3
88}
89
90define i8 @bar2(i8* nocapture inreg %p, i64 inreg %x) nounwind readonly {
91; CHECK-LABEL: bar2:
92; CHECK:       # %bb.0:
93; CHECK-NEXT:    movq %rsi, %rax
94; CHECK-NEXT:    movzbl %ah, %eax
95; CHECK-NEXT:    movb (%rdi,%rax,2), %al
96; CHECK-NEXT:    retq
97  %t0 = lshr i64 %x, 7
98  %t1 = and i64 %t0, 510
99  %t2 = getelementptr i8, i8* %p, i64 %t1
100  %t3 = load i8, i8* %t2, align 8
101  ret i8 %t3
102}
103