1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64 3; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86 4 5define i128 @foo(i128 %t, i128 %u) { 6; X64-LABEL: foo: 7; X64: # %bb.0: 8; X64-NEXT: movq %rdx, %r8 9; X64-NEXT: movq %rdi, %rax 10; X64-NEXT: imulq %rdi, %rcx 11; X64-NEXT: mulq %rdx 12; X64-NEXT: addq %rcx, %rdx 13; X64-NEXT: imulq %r8, %rsi 14; X64-NEXT: addq %rsi, %rdx 15; X64-NEXT: retq 16; 17; X86-LABEL: foo: 18; X86: # %bb.0: 19; X86-NEXT: pushl %ebp 20; X86-NEXT: .cfi_def_cfa_offset 8 21; X86-NEXT: pushl %ebx 22; X86-NEXT: .cfi_def_cfa_offset 12 23; X86-NEXT: pushl %edi 24; X86-NEXT: .cfi_def_cfa_offset 16 25; X86-NEXT: pushl %esi 26; X86-NEXT: .cfi_def_cfa_offset 20 27; X86-NEXT: subl $8, %esp 28; X86-NEXT: .cfi_def_cfa_offset 28 29; X86-NEXT: .cfi_offset %esi, -20 30; X86-NEXT: .cfi_offset %edi, -16 31; X86-NEXT: .cfi_offset %ebx, -12 32; X86-NEXT: .cfi_offset %ebp, -8 33; X86-NEXT: movl {{[0-9]+}}(%esp), %edx 34; X86-NEXT: movl {{[0-9]+}}(%esp), %edi 35; X86-NEXT: movl {{[0-9]+}}(%esp), %esi 36; X86-NEXT: imull %edx, %esi 37; X86-NEXT: movl %edi, %eax 38; X86-NEXT: mull %edx 39; X86-NEXT: movl %eax, %ebx 40; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 41; X86-NEXT: imull %edi, %ecx 42; X86-NEXT: addl %edx, %ecx 43; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 44; X86-NEXT: addl %esi, %ecx 45; X86-NEXT: movl %eax, %esi 46; X86-NEXT: imull {{[0-9]+}}(%esp), %esi 47; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp 48; X86-NEXT: mull %ebp 49; X86-NEXT: addl %esi, %edx 50; X86-NEXT: movl {{[0-9]+}}(%esp), %edi 51; X86-NEXT: imull %ebp, %edi 52; X86-NEXT: addl %edx, %edi 53; X86-NEXT: addl %ebx, %eax 54; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 55; X86-NEXT: adcl %ecx, %edi 56; X86-NEXT: movl %ebp, %eax 57; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 58; X86-NEXT: mull %ecx 59; X86-NEXT: movl %edx, %ebx 60; X86-NEXT: movl %eax, (%esp) # 4-byte Spill 61; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 62; X86-NEXT: mull %ecx 63; X86-NEXT: movl %edx, %esi 64; X86-NEXT: movl %eax, %ecx 65; X86-NEXT: addl %ebx, %ecx 66; X86-NEXT: adcl $0, %esi 67; X86-NEXT: movl %ebp, %eax 68; X86-NEXT: mull {{[0-9]+}}(%esp) 69; X86-NEXT: movl %edx, %ebx 70; X86-NEXT: movl %eax, %ebp 71; X86-NEXT: addl %ecx, %ebp 72; X86-NEXT: adcl %esi, %ebx 73; X86-NEXT: setb %cl 74; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 75; X86-NEXT: mull {{[0-9]+}}(%esp) 76; X86-NEXT: addl %ebx, %eax 77; X86-NEXT: movzbl %cl, %ecx 78; X86-NEXT: adcl %ecx, %edx 79; X86-NEXT: addl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload 80; X86-NEXT: adcl %edi, %edx 81; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 82; X86-NEXT: movl (%esp), %esi # 4-byte Reload 83; X86-NEXT: movl %esi, (%ecx) 84; X86-NEXT: movl %ebp, 4(%ecx) 85; X86-NEXT: movl %eax, 8(%ecx) 86; X86-NEXT: movl %edx, 12(%ecx) 87; X86-NEXT: movl %ecx, %eax 88; X86-NEXT: addl $8, %esp 89; X86-NEXT: .cfi_def_cfa_offset 20 90; X86-NEXT: popl %esi 91; X86-NEXT: .cfi_def_cfa_offset 16 92; X86-NEXT: popl %edi 93; X86-NEXT: .cfi_def_cfa_offset 12 94; X86-NEXT: popl %ebx 95; X86-NEXT: .cfi_def_cfa_offset 8 96; X86-NEXT: popl %ebp 97; X86-NEXT: .cfi_def_cfa_offset 4 98; X86-NEXT: retl $4 99 %k = mul i128 %t, %u 100 ret i128 %k 101} 102 103@aaa = external dso_local global i128 104@bbb = external dso_local global i128 105 106define void @PR13897() nounwind { 107; X64-LABEL: PR13897: 108; X64: # %bb.0: # %"0x0" 109; X64-NEXT: movl bbb(%rip), %ecx 110; X64-NEXT: movabsq $4294967297, %rdx # imm = 0x100000001 111; X64-NEXT: movq %rcx, %rax 112; X64-NEXT: mulq %rdx 113; X64-NEXT: addq %rcx, %rdx 114; X64-NEXT: shlq $32, %rcx 115; X64-NEXT: addq %rcx, %rdx 116; X64-NEXT: movq %rax, aaa(%rip) 117; X64-NEXT: movq %rdx, aaa+8(%rip) 118; X64-NEXT: retq 119; 120; X86-LABEL: PR13897: 121; X86: # %bb.0: # %"0x0" 122; X86-NEXT: movl bbb, %eax 123; X86-NEXT: movl %eax, aaa+12 124; X86-NEXT: movl %eax, aaa+8 125; X86-NEXT: movl %eax, aaa+4 126; X86-NEXT: movl %eax, aaa 127; X86-NEXT: retl 128"0x0": 129 %0 = load i128, i128* @bbb 130 %1 = and i128 %0, 4294967295 131 %2 = shl i128 %0, 96 132 %3 = mul i128 %1, 18446744078004518913 133 %4 = add i128 %3, %2 134 store i128 %4, i128* @aaa 135 ret void 136} 137