1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=sse | FileCheck %s
3
4define i32 @test_load(<4 x float>* %a) {
5; CHECK-LABEL: test_load:
6; CHECK:       ## %bb.0: ## %start
7; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
8; CHECK-NEXT:    movaps (%eax), %xmm0
9; CHECK-NEXT:    movmskps %xmm0, %eax
10; CHECK-NEXT:    retl
11start:
12  %0 = bitcast <4 x float>* %a to <4 x i32>*
13  %1 = load <4 x i32>, <4 x i32>* %0, align 16
14  %2 = icmp slt <4 x i32> %1, zeroinitializer
15  %3 = bitcast <4 x i1> %2 to i4
16  %4 = zext i4 %3 to i32
17  ret i32 %4
18}
19
20define i32 @test_bitcast(<4 x float> %a) {
21; CHECK-LABEL: test_bitcast:
22; CHECK:       ## %bb.0: ## %start
23; CHECK-NEXT:    movmskps %xmm0, %eax
24; CHECK-NEXT:    retl
25start:
26  %0 = bitcast <4 x float> %a to <4 x i32>
27  %1 = icmp slt <4 x i32> %0, zeroinitializer
28  %2 = bitcast <4 x i1> %1 to i4
29  %3 = zext i4 %2 to i32
30  ret i32 %3
31}
32
33define i32 @test_and(<4 x float> %a, <4 x float> %b) {
34; CHECK-LABEL: test_and:
35; CHECK:       ## %bb.0: ## %start
36; CHECK-NEXT:    andps %xmm1, %xmm0
37; CHECK-NEXT:    movmskps %xmm0, %eax
38; CHECK-NEXT:    retl
39start:
40  %0 = bitcast <4 x float> %a to <4 x i32>
41  %1 = bitcast <4 x float> %b to <4 x i32>
42  %2 = icmp slt <4 x i32> %0, zeroinitializer
43  %3 = icmp slt <4 x i32> %1, zeroinitializer
44  %4 = and <4 x i1> %2, %3
45  %5 = bitcast <4 x i1> %4 to i4
46  %6 = zext i4 %5 to i32
47  ret i32 %6
48}
49
50define i32 @test_or(<4 x float> %a, <4 x float> %b) {
51; CHECK-LABEL: test_or:
52; CHECK:       ## %bb.0: ## %start
53; CHECK-NEXT:    orps %xmm1, %xmm0
54; CHECK-NEXT:    movmskps %xmm0, %eax
55; CHECK-NEXT:    retl
56start:
57  %0 = bitcast <4 x float> %a to <4 x i32>
58  %1 = bitcast <4 x float> %b to <4 x i32>
59  %2 = icmp slt <4 x i32> %0, zeroinitializer
60  %3 = icmp slt <4 x i32> %1, zeroinitializer
61  %4 = or <4 x i1> %2, %3
62  %5 = bitcast <4 x i1> %4 to i4
63  %6 = zext i4 %5 to i32
64  ret i32 %6
65}
66
67define i32 @test_xor(<4 x float> %a, <4 x float> %b) {
68; CHECK-LABEL: test_xor:
69; CHECK:       ## %bb.0: ## %start
70; CHECK-NEXT:    xorps %xmm1, %xmm0
71; CHECK-NEXT:    movmskps %xmm0, %eax
72; CHECK-NEXT:    retl
73start:
74  %0 = bitcast <4 x float> %a to <4 x i32>
75  %1 = bitcast <4 x float> %b to <4 x i32>
76  %2 = icmp slt <4 x i32> %0, zeroinitializer
77  %3 = icmp slt <4 x i32> %1, zeroinitializer
78  %4 = xor <4 x i1> %2, %3
79  %5 = bitcast <4 x i1> %4 to i4
80  %6 = zext i4 %5 to i32
81  ret i32 %6
82}
83