1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx      | FileCheck %s --check-prefixes=AVX1
3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2     | FileCheck %s --check-prefixes=AVX2
4; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
5
6; FIXME: Ensure when we merge broadcasts to different widths that they come from the same SDValue.
7define i32 @PR48215(i32 %a0, i32 %a1)  {
8; AVX1-LABEL: PR48215:
9; AVX1:       ## %bb.0:
10; AVX1-NEXT:    movl %edi, %eax
11; AVX1-NEXT:    cltd
12; AVX1-NEXT:    idivl %esi
13; AVX1-NEXT:    vmovd %edx, %xmm0
14; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
15; AVX1-NEXT:    vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
16; AVX1-NEXT:    vmovd %eax, %xmm2
17; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
18; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm1, %xmm3
19; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [0,1,2,3]
20; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm4, %xmm2
21; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm2, %ymm2
22; AVX1-NEXT:    vmovmskps %ymm2, %ecx
23; AVX1-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
24; AVX1-NEXT:    vmovmskps %xmm0, %eax
25; AVX1-NEXT:    addl %ecx, %eax
26; AVX1-NEXT:    vzeroupper
27; AVX1-NEXT:    retq
28;
29; AVX2-LABEL: PR48215:
30; AVX2:       ## %bb.0:
31; AVX2-NEXT:    movl %edi, %eax
32; AVX2-NEXT:    cltd
33; AVX2-NEXT:    idivl %esi
34; AVX2-NEXT:    vmovd %eax, %xmm0
35; AVX2-NEXT:    vpbroadcastd %xmm0, %ymm0
36; AVX2-NEXT:    vmovd %edx, %xmm1
37; AVX2-NEXT:    vpbroadcastd %xmm1, %xmm1
38; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7]
39; AVX2-NEXT:    vpcmpgtd %ymm0, %ymm2, %ymm0
40; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [4,5,6,7]
41; AVX2-NEXT:    vpcmpgtd %xmm1, %xmm2, %xmm1
42; AVX2-NEXT:    vmovmskps %ymm0, %ecx
43; AVX2-NEXT:    vmovmskps %xmm1, %eax
44; AVX2-NEXT:    addl %ecx, %eax
45; AVX2-NEXT:    vzeroupper
46; AVX2-NEXT:    retq
47;
48; AVX512-LABEL: PR48215:
49; AVX512:       ## %bb.0:
50; AVX512-NEXT:    movl %edi, %eax
51; AVX512-NEXT:    cltd
52; AVX512-NEXT:    idivl %esi
53; AVX512-NEXT:    vpbroadcastd %eax, %ymm0
54; AVX512-NEXT:    vpbroadcastd %edx, %xmm1
55; AVX512-NEXT:    vpcmpltd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %k0
56; AVX512-NEXT:    vpcmpltd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %k1
57; AVX512-NEXT:    kmovw %k0, %eax
58; AVX512-NEXT:    movzbl %al, %ecx
59; AVX512-NEXT:    kmovw %k1, %eax
60; AVX512-NEXT:    andl $15, %eax
61; AVX512-NEXT:    addl %ecx, %eax
62; AVX512-NEXT:    vzeroupper
63; AVX512-NEXT:    retq
64  %d = sdiv i32 %a0, %a1
65  %r = srem i32 %a0, %a1
66  %dv0 = insertelement <8 x i32> undef, i32 %d, i32 0
67  %rv0 = insertelement <4 x i32> undef, i32 %r, i32 0
68  %dv1 = shufflevector <8 x i32> %dv0, <8 x i32> undef, <8 x i32> zeroinitializer
69  %rv1 = shufflevector <4 x i32> %rv0, <4 x i32> undef, <4 x i32> zeroinitializer
70  %dc0 = icmp slt <8 x i32> %dv1, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
71  %rc0 = icmp slt <4 x i32> %rv1, <i32 4, i32 5, i32 6, i32 7>
72  %db0 = bitcast <8 x i1> %dc0 to i8
73  %rb0 = bitcast <4 x i1> %rc0 to i4
74  %db1 = zext i8 %db0 to i32
75  %rb1 = zext i4 %rb0 to i32
76  %res = add i32 %db1, %rb1
77  ret i32 %res
78}
79