1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3
4define { i64, i64 } @PR36721_u8(i64, i64, i8 zeroext) nounwind {
5; CHECK-LABEL: PR36721_u8:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    movl %edx, %ecx
8; CHECK-NEXT:    movq %rsi, %rdx
9; CHECK-NEXT:    movq %rdi, %rax
10; CHECK-NEXT:    shldq %cl, %rdi, %rdx
11; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
12; CHECK-NEXT:    shlq %cl, %rax
13; CHECK-NEXT:    retq
14  %4 = zext i64 %1 to i128
15  %5 = shl nuw i128 %4, 64
16  %6 = zext i64 %0 to i128
17  %7 = or i128 %5, %6
18  %8 = and i8 %2, 63
19  %9 = zext i8 %8 to i128
20  %10 = shl i128 %7, %9
21  %11 = trunc i128 %10 to i64
22  %12 = lshr i128 %10, 64
23  %13 = trunc i128 %12 to i64
24  %14 = insertvalue { i64, i64 } undef, i64 %11, 0
25  %15 = insertvalue { i64, i64 } %14, i64 %13, 1
26  ret { i64, i64 } %15
27}
28
29define { i64, i64 } @PR36721_u32(i64, i64, i32) nounwind {
30; CHECK-LABEL: PR36721_u32:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    movl %edx, %ecx
33; CHECK-NEXT:    movq %rsi, %rdx
34; CHECK-NEXT:    movq %rdi, %rax
35; CHECK-NEXT:    shldq %cl, %rdi, %rdx
36; CHECK-NEXT:    # kill: def $cl killed $cl killed $ecx
37; CHECK-NEXT:    shlq %cl, %rax
38; CHECK-NEXT:    retq
39  %4 = zext i64 %1 to i128
40  %5 = shl nuw i128 %4, 64
41  %6 = zext i64 %0 to i128
42  %7 = or i128 %5, %6
43  %8 = and i32 %2, 63
44  %9 = zext i32 %8 to i128
45  %10 = shl i128 %7, %9
46  %11 = trunc i128 %10 to i64
47  %12 = lshr i128 %10, 64
48  %13 = trunc i128 %12 to i64
49  %14 = insertvalue { i64, i64 } undef, i64 %11, 0
50  %15 = insertvalue { i64, i64 } %14, i64 %13, 1
51  ret { i64, i64 } %15
52}
53