1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
6
7define <2 x i16> @test_urem_unary_v2i16() nounwind {
8; SSE-LABEL: test_urem_unary_v2i16:
9; SSE:       # %bb.0:
10; SSE-NEXT:    xorps %xmm0, %xmm0
11; SSE-NEXT:    retq
12;
13; AVX-LABEL: test_urem_unary_v2i16:
14; AVX:       # %bb.0:
15; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
16; AVX-NEXT:    retq
17  %I8 = insertelement <2 x i16> zeroinitializer, i16 -1, i32 0
18  %I9 = insertelement <2 x i16> %I8, i16 -1, i32 1
19  %B9 = urem <2 x i16> %I9, %I9
20  ret <2 x i16> %B9
21}
22
23define <4 x i32> @PR20355(<4 x i32> %a) nounwind {
24; SSE2-LABEL: PR20355:
25; SSE2:       # %bb.0: # %entry
26; SSE2-NEXT:    movdqa {{.*#+}} xmm1 = [1431655766,1431655766,1431655766,1431655766]
27; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
28; SSE2-NEXT:    pxor %xmm3, %xmm3
29; SSE2-NEXT:    pcmpgtd %xmm0, %xmm3
30; SSE2-NEXT:    pmuludq %xmm1, %xmm0
31; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]
32; SSE2-NEXT:    pmuludq %xmm1, %xmm2
33; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,3,2,3]
34; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
35; SSE2-NEXT:    pand %xmm1, %xmm3
36; SSE2-NEXT:    psubd %xmm3, %xmm4
37; SSE2-NEXT:    movdqa %xmm4, %xmm0
38; SSE2-NEXT:    psrld $31, %xmm0
39; SSE2-NEXT:    paddd %xmm4, %xmm0
40; SSE2-NEXT:    retq
41;
42; SSE41-LABEL: PR20355:
43; SSE41:       # %bb.0: # %entry
44; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
45; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [1431655766,1431655766,1431655766,1431655766]
46; SSE41-NEXT:    pmuldq %xmm2, %xmm1
47; SSE41-NEXT:    pmuldq %xmm2, %xmm0
48; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
49; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
50; SSE41-NEXT:    movdqa %xmm2, %xmm0
51; SSE41-NEXT:    psrld $31, %xmm0
52; SSE41-NEXT:    paddd %xmm2, %xmm0
53; SSE41-NEXT:    retq
54;
55; AVX1-LABEL: PR20355:
56; AVX1:       # %bb.0: # %entry
57; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
58; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [1431655766,1431655766,1431655766,1431655766]
59; AVX1-NEXT:    vpmuldq %xmm2, %xmm1, %xmm1
60; AVX1-NEXT:    vpmuldq %xmm2, %xmm0, %xmm0
61; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
62; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
63; AVX1-NEXT:    vpsrld $31, %xmm0, %xmm1
64; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
65; AVX1-NEXT:    retq
66;
67; AVX2-LABEL: PR20355:
68; AVX2:       # %bb.0: # %entry
69; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
70; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm2 = [1431655766,1431655766,1431655766,1431655766]
71; AVX2-NEXT:    vpmuldq %xmm2, %xmm1, %xmm1
72; AVX2-NEXT:    vpmuldq %xmm2, %xmm0, %xmm0
73; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
74; AVX2-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
75; AVX2-NEXT:    vpsrld $31, %xmm0, %xmm1
76; AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
77; AVX2-NEXT:    retq
78entry:
79  %sdiv = sdiv <4 x i32> %a, <i32 3, i32 3, i32 3, i32 3>
80  ret <4 x i32> %sdiv
81}
82