1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s 3 4define void @t() nounwind ssp { 5; CHECK-LABEL: t: 6; CHECK: ## %bb.0: ## %entry 7; CHECK-NEXT: xorl %eax, %eax 8; CHECK-NEXT: testb %al, %al 9; CHECK-NEXT: jne LBB0_6 10; CHECK-NEXT: ## %bb.1: ## %if.end.i 11; CHECK-NEXT: xorl %eax, %eax 12; CHECK-NEXT: testb %al, %al 13; CHECK-NEXT: je LBB0_2 14; CHECK-NEXT: LBB0_6: ## %return 15; CHECK-NEXT: retq 16; CHECK-NEXT: LBB0_2: ## %if.end 17; CHECK-NEXT: movb $1, %al 18; CHECK-NEXT: testb %al, %al 19; CHECK-NEXT: xorl %eax, %eax 20; CHECK-NEXT: testb %al, %al 21; CHECK-NEXT: jne LBB0_5 22; CHECK-NEXT: ## %bb.3: ## %cond.true190 23; CHECK-NEXT: xorl %eax, %eax 24; CHECK-NEXT: testb %al, %al 25; CHECK-NEXT: jne LBB0_5 26; CHECK-NEXT: ## %bb.4: ## %cond.true225 27; CHECK-NEXT: xorl %eax, %eax 28; CHECK-NEXT: testb %al, %al 29; CHECK-NEXT: LBB0_5: ## %cond.false205 30; CHECK-NEXT: ud2 31entry: 32 br i1 undef, label %return, label %if.end.i 33 34if.end.i: ; preds = %entry 35 %tmp7.i = load i32, i32* undef, align 4 36 br i1 undef, label %return, label %if.end 37 38if.end: ; preds = %if.end.i 39 %tmp138 = select i1 undef, i32 0, i32 %tmp7.i 40 %tmp867 = zext i32 %tmp138 to i64 41 br label %while.cond 42 43while.cond: ; preds = %while.body, %if.end 44 %tmp869 = sub i64 %tmp867, 0 45 %scale2.0 = trunc i64 %tmp869 to i32 46 %cmp149 = icmp eq i32 %scale2.0, 0 47 br i1 %cmp149, label %while.end, label %land.rhs 48 49land.rhs: ; preds = %while.cond 50 br i1 undef, label %while.body, label %while.end 51 52while.body: ; preds = %land.rhs 53 br label %while.cond 54 55while.end: ; preds = %land.rhs, %while.cond 56 br i1 undef, label %cond.false205, label %cond.true190 57 58cond.true190: ; preds = %while.end 59 br i1 undef, label %cond.false242, label %cond.true225 60 61cond.false205: ; preds = %while.end 62 unreachable 63 64cond.true225: ; preds = %cond.true190 65 br i1 undef, label %cond.false280, label %cond.true271 66 67cond.false242: ; preds = %cond.true190 68 unreachable 69 70cond.true271: ; preds = %cond.true225 71 unreachable 72 73cond.false280: ; preds = %cond.true225 74 unreachable 75 76return: ; preds = %if.end.i, %entry 77 ret void 78} 79