1# RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass si-memory-legalizer %s -o - | FileCheck %s 2 3--- | 4 ; ModuleID = 'memory-legalizer-multiple-mem-operands.ll' 5 source_filename = "memory-legalizer-multiple-mem-operands.ll" 6 target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-A5" 7 8 define amdgpu_kernel void @multiple_mem_operands(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) #0 { 9 entry: 10 %scratch0 = alloca [8192 x i32], addrspace(5) 11 %scratch1 = alloca [8192 x i32], addrspace(5) 12 %scratchptr01 = bitcast [8192 x i32] addrspace(5)* %scratch0 to i32 addrspace(5)* 13 store i32 1, i32 addrspace(5)* %scratchptr01 14 %scratchptr12 = bitcast [8192 x i32] addrspace(5)* %scratch1 to i32 addrspace(5)* 15 store i32 2, i32 addrspace(5)* %scratchptr12 16 %cmp = icmp eq i32 %cond, 0 17 br i1 %cmp, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0 18 19 if: ; preds = %entry 20 %if_ptr = getelementptr [8192 x i32], [8192 x i32] addrspace(5)* %scratch0, i32 0, i32 %if_offset, !amdgpu.uniform !0 21 %if_value = load i32, i32 addrspace(5)* %if_ptr, align 4, !nontemporal !1 22 br label %done, !structurizecfg.uniform !0 23 24 else: ; preds = %entry 25 %else_ptr = getelementptr [8192 x i32], [8192 x i32] addrspace(5)* %scratch1, i32 0, i32 %else_offset, !amdgpu.uniform !0 26 %else_value = load i32, i32 addrspace(5)* %else_ptr, align 4, !nontemporal !1 27 br label %done, !structurizecfg.uniform !0 28 29 done: ; preds = %else, %if 30 %value = phi i32 [ %if_value, %if ], [ %else_value, %else ] 31 store i32 %value, i32 addrspace(1)* %out 32 ret void 33 } 34 35 ; Function Attrs: convergent nounwind 36 declare { i1, i64 } @llvm.amdgcn.if(i1) #1 37 38 ; Function Attrs: convergent nounwind 39 declare { i1, i64 } @llvm.amdgcn.else(i64) #1 40 41 ; Function Attrs: convergent nounwind readnone 42 declare i64 @llvm.amdgcn.break(i64) #2 43 44 ; Function Attrs: convergent nounwind readnone 45 declare i64 @llvm.amdgcn.if.break(i1, i64) #2 46 47 ; Function Attrs: convergent nounwind readnone 48 declare i64 @llvm.amdgcn.else.break(i64, i64) #2 49 50 ; Function Attrs: convergent nounwind 51 declare i1 @llvm.amdgcn.loop(i64) #1 52 53 ; Function Attrs: convergent nounwind 54 declare void @llvm.amdgcn.end.cf(i64) #1 55 56 attributes #0 = { "target-cpu"="gfx803" } 57 attributes #1 = { convergent nounwind } 58 attributes #2 = { convergent nounwind readnone } 59 60 !0 = !{} 61 !1 = !{i32 1} 62 63... 64--- 65 66# CHECK-LABEL: name: multiple_mem_operands 67 68# CHECK-LABEL: bb.3.done: 69# CHECK: BUFFER_LOAD_DWORD_OFFEN killed $vgpr0, killed $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 1, 1, 0 70 71name: multiple_mem_operands 72alignment: 0 73exposesReturnsTwice: false 74legalized: false 75regBankSelected: false 76selected: false 77tracksRegLiveness: true 78registers: 79liveins: 80 - { reg: '$sgpr0_sgpr1', virtual-reg: '' } 81 - { reg: '$sgpr3', virtual-reg: '' } 82frameInfo: 83 isFrameAddressTaken: false 84 isReturnAddressTaken: false 85 hasStackMap: false 86 hasPatchPoint: false 87 stackSize: 65540 88 offsetAdjustment: 0 89 maxAlignment: 4 90 adjustsStack: false 91 hasCalls: false 92 stackProtector: '' 93 maxCallFrameSize: 0 94 hasOpaqueSPAdjustment: false 95 hasVAStart: false 96 hasMustTailInVarArgFunc: false 97 savePoint: '' 98 restorePoint: '' 99fixedStack: 100 - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0, 101 isImmutable: false, isAliased: false, callee-saved-register: '' } 102stack: 103 - { id: 0, name: scratch0, type: default, offset: 4, size: 32768, alignment: 4, 104 stack-id: 0, callee-saved-register: '', local-offset: 0, 105 debug-info-variable: '', debug-info-expression: '', 106 debug-info-location: '' } 107 - { id: 1, name: scratch1, type: default, offset: 32772, size: 32768, 108 alignment: 4, stack-id: 0, callee-saved-register: '', local-offset: 32768, 109 debug-info-variable: '', debug-info-expression: '', 110 debug-info-location: '' } 111constants: 112body: | 113 bb.0.entry: 114 successors: %bb.1.if(0x30000000), %bb.2.else(0x50000000) 115 liveins: $sgpr0_sgpr1, $sgpr3 116 117 $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 44, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) 118 $sgpr8 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 119 $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM $sgpr0_sgpr1, 36, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`) 120 $sgpr9 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 121 $sgpr10 = S_MOV_B32 4294967295, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 122 $sgpr11 = S_MOV_B32 15204352, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 123 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 124 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 4, 0, 0, 0, implicit $exec :: (store 4 into %ir.scratchptr01) 125 S_WAITCNT 127 126 S_CMP_LG_U32 killed $sgpr2, 0, implicit-def $scc 127 S_WAITCNT 3855 128 $vgpr0 = V_MOV_B32_e32 2, implicit $exec 129 $vgpr1 = V_MOV_B32_e32 32772, implicit $exec 130 BUFFER_STORE_DWORD_OFFEN killed $vgpr0, killed $vgpr1, $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0, 0, implicit $exec :: (store 4 into %ir.scratchptr12) 131 S_CBRANCH_SCC0 %bb.1.if, implicit killed $scc 132 133 bb.2.else: 134 successors: %bb.3.done(0x80000000) 135 liveins: $sgpr0_sgpr1, $sgpr4_sgpr5, $sgpr3, $sgpr8_sgpr9_sgpr10_sgpr11 136 137 $sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 52, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) 138 S_WAITCNT 3855 139 $vgpr0 = V_MOV_B32_e32 32772, implicit $exec 140 S_BRANCH %bb.3.done 141 142 bb.1.if: 143 successors: %bb.3.done(0x80000000) 144 liveins: $sgpr0_sgpr1, $sgpr4_sgpr5, $sgpr3, $sgpr8_sgpr9_sgpr10_sgpr11 145 146 $sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 48, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) 147 S_WAITCNT 3855 148 $vgpr0 = V_MOV_B32_e32 4, implicit $exec 149 150 bb.3.done: 151 liveins: $sgpr3, $sgpr4_sgpr5, $sgpr8_sgpr9_sgpr10_sgpr11, $vgpr0, $sgpr0 152 153 S_WAITCNT 127 154 $sgpr0 = S_LSHL_B32 killed $sgpr0, 2, implicit-def dead $scc 155 $vgpr0 = V_ADD_I32_e32 killed $sgpr0, killed $vgpr0, implicit-def dead $vcc, implicit $exec 156 $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr0, killed $sgpr8_sgpr9_sgpr10_sgpr11, $sgpr3, 0, 0, 0, 0, implicit $exec :: (non-temporal load 4 from %ir.else_ptr), (non-temporal load 4 from %ir.if_ptr) 157 $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr4_sgpr5 158 $vgpr2 = V_MOV_B32_e32 killed $sgpr5, implicit $exec, implicit $sgpr4_sgpr5, implicit $exec 159 S_WAITCNT 3952 160 FLAT_STORE_DWORD killed $vgpr1_vgpr2, killed $vgpr0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.out) 161 S_ENDPGM 162 163... 164