1; RUN: llc < %s -o /dev/null "-mtriple=thumbv7-apple-ios" -debug-only=post-RA-sched 2> %t
2; RUN: FileCheck %s < %t
3; REQUIRES: asserts
4; Make sure that mayalias store-load dependencies have one cycle
5; latency regardless of whether they are barriers or not.
6
7; CHECK: ** List Scheduling
8; CHECK: SU(2){{.*}}STR{{.*}}(volatile
9; CHECK-NOT: SU({{.*}}): Ord
10; CHECK: SU(3): Ord Latency=1
11; CHECK-NOT: SU({{.*}}): Ord
12; CHECK: SU(3){{.*}}LDR{{.*}}(volatile
13; CHECK-NOT: SU({{.*}}): Ord
14; CHECK: SU(2): Ord Latency=1
15; CHECK-NOT: SU({{.*}}): Ord
16; CHECK: Successors:
17; CHECK: ** List Scheduling
18; CHECK: SU(2){{.*}}STR{{.*}}
19; CHECK-NOT: SU({{.*}}): Ord
20; CHECK: SU(3): Ord Latency=1
21; CHECK-NOT: SU({{.*}}): Ord
22; CHECK: SU(3){{.*}}LDR{{.*}}
23; CHECK-NOT: SU({{.*}}): Ord
24; CHECK: SU(2): Ord Latency=1
25; CHECK-NOT: SU({{.*}}): Ord
26; CHECK: Successors:
27define i32 @f1(i32* nocapture %p1, i32* nocapture %p2) nounwind {
28entry:
29  store volatile i32 65540, i32* %p1, align 4
30  %0 = load volatile i32, i32* %p2, align 4
31  ret i32 %0
32}
33
34define i32 @f2(i32* nocapture %p1, i32* nocapture %p2) nounwind {
35entry:
36  store i32 65540, i32* %p1, align 4
37  %0 = load i32, i32* %p2, align 4
38  ret i32 %0
39}
40