1; RUN: llc -mtriple=armv7a-eabi < %s | FileCheck %s --check-prefix=CHECK-ARM
2; RUN: llc -mtriple=armv6m-eabi < %s | FileCheck %s --check-prefix=CHECK-THM
3
4; Function Attrs: minsize optsize
5declare void @g(i32*) local_unnamed_addr #0
6
7; Function Attrs: minsize optsize
8define void @f() local_unnamed_addr #0 {
9entry:
10  %i = alloca i32, align 4
11  %0 = bitcast i32* %i to i8*
12  store i32 1, i32* %i, align 4
13  call void @g(i32* nonnull %i)
14  ret void
15}
16
17; Check unwind info does not mention the registers used for padding, and
18; the amount of stack adjustment is the same as in the actual
19; instructions.
20
21; CHECK-ARM:      .save {r11, lr}
22; CHECK-ARM-NEXT: .pad #8
23; CHECK-ARM-NEXT: push {r9, r10, r11, lr}
24; CHECK-ARM:      pop {r2, r3, r11, pc}
25
26; CHECK-THM:      .save {r7, lr}
27; CHECK-THM-NEXT: .pad #8
28; CHECK-THM-NEXT: push {r5, r6, r7, lr}
29; CHECK-THM:      pop {r2, r3, r7, pc}
30
31
32define void @f1() local_unnamed_addr #1 {
33entry:
34  %i = alloca i32, align 4
35  %0 = bitcast i32* %i to i8*
36  store i32 1, i32* %i, align 4
37  call void @g(i32* nonnull %i)
38  ret void
39}
40
41; Check that unwind info is the same whether or not using -Os (minsize attr)
42
43; CHECK-ARM:      .save {r11, lr}
44; CHECK-ARM-NEXT: push {r11, lr}
45; CHECK-ARM-NEXT: .pad #8
46
47; CHECK-THM:      .save {r7, lr}
48; CHECK-THM-NEXT: push {r7, lr}
49; CHECK-THM-NEXT: .pad #8
50
51attributes #0 = { minsize optsize }
52attributes #1 = { optsize }
53