1; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ARM 3; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 4; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-MACHO 5; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=+long-calls | FileCheck %s --check-prefix=ARM-LONG --check-prefix=ARM-LONG-ELF 6; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=+long-calls | FileCheck %s --check-prefix=THUMB-LONG 7; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 8; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP 9; RUN: llc -fast-isel-sink-local-values < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP 10 11; Note that some of these tests assume that relocations are either 12; movw/movt or constant pool loads. Different platforms will select 13; different approaches. 14 15define i32 @t0(i1 zeroext %a) nounwind { 16 %1 = zext i1 %a to i32 17 ret i32 %1 18} 19 20define i32 @t1(i8 signext %a) nounwind { 21 %1 = sext i8 %a to i32 22 ret i32 %1 23} 24 25define i32 @t2(i8 zeroext %a) nounwind { 26 %1 = zext i8 %a to i32 27 ret i32 %1 28} 29 30define i32 @t3(i16 signext %a) nounwind { 31 %1 = sext i16 %a to i32 32 ret i32 %1 33} 34 35define i32 @t4(i16 zeroext %a) nounwind { 36 %1 = zext i16 %a to i32 37 ret i32 %1 38} 39 40define void @foo(i8 %a, i16 %b) nounwind { 41; ARM: foo 42; THUMB: foo 43;; Materialize i1 1 44; ARM: movw r2, #1 45;; zero-ext 46; ARM: and r2, r2, #1 47; THUMB: and r2, r2, #1 48 %1 = call i32 @t0(i1 zeroext 1) 49; ARM: sxtb r2, r1 50; ARM: mov r0, r2 51; THUMB: sxtb r2, r1 52; THUMB: mov r0, r2 53 %2 = call i32 @t1(i8 signext %a) 54; ARM: and r2, r1, #255 55; ARM: mov r0, r2 56; THUMB: and r2, r1, #255 57; THUMB: mov r0, r2 58 %3 = call i32 @t2(i8 zeroext %a) 59; ARM: sxth r2, r1 60; ARM: mov r0, r2 61; THUMB: sxth r2, r1 62; THUMB: mov r0, r2 63 %4 = call i32 @t3(i16 signext %b) 64; ARM: uxth r2, r1 65; ARM: mov r0, r2 66; THUMB: uxth r2, r1 67; THUMB: mov r0, r2 68 %5 = call i32 @t4(i16 zeroext %b) 69 70;; A few test to check materialization 71;; Note: i1 1 was materialized with t1 call 72; ARM: movw r1, #255 73%6 = call i32 @t2(i8 zeroext 255) 74; ARM: movw r1, #65535 75; THUMB: movw r1, #65535 76%7 = call i32 @t4(i16 zeroext 65535) 77 ret void 78} 79 80define void @foo2() nounwind { 81 %1 = call signext i16 @t5() 82 %2 = call zeroext i16 @t6() 83 %3 = call signext i8 @t7() 84 %4 = call zeroext i8 @t8() 85 %5 = call zeroext i1 @t9() 86 ret void 87} 88 89declare signext i16 @t5(); 90declare zeroext i16 @t6(); 91declare signext i8 @t7(); 92declare zeroext i8 @t8(); 93declare zeroext i1 @t9(); 94 95define i32 @t10() { 96entry: 97; ARM: @t10 98; ARM-DAG: movw [[R0:l?r[0-9]*]], #0 99; ARM-DAG: movw [[R1:l?r[0-9]*]], #248 100; ARM-DAG: movw [[R2:l?r[0-9]*]], #187 101; ARM-DAG: movw [[R3:l?r[0-9]*]], #28 102; ARM-DAG: movw [[R4:l?r[0-9]*]], #40 103; ARM-DAG: movw [[R5:l?r[0-9]*]], #186 104; ARM-DAG: and [[R0]], [[R0]], #255 105; ARM-DAG: and [[R1]], [[R1]], #255 106; ARM-DAG: and [[R2]], [[R2]], #255 107; ARM-DAG: and [[R3]], [[R3]], #255 108; ARM-DAG: and [[R4]], [[R4]], #255 109; ARM-DAG: str [[R4]], [sp] 110; ARM-DAG: and [[R4]], [[R5]], #255 111; ARM-DAG: str [[R4]], [sp, #4] 112; ARM: bl {{_?}}bar 113; ARM-LONG-LABEL: @t10 114 115; ARM-LONG-MACHO: {{(movw)|(ldr)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 116; ARM-LONG-MACHO: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 117; ARM-LONG-MACHO: str [[R]], [r7, [[SLOT:#[-0-9]+]]] @ 4-byte Spill 118; ARM-LONG-MACHO: ldr [[R:l?r[0-9]*]], [r7, [[SLOT]]] @ 4-byte Reload 119 120; ARM-LONG-ELF: movw [[R:l?r[0-9]*]], :lower16:bar 121; ARM-LONG-ELF: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 122 123; ARM-LONG: blx [[R]] 124; THUMB: @t10 125; THUMB-DAG: movs [[R0:l?r[0-9]*]], #0 126; THUMB-DAG: movs [[R1:l?r[0-9]*]], #248 127; THUMB-DAG: movs [[R2:l?r[0-9]*]], #187 128; THUMB-DAG: movs [[R3:l?r[0-9]*]], #28 129; THUMB-DAG: movw [[R4:l?r[0-9]*]], #40 130; THUMB-DAG: movw [[R5:l?r[0-9]*]], #186 131; THUMB-DAG: and [[R0]], [[R0]], #255 132; THUMB-DAG: and [[R1]], [[R1]], #255 133; THUMB-DAG: and [[R2]], [[R2]], #255 134; THUMB-DAG: and [[R3]], [[R3]], #255 135; THUMB-DAG: and [[R4]], [[R4]], #255 136; THUMB-DAG: str.w [[R4]], [sp] 137; THUMB-DAG: and [[R4]], [[R5]], #255 138; THUMB-DAG: str.w [[R4]], [sp, #4] 139; THUMB: bl {{_?}}bar 140; THUMB-LONG-LABEL: @t10 141; THUMB-LONG: {{(movw)|(ldr.n)}} [[R:l?r[0-9]*]], {{(:lower16:L_bar\$non_lazy_ptr)|(.LCPI)}} 142; THUMB-LONG: {{(movt [[R]], :upper16:L_bar\$non_lazy_ptr)?}} 143; THUMB-LONG: ldr{{(.w)?}} [[R]], {{\[}}[[R]]{{\]}} 144; THUMB-LONG: str [[R]], [sp, [[SLOT:#[-0-9]+]]] @ 4-byte Spill 145; THUMB-LONG: ldr.w [[R:l?r[0-9]*]], [sp, [[SLOT]]] @ 4-byte Reload 146; THUMB-LONG: blx [[R]] 147 %call = call i32 @bar(i8 zeroext 0, i8 zeroext -8, i8 zeroext -69, i8 zeroext 28, i8 zeroext 40, i8 zeroext -70) 148 ret i32 0 149} 150 151declare i32 @bar(i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) 152 153define i32 @bar0(i32 %i) nounwind { 154 ret i32 0 155} 156 157define void @foo3() uwtable { 158; ARM: @foo3 159; ARM: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr r[0-9]+, .LCPI)}} 160; ARM: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 161; ARM: movw {{r[0-9]+}}, #0 162; ARM: blx {{r[0-9]+}} 163; THUMB: {{(movw r[0-9]+, :lower16:_?bar0)|(ldr.n r[0-9]+, .LCPI)}} 164; THUMB: {{(movt r[0-9]+, :upper16:_?bar0)|(ldr r[0-9]+, \[r[0-9]+\])}} 165; THUMB: movs {{r[0-9]+}}, #0 166; THUMB: blx {{r[0-9]+}} 167 %fptr = alloca i32 (i32)*, align 8 168 store i32 (i32)* @bar0, i32 (i32)** %fptr, align 8 169 %1 = load i32 (i32)*, i32 (i32)** %fptr, align 8 170 %call = call i32 %1(i32 0) 171 ret void 172} 173 174define i32 @LibCall(i32 %a, i32 %b) { 175entry: 176; ARM: LibCall 177; ARM: bl {{___udivsi3|__aeabi_uidiv}} 178; ARM-LONG-LABEL: LibCall 179 180; ARM-LONG-MACHO: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr r2, .LCPI)}} 181; ARM-LONG-MACHO: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 182; ARM-LONG-MACHO: ldr r2, [r2] 183 184; ARM-LONG-ELF: movw r2, :lower16:__aeabi_uidiv 185; ARM-LONG-ELF: movt r2, :upper16:__aeabi_uidiv 186 187; ARM-LONG: blx r2 188; THUMB: LibCall 189; THUMB: bl {{___udivsi3|__aeabi_uidiv}} 190; THUMB-LONG-LABEL: LibCall 191; THUMB-LONG: {{(movw r2, :lower16:L___udivsi3\$non_lazy_ptr)|(ldr.n r2, .LCPI)}} 192; THUMB-LONG: {{(movt r2, :upper16:L___udivsi3\$non_lazy_ptr)?}} 193; THUMB-LONG: ldr r2, [r2] 194; THUMB-LONG: blx r2 195 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] 196 ret i32 %tmp1 197} 198 199; Test fastcc 200 201define fastcc void @fast_callee(float %i) ssp { 202entry: 203; ARM: fast_callee 204; ARM: vmov r0, s0 205; THUMB: fast_callee 206; THUMB: vmov r0, s0 207; ARM-NOVFP: fast_callee 208; ARM-NOVFP-NOT: s0 209; THUMB-NOVFP: fast_callee 210; THUMB-NOVFP-NOT: s0 211 call void @print(float %i) 212 ret void 213} 214 215define void @fast_caller() ssp { 216entry: 217; ARM: fast_caller 218; ARM: vldr s0, 219; THUMB: fast_caller 220; THUMB: vldr s0, 221; ARM-NOVFP: fast_caller 222; ARM-NOVFP: movw r0, #13107 223; ARM-NOVFP: movt r0, #16611 224; THUMB-NOVFP: fast_caller 225; THUMB-NOVFP: movw r0, #13107 226; THUMB-NOVFP: movt r0, #16611 227 call fastcc void @fast_callee(float 0x401C666660000000) 228 ret void 229} 230 231define void @no_fast_callee(float %i) ssp { 232entry: 233; ARM: no_fast_callee 234; ARM: vmov s0, r0 235; THUMB: no_fast_callee 236; THUMB: vmov s0, r0 237; ARM-NOVFP: no_fast_callee 238; ARM-NOVFP-NOT: s0 239; THUMB-NOVFP: no_fast_callee 240; THUMB-NOVFP-NOT: s0 241 call void @print(float %i) 242 ret void 243} 244 245define void @no_fast_caller() ssp { 246entry: 247; ARM: no_fast_caller 248; ARM: vmov r0, s0 249; THUMB: no_fast_caller 250; THUMB: vmov r0, s0 251; ARM-NOVFP: no_fast_caller 252; ARM-NOVFP: movw r0, #13107 253; ARM-NOVFP: movt r0, #16611 254; THUMB-NOVFP: no_fast_caller 255; THUMB-NOVFP: movw r0, #13107 256; THUMB-NOVFP: movt r0, #16611 257 call void @no_fast_callee(float 0x401C666660000000) 258 ret void 259} 260 261declare void @bar2(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) 262 263define void @call_undef_args() { 264; ARM-LABEL: call_undef_args 265; ARM: movw r0, #1 266; ARM-NEXT: movw r1, #2 267; ARM-NEXT: movw r2, #3 268; ARM-NEXT: movw r3, #4 269; ARM-NOT: str {{r[0-9]+}}, [sp] 270; ARM: movw [[REG:l?r[0-9]*]], #6 271; ARM-NEXT: str [[REG]], [sp, #4] 272 call void @bar2(i32 1, i32 2, i32 3, i32 4, i32 undef, i32 6) 273 ret void 274} 275 276declare void @print(float) 277